Linux patch 5.10.265.10-29

Signed-off-by: Alice Ferrazzi <alicef@gentoo.org>

2 files changed, 12917 insertions, 0 deletions

diff --git a/0000_README b/0000_README
index 918ab777..da6b8c20 100644
--- a/0000_README
+++ b/0000_README
@@ -143,6 +143,10 @@ Patch:  1024_linux-5.10.25.patch
 From:   http://www.kernel.org
 Desc:   Linux 5.10.25
 
+Patch:  1025_linux-5.10.26.patch
+From:   http://www.kernel.org
+Desc:   Linux 5.10.26
+
 Patch:  1500_XATTR_USER_PREFIX.patch
 From:   https://bugs.gentoo.org/show_bug.cgi?id=470644
 Desc:   Support for namespace user.pax.* on tmpfs.
diff --git a/1025_linux-5.10.26.patch b/1025_linux-5.10.26.patch
new file mode 100644
index 00000000..b5ea9064
--- /dev/null
+++ b/1025_linux-5.10.26.patch
@@ -0,0 +1,12913 @@
+diff --git a/Documentation/scsi/libsas.rst b/Documentation/scsi/libsas.rst
+index f9b77c7879dbb..ea63ab3a92160 100644
+--- a/Documentation/scsi/libsas.rst
++++ b/Documentation/scsi/libsas.rst
+@@ -189,12 +189,10 @@ num_phys
+ The event interface::
+ 
+ 	/* LLDD calls these to notify the class of an event. */
+-	void (*notify_port_event)(struct sas_phy *, enum port_event);
+-	void (*notify_phy_event)(struct sas_phy *, enum phy_event);
+-
+-When sas_register_ha() returns, those are set and can be
+-called by the LLDD to notify the SAS layer of such events
+-the SAS layer.
++	void sas_notify_port_event(struct sas_phy *, enum port_event);
++	void sas_notify_phy_event(struct sas_phy *, enum phy_event);
++	void sas_notify_port_event_gfp(struct sas_phy *, enum port_event, gfp_t);
++	void sas_notify_phy_event_gfp(struct sas_phy *, enum phy_event, gfp_t);
+ 
+ The port notification::
+ 
+diff --git a/MAINTAINERS b/MAINTAINERS
+index 281de213ef478..24cdfcf334ea1 100644
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -1155,7 +1155,7 @@ M:	Joel Fernandes <joel@joelfernandes.org>
+ M:	Christian Brauner <christian@brauner.io>
+ M:	Hridya Valsaraju <hridya@google.com>
+ M:	Suren Baghdasaryan <surenb@google.com>
+-L:	devel@driverdev.osuosl.org
++L:	linux-kernel@vger.kernel.org
+ S:	Supported
+ T:	git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git
+ F:	drivers/android/
+@@ -8001,7 +8001,6 @@ F:	drivers/crypto/hisilicon/sec2/sec_main.c
+ 
+ HISILICON STAGING DRIVERS FOR HIKEY 960/970
+ M:	Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
+-L:	devel@driverdev.osuosl.org
+ S:	Maintained
+ F:	drivers/staging/hikey9xx/
+ 
+@@ -16665,7 +16664,7 @@ F:	drivers/staging/vt665?/
+ 
+ STAGING SUBSYSTEM
+ M:	Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+-L:	devel@driverdev.osuosl.org
++L:	linux-staging@lists.linux.dev
+ S:	Supported
+ T:	git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git
+ F:	drivers/staging/
+@@ -18705,7 +18704,7 @@ VME SUBSYSTEM
+ M:	Martyn Welch <martyn@welchs.me.uk>
+ M:	Manohar Vanga <manohar.vanga@gmail.com>
+ M:	Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+-L:	devel@driverdev.osuosl.org
++L:	linux-kernel@vger.kernel.org
+ S:	Maintained
+ T:	git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git
+ F:	Documentation/driver-api/vme.rst
+diff --git a/Makefile b/Makefile
+index 6858425cbe6c1..d4b87e604762a 100644
+--- a/Makefile
++++ b/Makefile
+@@ -1,7 +1,7 @@
+ # SPDX-License-Identifier: GPL-2.0
+ VERSION = 5
+ PATCHLEVEL = 10
+-SUBLEVEL = 25
++SUBLEVEL = 26
+ EXTRAVERSION =
+ NAME = Dare mighty things
+ 
+@@ -1249,15 +1249,17 @@ endef
+ define filechk_version.h
+ 	if [ $(SUBLEVEL) -gt 255 ]; then                                 \
+ 		echo \#define LINUX_VERSION_CODE $(shell                 \
+-		expr $(VERSION) \* 65536 + 0$(PATCHLEVEL) \* 256 + 255); \
++		expr $(VERSION) \* 65536 + $(PATCHLEVEL) \* 256 + 255); \
+ 	else                                                             \
+ 		echo \#define LINUX_VERSION_CODE $(shell                 \
+-		expr $(VERSION) \* 65536 + 0$(PATCHLEVEL) \* 256 + $(SUBLEVEL)); \
++		expr $(VERSION) \* 65536 + $(PATCHLEVEL) \* 256 + $(SUBLEVEL)); \
+ 	fi;                                                              \
+ 	echo '#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) +  \
+ 	((c) > 255 ? 255 : (c)))'
+ endef
+ 
++$(version_h): PATCHLEVEL := $(if $(PATCHLEVEL), $(PATCHLEVEL), 0)
++$(version_h): SUBLEVEL := $(if $(SUBLEVEL), $(SUBLEVEL), 0)
+ $(version_h): FORCE
+ 	$(call filechk,version.h)
+ 	$(Q)rm -f $(old_version_h)
+diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile
+index d66511825fe1e..337ab1d18cc1f 100644
+--- a/arch/mips/boot/compressed/Makefile
++++ b/arch/mips/boot/compressed/Makefile
+@@ -36,6 +36,7 @@ KBUILD_AFLAGS := $(KBUILD_AFLAGS) -D__ASSEMBLY__ \
+ 
+ # Prevents link failures: __sanitizer_cov_trace_pc() is not linked in.
+ KCOV_INSTRUMENT		:= n
++UBSAN_SANITIZE := n
+ 
+ # decompressor objects (linked with vmlinuz)
+ vmlinuzobjs-y := $(obj)/head.o $(obj)/decompress.o $(obj)/string.o
+diff --git a/arch/powerpc/include/asm/cpu_has_feature.h b/arch/powerpc/include/asm/cpu_has_feature.h
+index 7897d16e09904..727d4b3219379 100644
+--- a/arch/powerpc/include/asm/cpu_has_feature.h
++++ b/arch/powerpc/include/asm/cpu_has_feature.h
+@@ -7,7 +7,7 @@
+ #include <linux/bug.h>
+ #include <asm/cputable.h>
+ 
+-static inline bool early_cpu_has_feature(unsigned long feature)
++static __always_inline bool early_cpu_has_feature(unsigned long feature)
+ {
+ 	return !!((CPU_FTRS_ALWAYS & feature) ||
+ 		  (CPU_FTRS_POSSIBLE & cur_cpu_spec->cpu_features & feature));
+@@ -46,7 +46,7 @@ static __always_inline bool cpu_has_feature(unsigned long feature)
+ 	return static_branch_likely(&cpu_feature_keys[i]);
+ }
+ #else
+-static inline bool cpu_has_feature(unsigned long feature)
++static __always_inline bool cpu_has_feature(unsigned long feature)
+ {
+ 	return early_cpu_has_feature(feature);
+ }
+diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
+index 242bdd8281e0f..a2e067f68dee8 100644
+--- a/arch/powerpc/lib/sstep.c
++++ b/arch/powerpc/lib/sstep.c
+@@ -1853,7 +1853,7 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
+ 				goto compute_done;
+ 			}
+ 
+-			return -1;
++			goto unknown_opcode;
+ #ifdef __powerpc64__
+ 		case 777:	/* modsd */
+ 			if (!cpu_has_feature(CPU_FTR_ARCH_300))
+@@ -2909,6 +2909,20 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
+ 
+ 	}
+ 
++	if (OP_IS_LOAD_STORE(op->type) && (op->type & UPDATE)) {
++		switch (GETTYPE(op->type)) {
++		case LOAD:
++			if (ra == rd)
++				goto unknown_opcode;
++			fallthrough;
++		case STORE:
++		case LOAD_FP:
++		case STORE_FP:
++			if (ra == 0)
++				goto unknown_opcode;
++		}
++	}
++
+ #ifdef CONFIG_VSX
+ 	if ((GETTYPE(op->type) == LOAD_VSX ||
+ 	     GETTYPE(op->type) == STORE_VSX) &&
+diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
+index 3474286e59db7..df7fccf76df69 100644
+--- a/arch/riscv/Kconfig
++++ b/arch/riscv/Kconfig
+@@ -84,7 +84,6 @@ config RISCV
+ 	select PCI_MSI if PCI
+ 	select RISCV_INTC
+ 	select RISCV_TIMER if RISCV_SBI
+-	select SPARSEMEM_STATIC if 32BIT
+ 	select SPARSE_IRQ
+ 	select SYSCTL_EXCEPTION_TRACE
+ 	select THREAD_INFO_IN_TASK
+@@ -145,7 +144,8 @@ config ARCH_FLATMEM_ENABLE
+ config ARCH_SPARSEMEM_ENABLE
+ 	def_bool y
+ 	depends on MMU
+-	select SPARSEMEM_VMEMMAP_ENABLE
++	select SPARSEMEM_STATIC if 32BIT && SPARSMEM
++	select SPARSEMEM_VMEMMAP_ENABLE if 64BIT
+ 
+ config ARCH_SELECT_MEMORY_MODEL
+ 	def_bool ARCH_SPARSEMEM_ENABLE
+diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
+index 653edb25d4957..c0fdb05ffa0b2 100644
+--- a/arch/riscv/include/asm/sbi.h
++++ b/arch/riscv/include/asm/sbi.h
+@@ -51,10 +51,10 @@ enum sbi_ext_rfence_fid {
+ 	SBI_EXT_RFENCE_REMOTE_FENCE_I = 0,
+ 	SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
+ 	SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
+-	SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA,
+ 	SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID,
+-	SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA,
++	SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA,
+ 	SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID,
++	SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA,
+ };
+ 
+ enum sbi_ext_hsm_fid {
+diff --git a/arch/s390/include/asm/pci.h b/arch/s390/include/asm/pci.h
+index 212628932ddc1..a75d94a9bcb2f 100644
+--- a/arch/s390/include/asm/pci.h
++++ b/arch/s390/include/asm/pci.h
+@@ -201,8 +201,8 @@ extern unsigned int s390_pci_no_rid;
+   Prototypes
+ ----------------------------------------------------------------------------- */
+ /* Base stuff */
+-int zpci_create_device(struct zpci_dev *);
+-void zpci_remove_device(struct zpci_dev *zdev);
++int zpci_create_device(u32 fid, u32 fh, enum zpci_state state);
++void zpci_remove_device(struct zpci_dev *zdev, bool set_error);
+ int zpci_enable_device(struct zpci_dev *);
+ int zpci_disable_device(struct zpci_dev *);
+ int zpci_register_ioat(struct zpci_dev *, u8, u64, u64, u64);
+@@ -212,7 +212,7 @@ void zpci_remove_reserved_devices(void);
+ /* CLP */
+ int clp_setup_writeback_mio(void);
+ int clp_scan_pci_devices(void);
+-int clp_add_pci_device(u32, u32, int);
++int clp_query_pci_fn(struct zpci_dev *zdev);
+ int clp_enable_fh(struct zpci_dev *, u8);
+ int clp_disable_fh(struct zpci_dev *);
+ int clp_get_state(u32 fid, enum zpci_state *state);
+diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c
+index 7b3af2d6b9baa..579ec3a8c816f 100644
+--- a/arch/s390/kernel/vtime.c
++++ b/arch/s390/kernel/vtime.c
+@@ -217,7 +217,7 @@ void vtime_flush(struct task_struct *tsk)
+ 	avg_steal = S390_lowcore.avg_steal_timer / 2;
+ 	if ((s64) steal > 0) {
+ 		S390_lowcore.steal_timer = 0;
+-		account_steal_time(steal);
++		account_steal_time(cputime_to_nsecs(steal));
+ 		avg_steal += steal;
+ 	}
+ 	S390_lowcore.avg_steal_timer = avg_steal;
+diff --git a/arch/s390/pci/pci.c b/arch/s390/pci/pci.c
+index 570016ae8bcd1..1ae7a76ae97b7 100644
+--- a/arch/s390/pci/pci.c
++++ b/arch/s390/pci/pci.c
+@@ -682,56 +682,101 @@ int zpci_disable_device(struct zpci_dev *zdev)
+ }
+ EXPORT_SYMBOL_GPL(zpci_disable_device);
+ 
+-void zpci_remove_device(struct zpci_dev *zdev)
++/* zpci_remove_device - Removes the given zdev from the PCI core
++ * @zdev: the zdev to be removed from the PCI core
++ * @set_error: if true the device's error state is set to permanent failure
++ *
++ * Sets a zPCI device to a configured but offline state; the zPCI
++ * device is still accessible through its hotplug slot and the zPCI
++ * API but is removed from the common code PCI bus, making it
++ * no longer available to drivers.
++ */
++void zpci_remove_device(struct zpci_dev *zdev, bool set_error)
+ {
+ 	struct zpci_bus *zbus = zdev->zbus;
+ 	struct pci_dev *pdev;
+ 
++	if (!zdev->zbus->bus)
++		return;
++
+ 	pdev = pci_get_slot(zbus->bus, zdev->devfn);
+ 	if (pdev) {
+-		if (pdev->is_virtfn)
+-			return zpci_iov_remove_virtfn(pdev, zdev->vfn);
++		if (set_error)
++			pdev->error_state = pci_channel_io_perm_failure;
++		if (pdev->is_virtfn) {
++			zpci_iov_remove_virtfn(pdev, zdev->vfn);
++			/* balance pci_get_slot */
++			pci_dev_put(pdev);
++			return;
++		}
+ 		pci_stop_and_remove_bus_device_locked(pdev);
++		/* balance pci_get_slot */
++		pci_dev_put(pdev);
+ 	}
+ }
+ 
+-int zpci_create_device(struct zpci_dev *zdev)
++/**
++ * zpci_create_device() - Create a new zpci_dev and add it to the zbus
++ * @fid: Function ID of the device to be created
++ * @fh: Current Function Handle of the device to be created
++ * @state: Initial state after creation either Standby or Configured
++ *
++ * Creates a new zpci device and adds it to its, possibly newly created, zbus
++ * as well as zpci_list.
++ *
++ * Returns: 0 on success, an error value otherwise
++ */
++int zpci_create_device(u32 fid, u32 fh, enum zpci_state state)
+ {
++	struct zpci_dev *zdev;
+ 	int rc;
+ 
+-	kref_init(&zdev->kref);
++	zpci_dbg(3, "add fid:%x, fh:%x, c:%d\n", fid, fh, state);
++	zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
++	if (!zdev)
++		return -ENOMEM;
+ 
+-	spin_lock(&zpci_list_lock);
+-	list_add_tail(&zdev->entry, &zpci_list);
+-	spin_unlock(&zpci_list_lock);
++	/* FID and Function Handle are the static/dynamic identifiers */
++	zdev->fid = fid;
++	zdev->fh = fh;
+ 
+-	rc = zpci_init_iommu(zdev);
++	/* Query function properties and update zdev */
++	rc = clp_query_pci_fn(zdev);
+ 	if (rc)
+-		goto out;
++		goto error;
++	zdev->state =  state;
+ 
++	kref_init(&zdev->kref);
+ 	mutex_init(&zdev->lock);
++
++	rc = zpci_init_iommu(zdev);
++	if (rc)
++		goto error;
++
+ 	if (zdev->state == ZPCI_FN_STATE_CONFIGURED) {
+ 		rc = zpci_enable_device(zdev);
+ 		if (rc)
+-			goto out_destroy_iommu;
++			goto error_destroy_iommu;
+ 	}
+ 
+ 	rc = zpci_bus_device_register(zdev, &pci_root_ops);
+ 	if (rc)
+-		goto out_disable;
++		goto error_disable;
++
++	spin_lock(&zpci_list_lock);
++	list_add_tail(&zdev->entry, &zpci_list);
++	spin_unlock(&zpci_list_lock);
+ 
+ 	return 0;
+ 
+-out_disable:
++error_disable:
+ 	if (zdev->state == ZPCI_FN_STATE_ONLINE)
+ 		zpci_disable_device(zdev);
+-
+-out_destroy_iommu:
++error_destroy_iommu:
+ 	zpci_destroy_iommu(zdev);
+-out:
+-	spin_lock(&zpci_list_lock);
+-	list_del(&zdev->entry);
+-	spin_unlock(&zpci_list_lock);
++error:
++	zpci_dbg(0, "add fid:%x, rc:%d\n", fid, rc);
++	kfree(zdev);
+ 	return rc;
+ }
+ 
+@@ -740,7 +785,7 @@ void zpci_release_device(struct kref *kref)
+ 	struct zpci_dev *zdev = container_of(kref, struct zpci_dev, kref);
+ 
+ 	if (zdev->zbus->bus)
+-		zpci_remove_device(zdev);
++		zpci_remove_device(zdev, false);
+ 
+ 	switch (zdev->state) {
+ 	case ZPCI_FN_STATE_ONLINE:
+diff --git a/arch/s390/pci/pci_clp.c b/arch/s390/pci/pci_clp.c
+index 153720d21ae7f..d3331596ddbe1 100644
+--- a/arch/s390/pci/pci_clp.c
++++ b/arch/s390/pci/pci_clp.c
+@@ -181,7 +181,7 @@ static int clp_store_query_pci_fn(struct zpci_dev *zdev,
+ 	return 0;
+ }
+ 
+-static int clp_query_pci_fn(struct zpci_dev *zdev, u32 fh)
++int clp_query_pci_fn(struct zpci_dev *zdev)
+ {
+ 	struct clp_req_rsp_query_pci *rrb;
+ 	int rc;
+@@ -194,7 +194,7 @@ static int clp_query_pci_fn(struct zpci_dev *zdev, u32 fh)
+ 	rrb->request.hdr.len = sizeof(rrb->request);
+ 	rrb->request.hdr.cmd = CLP_QUERY_PCI_FN;
+ 	rrb->response.hdr.len = sizeof(rrb->response);
+-	rrb->request.fh = fh;
++	rrb->request.fh = zdev->fh;
+ 
+ 	rc = clp_req(rrb, CLP_LPS_PCI);
+ 	if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
+@@ -212,40 +212,6 @@ out:
+ 	return rc;
+ }
+ 
+-int clp_add_pci_device(u32 fid, u32 fh, int configured)
+-{
+-	struct zpci_dev *zdev;
+-	int rc = -ENOMEM;
+-
+-	zpci_dbg(3, "add fid:%x, fh:%x, c:%d\n", fid, fh, configured);
+-	zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
+-	if (!zdev)
+-		goto error;
+-
+-	zdev->fh = fh;
+-	zdev->fid = fid;
+-
+-	/* Query function properties and update zdev */
+-	rc = clp_query_pci_fn(zdev, fh);
+-	if (rc)
+-		goto error;
+-
+-	if (configured)
+-		zdev->state = ZPCI_FN_STATE_CONFIGURED;
+-	else
+-		zdev->state = ZPCI_FN_STATE_STANDBY;
+-
+-	rc = zpci_create_device(zdev);
+-	if (rc)
+-		goto error;
+-	return 0;
+-
+-error:
+-	zpci_dbg(0, "add fid:%x, rc:%d\n", fid, rc);
+-	kfree(zdev);
+-	return rc;
+-}
+-
+ static int clp_refresh_fh(u32 fid);
+ /*
+  * Enable/Disable a given PCI function and update its function handle if
+@@ -408,7 +374,7 @@ static void __clp_add(struct clp_fh_list_entry *entry, void *data)
+ 
+ 	zdev = get_zdev_by_fid(entry->fid);
+ 	if (!zdev)
+-		clp_add_pci_device(entry->fid, entry->fh, entry->config_state);
++		zpci_create_device(entry->fid, entry->fh, entry->config_state);
+ }
+ 
+ int clp_scan_pci_devices(void)
+diff --git a/arch/s390/pci/pci_event.c b/arch/s390/pci/pci_event.c
+index 9a6bae503fe61..ac0c65cdd69d9 100644
+--- a/arch/s390/pci/pci_event.c
++++ b/arch/s390/pci/pci_event.c
+@@ -76,20 +76,17 @@ void zpci_event_error(void *data)
+ static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf)
+ {
+ 	struct zpci_dev *zdev = get_zdev_by_fid(ccdf->fid);
+-	struct pci_dev *pdev = NULL;
+ 	enum zpci_state state;
++	struct pci_dev *pdev;
+ 	int ret;
+ 
+-	if (zdev && zdev->zbus && zdev->zbus->bus)
+-		pdev = pci_get_slot(zdev->zbus->bus, zdev->devfn);
+-
+ 	zpci_err("avail CCDF:\n");
+ 	zpci_err_hex(ccdf, sizeof(*ccdf));
+ 
+ 	switch (ccdf->pec) {
+ 	case 0x0301: /* Reserved|Standby -> Configured */
+ 		if (!zdev) {
+-			ret = clp_add_pci_device(ccdf->fid, ccdf->fh, 1);
++			zpci_create_device(ccdf->fid, ccdf->fh, ZPCI_FN_STATE_CONFIGURED);
+ 			break;
+ 		}
+ 		/* the configuration request may be stale */
+@@ -116,7 +113,7 @@ static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf)
+ 		break;
+ 	case 0x0302: /* Reserved -> Standby */
+ 		if (!zdev) {
+-			clp_add_pci_device(ccdf->fid, ccdf->fh, 0);
++			zpci_create_device(ccdf->fid, ccdf->fh, ZPCI_FN_STATE_STANDBY);
+ 			break;
+ 		}
+ 		zdev->fh = ccdf->fh;
+@@ -124,8 +121,7 @@ static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf)
+ 	case 0x0303: /* Deconfiguration requested */
+ 		if (!zdev)
+ 			break;
+-		if (pdev)
+-			zpci_remove_device(zdev);
++		zpci_remove_device(zdev, false);
+ 
+ 		ret = zpci_disable_device(zdev);
+ 		if (ret)
+@@ -140,12 +136,10 @@ static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf)
+ 	case 0x0304: /* Configured -> Standby|Reserved */
+ 		if (!zdev)
+ 			break;
+-		if (pdev) {
+-			/* Give the driver a hint that the function is
+-			 * already unusable. */
+-			pdev->error_state = pci_channel_io_perm_failure;
+-			zpci_remove_device(zdev);
+-		}
++		/* Give the driver a hint that the function is
++		 * already unusable.
++		 */
++		zpci_remove_device(zdev, true);
+ 
+ 		zdev->fh = ccdf->fh;
+ 		zpci_disable_device(zdev);
+diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
+index 4b05c876f9f69..e7dc13fe5e29f 100644
+--- a/arch/x86/events/intel/core.c
++++ b/arch/x86/events/intel/core.c
+@@ -3562,6 +3562,9 @@ static int intel_pmu_hw_config(struct perf_event *event)
+ 		return ret;
+ 
+ 	if (event->attr.precise_ip) {
++		if ((event->attr.config & INTEL_ARCH_EVENT_MASK) == INTEL_FIXED_VLBR_EVENT)
++			return -EINVAL;
++
+ 		if (!(event->attr.freq || (event->attr.wakeup_events && !event->attr.watermark))) {
+ 			event->hw.flags |= PERF_X86_EVENT_AUTO_RELOAD;
+ 			if (!(event->attr.sample_type &
+diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
+index 485c5066f8b8c..31a7a6566d077 100644
+--- a/arch/x86/events/intel/ds.c
++++ b/arch/x86/events/intel/ds.c
+@@ -1894,7 +1894,7 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs, struct perf_sample_d
+ 		 */
+ 		if (!pebs_status && cpuc->pebs_enabled &&
+ 			!(cpuc->pebs_enabled & (cpuc->pebs_enabled-1)))
+-			pebs_status = cpuc->pebs_enabled;
++			pebs_status = p->status = cpuc->pebs_enabled;
+ 
+ 		bit = find_first_bit((unsigned long *)&pebs_status,
+ 					x86_pmu.max_pebs_events);
+diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
+index 82a08b5858182..50d02db723177 100644
+--- a/arch/x86/include/asm/processor.h
++++ b/arch/x86/include/asm/processor.h
+@@ -552,15 +552,6 @@ static inline void arch_thread_struct_whitelist(unsigned long *offset,
+ 	*size = fpu_kernel_xstate_size;
+ }
+ 
+-/*
+- * Thread-synchronous status.
+- *
+- * This is different from the flags in that nobody else
+- * ever touches our thread-synchronous status, so we don't
+- * have to worry about atomic accesses.
+- */
+-#define TS_COMPAT		0x0002	/* 32bit syscall active (64BIT)*/
+-
+ static inline void
+ native_load_sp0(unsigned long sp0)
+ {
+diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h
+index 44733a4bfc429..e701f29b48817 100644
+--- a/arch/x86/include/asm/thread_info.h
++++ b/arch/x86/include/asm/thread_info.h
+@@ -216,10 +216,31 @@ static inline int arch_within_stack_frames(const void * const stack,
+ 
+ #endif
+ 
++/*
++ * Thread-synchronous status.
++ *
++ * This is different from the flags in that nobody else
++ * ever touches our thread-synchronous status, so we don't
++ * have to worry about atomic accesses.
++ */
++#define TS_COMPAT		0x0002	/* 32bit syscall active (64BIT)*/
++
++#ifndef __ASSEMBLY__
+ #ifdef CONFIG_COMPAT
+ #define TS_I386_REGS_POKED	0x0004	/* regs poked by 32-bit ptracer */
++#define TS_COMPAT_RESTART	0x0008
++
++#define arch_set_restart_data	arch_set_restart_data
++
++static inline void arch_set_restart_data(struct restart_block *restart)
++{
++	struct thread_info *ti = current_thread_info();
++	if (ti->status & TS_COMPAT)
++		ti->status |= TS_COMPAT_RESTART;
++	else
++		ti->status &= ~TS_COMPAT_RESTART;
++}
+ #endif
+-#ifndef __ASSEMBLY__
+ 
+ #ifdef CONFIG_X86_32
+ #define in_ia32_syscall() true
+diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
+index f4c0514fc5108..539f3e88ca7cd 100644
+--- a/arch/x86/kernel/apic/apic.c
++++ b/arch/x86/kernel/apic/apic.c
+@@ -2317,6 +2317,11 @@ static int cpuid_to_apicid[] = {
+ 	[0 ... NR_CPUS - 1] = -1,
+ };
+ 
++bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
++{
++	return phys_id == cpuid_to_apicid[cpu];
++}
++
+ #ifdef CONFIG_SMP
+ /**
+  * apic_id_is_primary_thread - Check whether APIC ID belongs to a primary thread
+diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
+index 7b3c7e0d4a094..0d4818eab0da8 100644
+--- a/arch/x86/kernel/apic/io_apic.c
++++ b/arch/x86/kernel/apic/io_apic.c
+@@ -1033,6 +1033,16 @@ static int mp_map_pin_to_irq(u32 gsi, int idx, int ioapic, int pin,
+ 	if (idx >= 0 && test_bit(mp_irqs[idx].srcbus, mp_bus_not_pci)) {
+ 		irq = mp_irqs[idx].srcbusirq;
+ 		legacy = mp_is_legacy_irq(irq);
++		/*
++		 * IRQ2 is unusable for historical reasons on systems which
++		 * have a legacy PIC. See the comment vs. IRQ2 further down.
++		 *
++		 * If this gets removed at some point then the related code
++		 * in lapic_assign_system_vectors() needs to be adjusted as
++		 * well.
++		 */
++		if (legacy && irq == PIC_CASCADE_IR)
++			return -EINVAL;
+ 	}
+ 
+ 	mutex_lock(&ioapic_mutex);
+diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c
+index be0d7d4152eca..f51cab3e983d8 100644
+--- a/arch/x86/kernel/signal.c
++++ b/arch/x86/kernel/signal.c
+@@ -766,30 +766,8 @@ handle_signal(struct ksignal *ksig, struct pt_regs *regs)
+ 
+ static inline unsigned long get_nr_restart_syscall(const struct pt_regs *regs)
+ {
+-	/*
+-	 * This function is fundamentally broken as currently
+-	 * implemented.
+-	 *
+-	 * The idea is that we want to trigger a call to the
+-	 * restart_block() syscall and that we want in_ia32_syscall(),
+-	 * in_x32_syscall(), etc. to match whatever they were in the
+-	 * syscall being restarted.  We assume that the syscall
+-	 * instruction at (regs->ip - 2) matches whatever syscall
+-	 * instruction we used to enter in the first place.
+-	 *
+-	 * The problem is that we can get here when ptrace pokes
+-	 * syscall-like values into regs even if we're not in a syscall
+-	 * at all.
+-	 *
+-	 * For now, we maintain historical behavior and guess based on
+-	 * stored state.  We could do better by saving the actual
+-	 * syscall arch in restart_block or (with caveats on x32) by
+-	 * checking if regs->ip points to 'int $0x80'.  The current
+-	 * behavior is incorrect if a tracer has a different bitness
+-	 * than the tracee.
+-	 */
+ #ifdef CONFIG_IA32_EMULATION
+-	if (current_thread_info()->status & (TS_COMPAT|TS_I386_REGS_POKED))
++	if (current_thread_info()->status & TS_COMPAT_RESTART)
+ 		return __NR_ia32_restart_syscall;
+ #endif
+ #ifdef CONFIG_X86_X32_ABI
+diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
+index 87682dcb64ec3..bfda153b1a41d 100644
+--- a/drivers/base/power/runtime.c
++++ b/drivers/base/power/runtime.c
+@@ -325,22 +325,22 @@ static void rpm_put_suppliers(struct device *dev)
+ static int __rpm_callback(int (*cb)(struct device *), struct device *dev)
+ 	__releases(&dev->power.lock) __acquires(&dev->power.lock)
+ {
+-	bool use_links = dev->power.links_count > 0;
+-	bool get = false;
+ 	int retval, idx;
+-	bool put;
++	bool use_links = dev->power.links_count > 0;
+ 
+ 	if (dev->power.irq_safe) {
+ 		spin_unlock(&dev->power.lock);
+-	} else if (!use_links) {
+-		spin_unlock_irq(&dev->power.lock);
+ 	} else {
+-		get = dev->power.runtime_status == RPM_RESUMING;
+-
+ 		spin_unlock_irq(&dev->power.lock);
+ 
+-		/* Resume suppliers if necessary. */
+-		if (get) {
++		/*
++		 * Resume suppliers if necessary.
++		 *
++		 * The device's runtime PM status cannot change until this
++		 * routine returns, so it is safe to read the status outside of
++		 * the lock.
++		 */
++		if (use_links && dev->power.runtime_status == RPM_RESUMING) {
+ 			idx = device_links_read_lock();
+ 
+ 			retval = rpm_get_suppliers(dev);
+@@ -355,36 +355,24 @@ static int __rpm_callback(int (*cb)(struct device *), struct device *dev)
+ 
+ 	if (dev->power.irq_safe) {
+ 		spin_lock(&dev->power.lock);
+-		return retval;
+-	}
+-
+-	spin_lock_irq(&dev->power.lock);
+-
+-	if (!use_links)
+-		return retval;
+-
+-	/*
+-	 * If the device is suspending and the callback has returned success,
+-	 * drop the usage counters of the suppliers that have been reference
+-	 * counted on its resume.
+-	 *
+-	 * Do that if the resume fails too.
+-	 */
+-	put = dev->power.runtime_status == RPM_SUSPENDING && !retval;
+-	if (put)
+-		__update_runtime_status(dev, RPM_SUSPENDED);
+-	else
+-		put = get && retval;
+-
+-	if (put) {
+-		spin_unlock_irq(&dev->power.lock);
+-
+-		idx = device_links_read_lock();
++	} else {
++		/*
++		 * If the device is suspending and the callback has returned
++		 * success, drop the usage counters of the suppliers that have
++		 * been reference counted on its resume.
++		 *
++		 * Do that if resume fails too.
++		 */
++		if (use_links
++		    && ((dev->power.runtime_status == RPM_SUSPENDING && !retval)
++		    || (dev->power.runtime_status == RPM_RESUMING && retval))) {
++			idx = device_links_read_lock();
+ 
+-fail:
+-		rpm_put_suppliers(dev);
++ fail:
++			rpm_put_suppliers(dev);
+ 
+-		device_links_read_unlock(idx);
++			device_links_read_unlock(idx);
++		}
+ 
+ 		spin_lock_irq(&dev->power.lock);
+ 	}
+diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c
+index ef2a974a2f105..75bc401fdd189 100644
+--- a/drivers/counter/stm32-timer-cnt.c
++++ b/drivers/counter/stm32-timer-cnt.c
+@@ -31,7 +31,7 @@ struct stm32_timer_cnt {
+ 	struct counter_device counter;
+ 	struct regmap *regmap;
+ 	struct clk *clk;
+-	u32 ceiling;
++	u32 max_arr;
+ 	bool enabled;
+ 	struct stm32_timer_regs bak;
+ };
+@@ -44,13 +44,14 @@ struct stm32_timer_cnt {
+  * @STM32_COUNT_ENCODER_MODE_3: counts on both TI1FP1 and TI2FP2 edges
+  */
+ enum stm32_count_function {
+-	STM32_COUNT_SLAVE_MODE_DISABLED = -1,
++	STM32_COUNT_SLAVE_MODE_DISABLED,
+ 	STM32_COUNT_ENCODER_MODE_1,
+ 	STM32_COUNT_ENCODER_MODE_2,
+ 	STM32_COUNT_ENCODER_MODE_3,
+ };
+ 
+ static enum counter_count_function stm32_count_functions[] = {
++	[STM32_COUNT_SLAVE_MODE_DISABLED] = COUNTER_COUNT_FUNCTION_INCREASE,
+ 	[STM32_COUNT_ENCODER_MODE_1] = COUNTER_COUNT_FUNCTION_QUADRATURE_X2_A,
+ 	[STM32_COUNT_ENCODER_MODE_2] = COUNTER_COUNT_FUNCTION_QUADRATURE_X2_B,
+ 	[STM32_COUNT_ENCODER_MODE_3] = COUNTER_COUNT_FUNCTION_QUADRATURE_X4,
+@@ -73,8 +74,10 @@ static int stm32_count_write(struct counter_device *counter,
+ 			     const unsigned long val)
+ {
+ 	struct stm32_timer_cnt *const priv = counter->priv;
++	u32 ceiling;
+ 
+-	if (val > priv->ceiling)
++	regmap_read(priv->regmap, TIM_ARR, &ceiling);
++	if (val > ceiling)
+ 		return -EINVAL;
+ 
+ 	return regmap_write(priv->regmap, TIM_CNT, val);
+@@ -90,6 +93,9 @@ static int stm32_count_function_get(struct counter_device *counter,
+ 	regmap_read(priv->regmap, TIM_SMCR, &smcr);
+ 
+ 	switch (smcr & TIM_SMCR_SMS) {
++	case 0:
++		*function = STM32_COUNT_SLAVE_MODE_DISABLED;
++		return 0;
+ 	case 1:
+ 		*function = STM32_COUNT_ENCODER_MODE_1;
+ 		return 0;
+@@ -99,9 +105,9 @@ static int stm32_count_function_get(struct counter_device *counter,
+ 	case 3:
+ 		*function = STM32_COUNT_ENCODER_MODE_3;
+ 		return 0;
++	default:
++		return -EINVAL;
+ 	}
+-
+-	return -EINVAL;
+ }
+ 
+ static int stm32_count_function_set(struct counter_device *counter,
+@@ -112,6 +118,9 @@ static int stm32_count_function_set(struct counter_device *counter,
+ 	u32 cr1, sms;
+ 
+ 	switch (function) {
++	case STM32_COUNT_SLAVE_MODE_DISABLED:
++		sms = 0;
++		break;
+ 	case STM32_COUNT_ENCODER_MODE_1:
+ 		sms = 1;
+ 		break;
+@@ -122,8 +131,7 @@ static int stm32_count_function_set(struct counter_device *counter,
+ 		sms = 3;
+ 		break;
+ 	default:
+-		sms = 0;
+-		break;
++		return -EINVAL;
+ 	}
+ 
+ 	/* Store enable status */
+@@ -131,10 +139,6 @@ static int stm32_count_function_set(struct counter_device *counter,
+ 
+ 	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
+ 
+-	/* TIMx_ARR register shouldn't be buffered (ARPE=0) */
+-	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0);
+-	regmap_write(priv->regmap, TIM_ARR, priv->ceiling);
+-
+ 	regmap_update_bits(priv->regmap, TIM_SMCR, TIM_SMCR_SMS, sms);
+ 
+ 	/* Make sure that registers are updated */
+@@ -185,11 +189,13 @@ static ssize_t stm32_count_ceiling_write(struct counter_device *counter,
+ 	if (ret)
+ 		return ret;
+ 
++	if (ceiling > priv->max_arr)
++		return -ERANGE;
++
+ 	/* TIMx_ARR register shouldn't be buffered (ARPE=0) */
+ 	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0);
+ 	regmap_write(priv->regmap, TIM_ARR, ceiling);
+ 
+-	priv->ceiling = ceiling;
+ 	return len;
+ }
+ 
+@@ -274,31 +280,36 @@ static int stm32_action_get(struct counter_device *counter,
+ 	size_t function;
+ 	int err;
+ 
+-	/* Default action mode (e.g. STM32_COUNT_SLAVE_MODE_DISABLED) */
+-	*action = STM32_SYNAPSE_ACTION_NONE;
+-
+ 	err = stm32_count_function_get(counter, count, &function);
+ 	if (err)
+-		return 0;
++		return err;
+ 
+ 	switch (function) {
++	case STM32_COUNT_SLAVE_MODE_DISABLED:
++		/* counts on internal clock when CEN=1 */
++		*action = STM32_SYNAPSE_ACTION_NONE;
++		return 0;
+ 	case STM32_COUNT_ENCODER_MODE_1:
+ 		/* counts up/down on TI1FP1 edge depending on TI2FP2 level */
+ 		if (synapse->signal->id == count->synapses[0].signal->id)
+ 			*action = STM32_SYNAPSE_ACTION_BOTH_EDGES;
+-		break;
++		else
++			*action = STM32_SYNAPSE_ACTION_NONE;
++		return 0;
+ 	case STM32_COUNT_ENCODER_MODE_2:
+ 		/* counts up/down on TI2FP2 edge depending on TI1FP1 level */
+ 		if (synapse->signal->id == count->synapses[1].signal->id)
+ 			*action = STM32_SYNAPSE_ACTION_BOTH_EDGES;
+-		break;
++		else
++			*action = STM32_SYNAPSE_ACTION_NONE;
++		return 0;
+ 	case STM32_COUNT_ENCODER_MODE_3:
+ 		/* counts up/down on both TI1FP1 and TI2FP2 edges */
+ 		*action = STM32_SYNAPSE_ACTION_BOTH_EDGES;
+-		break;
++		return 0;
++	default:
++		return -EINVAL;
+ 	}
+-
+-	return 0;
+ }
+ 
+ static const struct counter_ops stm32_timer_cnt_ops = {
+@@ -359,7 +370,7 @@ static int stm32_timer_cnt_probe(struct platform_device *pdev)
+ 
+ 	priv->regmap = ddata->regmap;
+ 	priv->clk = ddata->clk;
+-	priv->ceiling = ddata->max_arr;
++	priv->max_arr = ddata->max_arr;
+ 
+ 	priv->counter.name = dev_name(dev);
+ 	priv->counter.parent = dev;
+diff --git a/drivers/firmware/efi/efi.c b/drivers/firmware/efi/efi.c
+index df3f9bcab581c..4b7ee3fa9224f 100644
+--- a/drivers/firmware/efi/efi.c
++++ b/drivers/firmware/efi/efi.c
+@@ -927,7 +927,7 @@ int __ref efi_mem_reserve_persistent(phys_addr_t addr, u64 size)
+ 	}
+ 
+ 	/* first try to find a slot in an existing linked list entry */
+-	for (prsv = efi_memreserve_root->next; prsv; prsv = rsv->next) {
++	for (prsv = efi_memreserve_root->next; prsv; ) {
+ 		rsv = memremap(prsv, sizeof(*rsv), MEMREMAP_WB);
+ 		index = atomic_fetch_add_unless(&rsv->count, 1, rsv->size);
+ 		if (index < rsv->size) {
+@@ -937,6 +937,7 @@ int __ref efi_mem_reserve_persistent(phys_addr_t addr, u64 size)
+ 			memunmap(rsv);
+ 			return efi_mem_reserve_iomem(addr, size);
+ 		}
++		prsv = rsv->next;
+ 		memunmap(rsv);
+ 	}
+ 
+diff --git a/drivers/firmware/efi/vars.c b/drivers/firmware/efi/vars.c
+index 41c1d00bf933c..abdc8a6a39631 100644
+--- a/drivers/firmware/efi/vars.c
++++ b/drivers/firmware/efi/vars.c
+@@ -484,6 +484,10 @@ int efivar_init(int (*func)(efi_char16_t *, efi_guid_t, unsigned long, void *),
+ 				}
+ 			}
+ 
++			break;
++		case EFI_UNSUPPORTED:
++			err = -EOPNOTSUPP;
++			status = EFI_NOT_FOUND;
+ 			break;
+ 		case EFI_NOT_FOUND:
+ 			break;
+diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
+index 7f557ea905424..0a2c4adcd833c 100644
+--- a/drivers/gpio/gpiolib.c
++++ b/drivers/gpio/gpiolib.c
+@@ -572,6 +572,7 @@ int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
+ 			       struct lock_class_key *lock_key,
+ 			       struct lock_class_key *request_key)
+ {
++	struct fwnode_handle *fwnode = gc->parent ? dev_fwnode(gc->parent) : NULL;
+ 	unsigned long	flags;
+ 	int		ret = 0;
+ 	unsigned	i;
+@@ -601,6 +602,12 @@ int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
+ 		gc->of_node = gdev->dev.of_node;
+ #endif
+ 
++	/*
++	 * Assign fwnode depending on the result of the previous calls,
++	 * if none of them succeed, assign it to the parent's one.
++	 */
++	gdev->dev.fwnode = dev_fwnode(&gdev->dev) ?: fwnode;
++
+ 	gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
+ 	if (gdev->id < 0) {
+ 		ret = gdev->id;
+diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+index ea1ea147f6073..c07737c456776 100644
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+@@ -1902,6 +1902,33 @@ cleanup:
+ 	return;
+ }
+ 
++static void dm_set_dpms_off(struct dc_link *link)
++{
++	struct dc_stream_state *stream_state;
++	struct amdgpu_dm_connector *aconnector = link->priv;
++	struct amdgpu_device *adev = drm_to_adev(aconnector->base.dev);
++	struct dc_stream_update stream_update;
++	bool dpms_off = true;
++
++	memset(&stream_update, 0, sizeof(stream_update));
++	stream_update.dpms_off = &dpms_off;
++
++	mutex_lock(&adev->dm.dc_lock);
++	stream_state = dc_stream_find_from_link(link);
++
++	if (stream_state == NULL) {
++		DRM_DEBUG_DRIVER("Error finding stream state associated with link!\n");
++		mutex_unlock(&adev->dm.dc_lock);
++		return;
++	}
++
++	stream_update.stream = stream_state;
++	dc_commit_updates_for_stream(stream_state->ctx->dc, NULL, 0,
++				     stream_state, &stream_update,
++				     stream_state->ctx->dc->current_state);
++	mutex_unlock(&adev->dm.dc_lock);
++}
++
+ static int dm_resume(void *handle)
+ {
+ 	struct amdgpu_device *adev = handle;
+@@ -2353,8 +2380,11 @@ static void handle_hpd_irq(void *param)
+ 			drm_kms_helper_hotplug_event(dev);
+ 
+ 	} else if (dc_link_detect(aconnector->dc_link, DETECT_REASON_HPD)) {
+-		amdgpu_dm_update_connector_after_detect(aconnector);
++		if (new_connection_type == dc_connection_none &&
++		    aconnector->dc_link->type == dc_connection_none)
++			dm_set_dpms_off(aconnector->dc_link);
+ 
++		amdgpu_dm_update_connector_after_detect(aconnector);
+ 
+ 		drm_modeset_lock_all(dev);
+ 		dm_restore_drm_connector_state(dev, connector);
+diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
+index 45ad05f6e03b9..ffb21196bf599 100644
+--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
++++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
+@@ -2767,6 +2767,19 @@ struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i)
+ 	return NULL;
+ }
+ 
++struct dc_stream_state *dc_stream_find_from_link(const struct dc_link *link)
++{
++	uint8_t i;
++	struct dc_context *ctx = link->ctx;
++
++	for (i = 0; i < ctx->dc->current_state->stream_count; i++) {
++		if (ctx->dc->current_state->streams[i]->link == link)
++			return ctx->dc->current_state->streams[i];
++	}
++
++	return NULL;
++}
++
+ enum dc_irq_source dc_interrupt_to_irq_source(
+ 		struct dc *dc,
+ 		uint32_t src_id,
+diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h
+index c246af7c584b0..205bedd1b1966 100644
+--- a/drivers/gpu/drm/amd/display/dc/dc_stream.h
++++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h
+@@ -297,6 +297,7 @@ void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream);
+ 
+ uint8_t dc_get_current_stream_count(struct dc *dc);
+ struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i);
++struct dc_stream_state *dc_stream_find_from_link(const struct dc_link *link);
+ 
+ /*
+  * Return the current frame counter.
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c
+index 41a1d0e9b7e20..e0df9b0065f9c 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c
+@@ -113,6 +113,7 @@ bool cm3_helper_translate_curve_to_hw_format(
+ 	struct pwl_result_data *rgb_resulted;
+ 	struct pwl_result_data *rgb;
+ 	struct pwl_result_data *rgb_plus_1;
++	struct pwl_result_data *rgb_minus_1;
+ 	struct fixed31_32 end_value;
+ 
+ 	int32_t region_start, region_end;
+@@ -140,7 +141,7 @@ bool cm3_helper_translate_curve_to_hw_format(
+ 		region_start = -MAX_LOW_POINT;
+ 		region_end   = NUMBER_REGIONS - MAX_LOW_POINT;
+ 	} else {
+-		/* 10 segments
++		/* 11 segments
+ 		 * segment is from 2^-10 to 2^0
+ 		 * There are less than 256 points, for optimization
+ 		 */
+@@ -154,9 +155,10 @@ bool cm3_helper_translate_curve_to_hw_format(
+ 		seg_distr[7] = 4;
+ 		seg_distr[8] = 4;
+ 		seg_distr[9] = 4;
++		seg_distr[10] = 1;
+ 
+ 		region_start = -10;
+-		region_end = 0;
++		region_end = 1;
+ 	}
+ 
+ 	for (i = region_end - region_start; i < MAX_REGIONS_NUMBER ; i++)
+@@ -189,6 +191,10 @@ bool cm3_helper_translate_curve_to_hw_format(
+ 	rgb_resulted[hw_points - 1].green = output_tf->tf_pts.green[start_index];
+ 	rgb_resulted[hw_points - 1].blue = output_tf->tf_pts.blue[start_index];
+ 
++	rgb_resulted[hw_points].red = rgb_resulted[hw_points - 1].red;
++	rgb_resulted[hw_points].green = rgb_resulted[hw_points - 1].green;
++	rgb_resulted[hw_points].blue = rgb_resulted[hw_points - 1].blue;
++
+ 	// All 3 color channels have same x
+ 	corner_points[0].red.x = dc_fixpt_pow(dc_fixpt_from_int(2),
+ 					     dc_fixpt_from_int(region_start));
+@@ -259,15 +265,18 @@ bool cm3_helper_translate_curve_to_hw_format(
+ 
+ 	rgb = rgb_resulted;
+ 	rgb_plus_1 = rgb_resulted + 1;
++	rgb_minus_1 = rgb;
+ 
+ 	i = 1;
+ 	while (i != hw_points + 1) {
+-		if (dc_fixpt_lt(rgb_plus_1->red, rgb->red))
+-			rgb_plus_1->red = rgb->red;
+-		if (dc_fixpt_lt(rgb_plus_1->green, rgb->green))
+-			rgb_plus_1->green = rgb->green;
+-		if (dc_fixpt_lt(rgb_plus_1->blue, rgb->blue))
+-			rgb_plus_1->blue = rgb->blue;
++		if (i >= hw_points - 1) {
++			if (dc_fixpt_lt(rgb_plus_1->red, rgb->red))
++				rgb_plus_1->red = dc_fixpt_add(rgb->red, rgb_minus_1->delta_red);
++			if (dc_fixpt_lt(rgb_plus_1->green, rgb->green))
++				rgb_plus_1->green = dc_fixpt_add(rgb->green, rgb_minus_1->delta_green);
++			if (dc_fixpt_lt(rgb_plus_1->blue, rgb->blue))
++				rgb_plus_1->blue = dc_fixpt_add(rgb->blue, rgb_minus_1->delta_blue);
++		}
+ 
+ 		rgb->delta_red   = dc_fixpt_sub(rgb_plus_1->red,   rgb->red);
+ 		rgb->delta_green = dc_fixpt_sub(rgb_plus_1->green, rgb->green);
+@@ -283,6 +292,7 @@ bool cm3_helper_translate_curve_to_hw_format(
+ 		}
+ 
+ 		++rgb_plus_1;
++		rgb_minus_1 = rgb;
+ 		++rgb;
+ 		++i;
+ 	}
+diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+index 35629140fc7aa..c5223a9e0d891 100644
+--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
++++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+@@ -4771,6 +4771,72 @@ static int smu7_get_clock_by_type(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type
+ 	return 0;
+ }
+ 
++static int smu7_get_sclks_with_latency(struct pp_hwmgr *hwmgr,
++				       struct pp_clock_levels_with_latency *clocks)
++{
++	struct phm_ppt_v1_information *table_info =
++			(struct phm_ppt_v1_information *)hwmgr->pptable;
++	struct phm_ppt_v1_clock_voltage_dependency_table *dep_sclk_table =
++			table_info->vdd_dep_on_sclk;
++	int i;
++
++	clocks->num_levels = 0;
++	for (i = 0; i < dep_sclk_table->count; i++) {
++		if (dep_sclk_table->entries[i].clk) {
++			clocks->data[clocks->num_levels].clocks_in_khz =
++				dep_sclk_table->entries[i].clk * 10;
++			clocks->num_levels++;
++		}
++	}
++
++	return 0;
++}
++
++static int smu7_get_mclks_with_latency(struct pp_hwmgr *hwmgr,
++				       struct pp_clock_levels_with_latency *clocks)
++{
++	struct phm_ppt_v1_information *table_info =
++			(struct phm_ppt_v1_information *)hwmgr->pptable;
++	struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table =
++			table_info->vdd_dep_on_mclk;
++	int i;
++
++	clocks->num_levels = 0;
++	for (i = 0; i < dep_mclk_table->count; i++) {
++		if (dep_mclk_table->entries[i].clk) {
++			clocks->data[clocks->num_levels].clocks_in_khz =
++					dep_mclk_table->entries[i].clk * 10;
++			clocks->data[clocks->num_levels].latency_in_us =
++					smu7_get_mem_latency(hwmgr, dep_mclk_table->entries[i].clk);
++			clocks->num_levels++;
++		}
++	}
++
++	return 0;
++}
++
++static int smu7_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr,
++					       enum amd_pp_clock_type type,
++					       struct pp_clock_levels_with_latency *clocks)
++{
++	if (!(hwmgr->chip_id >= CHIP_POLARIS10 &&
++	      hwmgr->chip_id <= CHIP_VEGAM))
++		return -EINVAL;
++
++	switch (type) {
++	case amd_pp_sys_clock:
++		smu7_get_sclks_with_latency(hwmgr, clocks);
++		break;
++	case amd_pp_mem_clock:
++		smu7_get_mclks_with_latency(hwmgr, clocks);
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	return 0;
++}
++
+ static int smu7_notify_cac_buffer_info(struct pp_hwmgr *hwmgr,
+ 					uint32_t virtual_addr_low,
+ 					uint32_t virtual_addr_hi,
+@@ -5188,6 +5254,7 @@ static const struct pp_hwmgr_func smu7_hwmgr_funcs = {
+ 	.get_mclk_od = smu7_get_mclk_od,
+ 	.set_mclk_od = smu7_set_mclk_od,
+ 	.get_clock_by_type = smu7_get_clock_by_type,
++	.get_clock_by_type_with_latency = smu7_get_clock_by_type_with_latency,
+ 	.read_sensor = smu7_read_sensor,
+ 	.dynamic_state_management_disable = smu7_disable_dpm_tasks,
+ 	.avfs_control = smu7_avfs_control,
+diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
+index 3640d0e229d22..74e66dea57086 100644
+--- a/drivers/gpu/drm/i915/i915_perf.c
++++ b/drivers/gpu/drm/i915/i915_perf.c
+@@ -600,7 +600,6 @@ static int append_oa_sample(struct i915_perf_stream *stream,
+ {
+ 	int report_size = stream->oa_buffer.format_size;
+ 	struct drm_i915_perf_record_header header;
+-	u32 sample_flags = stream->sample_flags;
+ 
+ 	header.type = DRM_I915_PERF_RECORD_SAMPLE;
+ 	header.pad = 0;
+@@ -614,10 +613,8 @@ static int append_oa_sample(struct i915_perf_stream *stream,
+ 		return -EFAULT;
+ 	buf += sizeof(header);
+ 
+-	if (sample_flags & SAMPLE_OA_REPORT) {
+-		if (copy_to_user(buf, report, report_size))
+-			return -EFAULT;
+-	}
++	if (copy_to_user(buf, report, report_size))
++		return -EFAULT;
+ 
+ 	(*offset) += header.size;
+ 
+@@ -2676,7 +2673,7 @@ static void i915_oa_stream_enable(struct i915_perf_stream *stream)
+ 
+ 	stream->perf->ops.oa_enable(stream);
+ 
+-	if (stream->periodic)
++	if (stream->sample_flags & SAMPLE_OA_REPORT)
+ 		hrtimer_start(&stream->poll_check_timer,
+ 			      ns_to_ktime(stream->poll_oa_period),
+ 			      HRTIMER_MODE_REL_PINNED);
+@@ -2739,7 +2736,7 @@ static void i915_oa_stream_disable(struct i915_perf_stream *stream)
+ {
+ 	stream->perf->ops.oa_disable(stream);
+ 
+-	if (stream->periodic)
++	if (stream->sample_flags & SAMPLE_OA_REPORT)
+ 		hrtimer_cancel(&stream->poll_check_timer);
+ }
+ 
+@@ -3022,7 +3019,7 @@ static ssize_t i915_perf_read(struct file *file,
+ 	 * disabled stream as an error. In particular it might otherwise lead
+ 	 * to a deadlock for blocking file descriptors...
+ 	 */
+-	if (!stream->enabled)
++	if (!stream->enabled || !(stream->sample_flags & SAMPLE_OA_REPORT))
+ 		return -EIO;
+ 
+ 	if (!(file->f_flags & O_NONBLOCK)) {
+diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
+index 17e9ceb9c6c48..86fda6182543b 100644
+--- a/drivers/iio/adc/Kconfig
++++ b/drivers/iio/adc/Kconfig
+@@ -266,6 +266,8 @@ config ADI_AXI_ADC
+ 	select IIO_BUFFER
+ 	select IIO_BUFFER_HW_CONSUMER
+ 	select IIO_BUFFER_DMAENGINE
++	depends on HAS_IOMEM
++	depends on OF
+ 	help
+ 	  Say yes here to build support for Analog Devices Generic
+ 	  AXI ADC IP core. The IP core is used for interfacing with
+@@ -912,6 +914,7 @@ config STM32_ADC_CORE
+ 	depends on ARCH_STM32 || COMPILE_TEST
+ 	depends on OF
+ 	depends on REGULATOR
++	depends on HAS_IOMEM
+ 	select IIO_BUFFER
+ 	select MFD_STM32_TIMERS
+ 	select IIO_STM32_TIMER_TRIGGER
+diff --git a/drivers/iio/adc/ab8500-gpadc.c b/drivers/iio/adc/ab8500-gpadc.c
+index 1bb987a4acbab..8d81505282dd3 100644
+--- a/drivers/iio/adc/ab8500-gpadc.c
++++ b/drivers/iio/adc/ab8500-gpadc.c
+@@ -918,7 +918,7 @@ static int ab8500_gpadc_read_raw(struct iio_dev *indio_dev,
+ 			return processed;
+ 
+ 		/* Return millivolt or milliamps or millicentigrades */
+-		*val = processed * 1000;
++		*val = processed;
+ 		return IIO_VAL_INT;
+ 	}
+ 
+diff --git a/drivers/iio/adc/ad7949.c b/drivers/iio/adc/ad7949.c
+index 5d597e5050f68..1b4b3203e4285 100644
+--- a/drivers/iio/adc/ad7949.c
++++ b/drivers/iio/adc/ad7949.c
+@@ -91,7 +91,7 @@ static int ad7949_spi_read_channel(struct ad7949_adc_chip *ad7949_adc, int *val,
+ 	int ret;
+ 	int i;
+ 	int bits_per_word = ad7949_adc->resolution;
+-	int mask = GENMASK(ad7949_adc->resolution, 0);
++	int mask = GENMASK(ad7949_adc->resolution - 1, 0);
+ 	struct spi_message msg;
+ 	struct spi_transfer tx[] = {
+ 		{
+diff --git a/drivers/iio/adc/qcom-spmi-vadc.c b/drivers/iio/adc/qcom-spmi-vadc.c
+index b0388f8a69f42..7e7d408452eca 100644
+--- a/drivers/iio/adc/qcom-spmi-vadc.c
++++ b/drivers/iio/adc/qcom-spmi-vadc.c
+@@ -598,7 +598,7 @@ static const struct vadc_channels vadc_chans[] = {
+ 	VADC_CHAN_NO_SCALE(P_MUX16_1_3, 1)
+ 
+ 	VADC_CHAN_NO_SCALE(LR_MUX1_BAT_THERM, 0)
+-	VADC_CHAN_NO_SCALE(LR_MUX2_BAT_ID, 0)
++	VADC_CHAN_VOLT(LR_MUX2_BAT_ID, 0, SCALE_DEFAULT)
+ 	VADC_CHAN_NO_SCALE(LR_MUX3_XO_THERM, 0)
+ 	VADC_CHAN_NO_SCALE(LR_MUX4_AMUX_THM1, 0)
+ 	VADC_CHAN_NO_SCALE(LR_MUX5_AMUX_THM2, 0)
+diff --git a/drivers/iio/gyro/mpu3050-core.c b/drivers/iio/gyro/mpu3050-core.c
+index 00e58060968c9..8ea6c2aa6263d 100644
+--- a/drivers/iio/gyro/mpu3050-core.c
++++ b/drivers/iio/gyro/mpu3050-core.c
+@@ -550,6 +550,8 @@ static irqreturn_t mpu3050_trigger_handler(int irq, void *p)
+ 					       MPU3050_FIFO_R,
+ 					       &fifo_values[offset],
+ 					       toread);
++			if (ret)
++				goto out_trigger_unlock;
+ 
+ 			dev_dbg(mpu3050->dev,
+ 				"%04x %04x %04x %04x %04x\n",
+diff --git a/drivers/iio/humidity/hid-sensor-humidity.c b/drivers/iio/humidity/hid-sensor-humidity.c
+index 52f605114ef77..d62705448ae25 100644
+--- a/drivers/iio/humidity/hid-sensor-humidity.c
++++ b/drivers/iio/humidity/hid-sensor-humidity.c
+@@ -15,7 +15,10 @@
+ struct hid_humidity_state {
+ 	struct hid_sensor_common common_attributes;
+ 	struct hid_sensor_hub_attribute_info humidity_attr;
+-	s32 humidity_data;
++	struct {
++		s32 humidity_data;
++		u64 timestamp __aligned(8);
++	} scan;
+ 	int scale_pre_decml;
+ 	int scale_post_decml;
+ 	int scale_precision;
+@@ -125,9 +128,8 @@ static int humidity_proc_event(struct hid_sensor_hub_device *hsdev,
+ 	struct hid_humidity_state *humid_st = iio_priv(indio_dev);
+ 
+ 	if (atomic_read(&humid_st->common_attributes.data_ready))
+-		iio_push_to_buffers_with_timestamp(indio_dev,
+-					&humid_st->humidity_data,
+-					iio_get_time_ns(indio_dev));
++		iio_push_to_buffers_with_timestamp(indio_dev, &humid_st->scan,
++						   iio_get_time_ns(indio_dev));
+ 
+ 	return 0;
+ }
+@@ -142,7 +144,7 @@ static int humidity_capture_sample(struct hid_sensor_hub_device *hsdev,
+ 
+ 	switch (usage_id) {
+ 	case HID_USAGE_SENSOR_ATMOSPHERIC_HUMIDITY:
+-		humid_st->humidity_data = *(s32 *)raw_data;
++		humid_st->scan.humidity_data = *(s32 *)raw_data;
+ 
+ 		return 0;
+ 	default:
+diff --git a/drivers/iio/imu/adis16400.c b/drivers/iio/imu/adis16400.c
+index 54af2ed664f6f..785a4ce606d89 100644
+--- a/drivers/iio/imu/adis16400.c
++++ b/drivers/iio/imu/adis16400.c
+@@ -462,8 +462,7 @@ static int adis16400_initial_setup(struct iio_dev *indio_dev)
+ 		if (ret)
+ 			goto err_ret;
+ 
+-		ret = sscanf(indio_dev->name, "adis%u\n", &device_id);
+-		if (ret != 1) {
++		if (sscanf(indio_dev->name, "adis%u\n", &device_id) != 1) {
+ 			ret = -EINVAL;
+ 			goto err_ret;
+ 		}
+diff --git a/drivers/iio/light/hid-sensor-prox.c b/drivers/iio/light/hid-sensor-prox.c
+index 330cf359e0b81..e9e00ce0c6d4d 100644
+--- a/drivers/iio/light/hid-sensor-prox.c
++++ b/drivers/iio/light/hid-sensor-prox.c
+@@ -23,6 +23,9 @@ struct prox_state {
+ 	struct hid_sensor_common common_attributes;
+ 	struct hid_sensor_hub_attribute_info prox_attr;
+ 	u32 human_presence;
++	int scale_pre_decml;
++	int scale_post_decml;
++	int scale_precision;
+ };
+ 
+ /* Channel definitions */
+@@ -93,8 +96,9 @@ static int prox_read_raw(struct iio_dev *indio_dev,
+ 		ret_type = IIO_VAL_INT;
+ 		break;
+ 	case IIO_CHAN_INFO_SCALE:
+-		*val = prox_state->prox_attr.units;
+-		ret_type = IIO_VAL_INT;
++		*val = prox_state->scale_pre_decml;
++		*val2 = prox_state->scale_post_decml;
++		ret_type = prox_state->scale_precision;
+ 		break;
+ 	case IIO_CHAN_INFO_OFFSET:
+ 		*val = hid_sensor_convert_exponent(
+@@ -234,6 +238,11 @@ static int prox_parse_report(struct platform_device *pdev,
+ 			HID_USAGE_SENSOR_HUMAN_PRESENCE,
+ 			&st->common_attributes.sensitivity);
+ 
++	st->scale_precision = hid_sensor_format_scale(
++				hsdev->usage,
++				&st->prox_attr,
++				&st->scale_pre_decml, &st->scale_post_decml);
++
+ 	return ret;
+ }
+ 
+diff --git a/drivers/iio/temperature/hid-sensor-temperature.c b/drivers/iio/temperature/hid-sensor-temperature.c
+index 81688f1b932f1..da9a247097fa2 100644
+--- a/drivers/iio/temperature/hid-sensor-temperature.c
++++ b/drivers/iio/temperature/hid-sensor-temperature.c
+@@ -15,7 +15,10 @@
+ struct temperature_state {
+ 	struct hid_sensor_common common_attributes;
+ 	struct hid_sensor_hub_attribute_info temperature_attr;
+-	s32 temperature_data;
++	struct {
++		s32 temperature_data;
++		u64 timestamp __aligned(8);
++	} scan;
+ 	int scale_pre_decml;
+ 	int scale_post_decml;
+ 	int scale_precision;
+@@ -32,7 +35,7 @@ static const struct iio_chan_spec temperature_channels[] = {
+ 			BIT(IIO_CHAN_INFO_SAMP_FREQ) |
+ 			BIT(IIO_CHAN_INFO_HYSTERESIS),
+ 	},
+-	IIO_CHAN_SOFT_TIMESTAMP(3),
++	IIO_CHAN_SOFT_TIMESTAMP(1),
+ };
+ 
+ /* Adjust channel real bits based on report descriptor */
+@@ -123,9 +126,8 @@ static int temperature_proc_event(struct hid_sensor_hub_device *hsdev,
+ 	struct temperature_state *temp_st = iio_priv(indio_dev);
+ 
+ 	if (atomic_read(&temp_st->common_attributes.data_ready))
+-		iio_push_to_buffers_with_timestamp(indio_dev,
+-				&temp_st->temperature_data,
+-				iio_get_time_ns(indio_dev));
++		iio_push_to_buffers_with_timestamp(indio_dev, &temp_st->scan,
++						   iio_get_time_ns(indio_dev));
+ 
+ 	return 0;
+ }
+@@ -140,7 +142,7 @@ static int temperature_capture_sample(struct hid_sensor_hub_device *hsdev,
+ 
+ 	switch (usage_id) {
+ 	case HID_USAGE_SENSOR_DATA_ENVIRONMENTAL_TEMPERATURE:
+-		temp_st->temperature_data = *(s32 *)raw_data;
++		temp_st->scan.temperature_data = *(s32 *)raw_data;
+ 		return 0;
+ 	default:
+ 		return -EINVAL;
+diff --git a/drivers/infiniband/hw/mlx5/qp.c b/drivers/infiniband/hw/mlx5/qp.c
+index 600e056798c0a..75caeec378bda 100644
+--- a/drivers/infiniband/hw/mlx5/qp.c
++++ b/drivers/infiniband/hw/mlx5/qp.c
+@@ -2458,8 +2458,6 @@ static int check_qp_type(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr,
+ 	case MLX5_IB_QPT_HW_GSI:
+ 	case IB_QPT_DRIVER:
+ 	case IB_QPT_GSI:
+-		if (dev->profile == &raw_eth_profile)
+-			goto out;
+ 	case IB_QPT_RAW_PACKET:
+ 	case IB_QPT_UD:
+ 	case MLX5_IB_QPT_REG_UMR:
+@@ -2654,10 +2652,6 @@ static int process_create_flags(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
+ 	int create_flags = attr->create_flags;
+ 	bool cond;
+ 
+-	if (qp->type == IB_QPT_UD && dev->profile == &raw_eth_profile)
+-		if (create_flags & ~MLX5_IB_QP_CREATE_WC_TEST)
+-			return -EINVAL;
+-
+ 	if (qp_type == MLX5_IB_QPT_DCT)
+ 		return (create_flags) ? -EINVAL : 0;
+ 
+@@ -4235,6 +4229,23 @@ static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr,
+ 	return 0;
+ }
+ 
++static bool mlx5_ib_modify_qp_allowed(struct mlx5_ib_dev *dev,
++				      struct mlx5_ib_qp *qp,
++				      enum ib_qp_type qp_type)
++{
++	if (dev->profile != &raw_eth_profile)
++		return true;
++
++	if (qp_type == IB_QPT_RAW_PACKET || qp_type == MLX5_IB_QPT_REG_UMR)
++		return true;
++
++	/* Internal QP used for wc testing, with NOPs in wq */
++	if (qp->flags & MLX5_IB_QP_CREATE_WC_TEST)
++		return true;
++
++	return false;
++}
++
+ int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
+ 		      int attr_mask, struct ib_udata *udata)
+ {
+@@ -4247,6 +4258,9 @@ int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
+ 	int err = -EINVAL;
+ 	int port;
+ 
++	if (!mlx5_ib_modify_qp_allowed(dev, qp, ibqp->qp_type))
++		return -EOPNOTSUPP;
++
+ 	if (ibqp->rwq_ind_tbl)
+ 		return -ENOSYS;
+ 
+diff --git a/drivers/infiniband/ulp/rtrs/rtrs-clt.c b/drivers/infiniband/ulp/rtrs/rtrs-clt.c
+index 5c2107ce7f6e1..6eb95e3c4c8a4 100644
+--- a/drivers/infiniband/ulp/rtrs/rtrs-clt.c
++++ b/drivers/infiniband/ulp/rtrs/rtrs-clt.c
+@@ -1237,8 +1237,7 @@ static void free_sess_reqs(struct rtrs_clt_sess *sess)
+ 		if (req->mr)
+ 			ib_dereg_mr(req->mr);
+ 		kfree(req->sge);
+-		rtrs_iu_free(req->iu, DMA_TO_DEVICE,
+-			      sess->s.dev->ib_dev, 1);
++		rtrs_iu_free(req->iu, sess->s.dev->ib_dev, 1);
+ 	}
+ 	kfree(sess->reqs);
+ 	sess->reqs = NULL;
+@@ -1611,8 +1610,7 @@ static void destroy_con_cq_qp(struct rtrs_clt_con *con)
+ 
+ 	rtrs_cq_qp_destroy(&con->c);
+ 	if (con->rsp_ius) {
+-		rtrs_iu_free(con->rsp_ius, DMA_FROM_DEVICE,
+-			      sess->s.dev->ib_dev, con->queue_size);
++		rtrs_iu_free(con->rsp_ius, sess->s.dev->ib_dev, con->queue_size);
+ 		con->rsp_ius = NULL;
+ 		con->queue_size = 0;
+ 	}
+@@ -2252,7 +2250,7 @@ static void rtrs_clt_info_req_done(struct ib_cq *cq, struct ib_wc *wc)
+ 	struct rtrs_iu *iu;
+ 
+ 	iu = container_of(wc->wr_cqe, struct rtrs_iu, cqe);
+-	rtrs_iu_free(iu, DMA_TO_DEVICE, sess->s.dev->ib_dev, 1);
++	rtrs_iu_free(iu, sess->s.dev->ib_dev, 1);
+ 
+ 	if (unlikely(wc->status != IB_WC_SUCCESS)) {
+ 		rtrs_err(sess->clt, "Sess info request send failed: %s\n",
+@@ -2381,7 +2379,7 @@ static void rtrs_clt_info_rsp_done(struct ib_cq *cq, struct ib_wc *wc)
+ 
+ out:
+ 	rtrs_clt_update_wc_stats(con);
+-	rtrs_iu_free(iu, DMA_FROM_DEVICE, sess->s.dev->ib_dev, 1);
++	rtrs_iu_free(iu, sess->s.dev->ib_dev, 1);
+ 	rtrs_clt_change_state(sess, state);
+ }
+ 
+@@ -2443,9 +2441,9 @@ static int rtrs_send_sess_info(struct rtrs_clt_sess *sess)
+ 
+ out:
+ 	if (tx_iu)
+-		rtrs_iu_free(tx_iu, DMA_TO_DEVICE, sess->s.dev->ib_dev, 1);
++		rtrs_iu_free(tx_iu, sess->s.dev->ib_dev, 1);
+ 	if (rx_iu)
+-		rtrs_iu_free(rx_iu, DMA_FROM_DEVICE, sess->s.dev->ib_dev, 1);
++		rtrs_iu_free(rx_iu, sess->s.dev->ib_dev, 1);
+ 	if (unlikely(err))
+ 		/* If we've never taken async path because of malloc problems */
+ 		rtrs_clt_change_state(sess, RTRS_CLT_CONNECTING_ERR);
+diff --git a/drivers/infiniband/ulp/rtrs/rtrs-pri.h b/drivers/infiniband/ulp/rtrs/rtrs-pri.h
+index 2e1d2f7e372ac..8caad0a2322bf 100644
+--- a/drivers/infiniband/ulp/rtrs/rtrs-pri.h
++++ b/drivers/infiniband/ulp/rtrs/rtrs-pri.h
+@@ -289,8 +289,7 @@ struct rtrs_msg_rdma_hdr {
+ struct rtrs_iu *rtrs_iu_alloc(u32 queue_size, size_t size, gfp_t t,
+ 			      struct ib_device *dev, enum dma_data_direction,
+ 			      void (*done)(struct ib_cq *cq, struct ib_wc *wc));
+-void rtrs_iu_free(struct rtrs_iu *iu, enum dma_data_direction dir,
+-		  struct ib_device *dev, u32 queue_size);
++void rtrs_iu_free(struct rtrs_iu *iu, struct ib_device *dev, u32 queue_size);
+ int rtrs_iu_post_recv(struct rtrs_con *con, struct rtrs_iu *iu);
+ int rtrs_iu_post_send(struct rtrs_con *con, struct rtrs_iu *iu, size_t size,
+ 		      struct ib_send_wr *head);
+diff --git a/drivers/infiniband/ulp/rtrs/rtrs-srv.c b/drivers/infiniband/ulp/rtrs/rtrs-srv.c
+index b690a3b8f94d9..43806180f85ec 100644
+--- a/drivers/infiniband/ulp/rtrs/rtrs-srv.c
++++ b/drivers/infiniband/ulp/rtrs/rtrs-srv.c
+@@ -584,8 +584,7 @@ static void unmap_cont_bufs(struct rtrs_srv_sess *sess)
+ 		struct rtrs_srv_mr *srv_mr;
+ 
+ 		srv_mr = &sess->mrs[i];
+-		rtrs_iu_free(srv_mr->iu, DMA_TO_DEVICE,
+-			      sess->s.dev->ib_dev, 1);
++		rtrs_iu_free(srv_mr->iu, sess->s.dev->ib_dev, 1);
+ 		ib_dereg_mr(srv_mr->mr);
+ 		ib_dma_unmap_sg(sess->s.dev->ib_dev, srv_mr->sgt.sgl,
+ 				srv_mr->sgt.nents, DMA_BIDIRECTIONAL);
+@@ -672,7 +671,7 @@ static int map_cont_bufs(struct rtrs_srv_sess *sess)
+ 			if (!srv_mr->iu) {
+ 				err = -ENOMEM;
+ 				rtrs_err(ss, "rtrs_iu_alloc(), err: %d\n", err);
+-				goto free_iu;
++				goto dereg_mr;
+ 			}
+ 		}
+ 		/* Eventually dma addr for each chunk can be cached */
+@@ -688,9 +687,7 @@ err:
+ 			srv_mr = &sess->mrs[mri];
+ 			sgt = &srv_mr->sgt;
+ 			mr = srv_mr->mr;
+-free_iu:
+-			rtrs_iu_free(srv_mr->iu, DMA_TO_DEVICE,
+-				      sess->s.dev->ib_dev, 1);
++			rtrs_iu_free(srv_mr->iu, sess->s.dev->ib_dev, 1);
+ dereg_mr:
+ 			ib_dereg_mr(mr);
+ unmap_sg:
+@@ -742,7 +739,7 @@ static void rtrs_srv_info_rsp_done(struct ib_cq *cq, struct ib_wc *wc)
+ 	struct rtrs_iu *iu;
+ 
+ 	iu = container_of(wc->wr_cqe, struct rtrs_iu, cqe);
+-	rtrs_iu_free(iu, DMA_TO_DEVICE, sess->s.dev->ib_dev, 1);
++	rtrs_iu_free(iu, sess->s.dev->ib_dev, 1);
+ 
+ 	if (unlikely(wc->status != IB_WC_SUCCESS)) {
+ 		rtrs_err(s, "Sess info response send failed: %s\n",
+@@ -868,7 +865,7 @@ static int process_info_req(struct rtrs_srv_con *con,
+ 	if (unlikely(err)) {
+ 		rtrs_err(s, "rtrs_iu_post_send(), err: %d\n", err);
+ iu_free:
+-		rtrs_iu_free(tx_iu, DMA_TO_DEVICE, sess->s.dev->ib_dev, 1);
++		rtrs_iu_free(tx_iu, sess->s.dev->ib_dev, 1);
+ 	}
+ rwr_free:
+ 	kfree(rwr);
+@@ -913,7 +910,7 @@ static void rtrs_srv_info_req_done(struct ib_cq *cq, struct ib_wc *wc)
+ 		goto close;
+ 
+ out:
+-	rtrs_iu_free(iu, DMA_FROM_DEVICE, sess->s.dev->ib_dev, 1);
++	rtrs_iu_free(iu, sess->s.dev->ib_dev, 1);
+ 	return;
+ close:
+ 	close_sess(sess);
+@@ -936,7 +933,7 @@ static int post_recv_info_req(struct rtrs_srv_con *con)
+ 	err = rtrs_iu_post_recv(&con->c, rx_iu);
+ 	if (unlikely(err)) {
+ 		rtrs_err(s, "rtrs_iu_post_recv(), err: %d\n", err);
+-		rtrs_iu_free(rx_iu, DMA_FROM_DEVICE, sess->s.dev->ib_dev, 1);
++		rtrs_iu_free(rx_iu, sess->s.dev->ib_dev, 1);
+ 		return err;
+ 	}
+ 
+diff --git a/drivers/infiniband/ulp/rtrs/rtrs.c b/drivers/infiniband/ulp/rtrs/rtrs.c
+index a3e1a027f8081..d13aff0aa8165 100644
+--- a/drivers/infiniband/ulp/rtrs/rtrs.c
++++ b/drivers/infiniband/ulp/rtrs/rtrs.c
+@@ -31,6 +31,7 @@ struct rtrs_iu *rtrs_iu_alloc(u32 queue_size, size_t size, gfp_t gfp_mask,
+ 		return NULL;
+ 	for (i = 0; i < queue_size; i++) {
+ 		iu = &ius[i];
++		iu->direction = dir;
+ 		iu->buf = kzalloc(size, gfp_mask);
+ 		if (!iu->buf)
+ 			goto err;
+@@ -41,17 +42,15 @@ struct rtrs_iu *rtrs_iu_alloc(u32 queue_size, size_t size, gfp_t gfp_mask,
+ 
+ 		iu->cqe.done  = done;
+ 		iu->size      = size;
+-		iu->direction = dir;
+ 	}
+ 	return ius;
+ err:
+-	rtrs_iu_free(ius, dir, dma_dev, i);
++	rtrs_iu_free(ius, dma_dev, i);
+ 	return NULL;
+ }
+ EXPORT_SYMBOL_GPL(rtrs_iu_alloc);
+ 
+-void rtrs_iu_free(struct rtrs_iu *ius, enum dma_data_direction dir,
+-		   struct ib_device *ibdev, u32 queue_size)
++void rtrs_iu_free(struct rtrs_iu *ius, struct ib_device *ibdev, u32 queue_size)
+ {
+ 	struct rtrs_iu *iu;
+ 	int i;
+@@ -61,7 +60,7 @@ void rtrs_iu_free(struct rtrs_iu *ius, enum dma_data_direction dir,
+ 
+ 	for (i = 0; i < queue_size; i++) {
+ 		iu = &ius[i];
+-		ib_dma_unmap_single(ibdev, iu->dma_addr, iu->size, dir);
++		ib_dma_unmap_single(ibdev, iu->dma_addr, iu->size, iu->direction);
+ 		kfree(iu->buf);
+ 	}
+ 	kfree(ius);
+@@ -105,6 +104,22 @@ int rtrs_post_recv_empty(struct rtrs_con *con, struct ib_cqe *cqe)
+ }
+ EXPORT_SYMBOL_GPL(rtrs_post_recv_empty);
+ 
++static int rtrs_post_send(struct ib_qp *qp, struct ib_send_wr *head,
++			     struct ib_send_wr *wr)
++{
++	if (head) {
++		struct ib_send_wr *tail = head;
++
++		while (tail->next)
++			tail = tail->next;
++		tail->next = wr;
++	} else {
++		head = wr;
++	}
++
++	return ib_post_send(qp, head, NULL);
++}
++
+ int rtrs_iu_post_send(struct rtrs_con *con, struct rtrs_iu *iu, size_t size,
+ 		       struct ib_send_wr *head)
+ {
+@@ -127,17 +142,7 @@ int rtrs_iu_post_send(struct rtrs_con *con, struct rtrs_iu *iu, size_t size,
+ 		.send_flags = IB_SEND_SIGNALED,
+ 	};
+ 
+-	if (head) {
+-		struct ib_send_wr *tail = head;
+-
+-		while (tail->next)
+-			tail = tail->next;
+-		tail->next = &wr;
+-	} else {
+-		head = &wr;
+-	}
+-
+-	return ib_post_send(con->qp, head, NULL);
++	return rtrs_post_send(con->qp, head, &wr);
+ }
+ EXPORT_SYMBOL_GPL(rtrs_iu_post_send);
+ 
+@@ -169,17 +174,7 @@ int rtrs_iu_post_rdma_write_imm(struct rtrs_con *con, struct rtrs_iu *iu,
+ 		if (WARN_ON(sge[i].length == 0))
+ 			return -EINVAL;
+ 
+-	if (head) {
+-		struct ib_send_wr *tail = head;
+-
+-		while (tail->next)
+-			tail = tail->next;
+-		tail->next = &wr.wr;
+-	} else {
+-		head = &wr.wr;
+-	}
+-
+-	return ib_post_send(con->qp, head, NULL);
++	return rtrs_post_send(con->qp, head, &wr.wr);
+ }
+ EXPORT_SYMBOL_GPL(rtrs_iu_post_rdma_write_imm);
+ 
+@@ -187,26 +182,16 @@ int rtrs_post_rdma_write_imm_empty(struct rtrs_con *con, struct ib_cqe *cqe,
+ 				    u32 imm_data, enum ib_send_flags flags,
+ 				    struct ib_send_wr *head)
+ {
+-	struct ib_send_wr wr;
++	struct ib_rdma_wr wr;
+ 
+-	wr = (struct ib_send_wr) {
+-		.wr_cqe	= cqe,
+-		.send_flags	= flags,
+-		.opcode	= IB_WR_RDMA_WRITE_WITH_IMM,
+-		.ex.imm_data	= cpu_to_be32(imm_data),
++	wr = (struct ib_rdma_wr) {
++		.wr.wr_cqe	= cqe,
++		.wr.send_flags	= flags,
++		.wr.opcode	= IB_WR_RDMA_WRITE_WITH_IMM,
++		.wr.ex.imm_data	= cpu_to_be32(imm_data),
+ 	};
+ 
+-	if (head) {
+-		struct ib_send_wr *tail = head;
+-
+-		while (tail->next)
+-			tail = tail->next;
+-		tail->next = &wr;
+-	} else {
+-		head = &wr;
+-	}
+-
+-	return ib_post_send(con->qp, head, NULL);
++	return rtrs_post_send(con->qp, head, &wr.wr);
+ }
+ EXPORT_SYMBOL_GPL(rtrs_post_rdma_write_imm_empty);
+ 
+diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
+index 47afc5938c26b..6d5a39af10978 100644
+--- a/drivers/net/bonding/bond_main.c
++++ b/drivers/net/bonding/bond_main.c
+@@ -3918,11 +3918,15 @@ static int bond_neigh_init(struct neighbour *n)
+ 
+ 	rcu_read_lock();
+ 	slave = bond_first_slave_rcu(bond);
+-	if (!slave)
++	if (!slave) {
++		ret = -EINVAL;
+ 		goto out;
++	}
+ 	slave_ops = slave->dev->netdev_ops;
+-	if (!slave_ops->ndo_neigh_setup)
++	if (!slave_ops->ndo_neigh_setup) {
++		ret = -EINVAL;
+ 		goto out;
++	}
+ 
+ 	/* TODO: find another way [1] to implement this.
+ 	 * Passing a zeroed structure is fragile,
+diff --git a/drivers/net/ethernet/ibm/ibmvnic.c b/drivers/net/ethernet/ibm/ibmvnic.c
+index f184f4a79cc39..4a4cb62b73320 100644
+--- a/drivers/net/ethernet/ibm/ibmvnic.c
++++ b/drivers/net/ethernet/ibm/ibmvnic.c
+@@ -409,6 +409,8 @@ static void replenish_pools(struct ibmvnic_adapter *adapter)
+ 		if (adapter->rx_pool[i].active)
+ 			replenish_rx_pool(adapter, &adapter->rx_pool[i]);
+ 	}
++
++	netdev_dbg(adapter->netdev, "Replenished %d pools\n", i);
+ }
+ 
+ static void release_stats_buffers(struct ibmvnic_adapter *adapter)
+@@ -914,6 +916,7 @@ static int ibmvnic_login(struct net_device *netdev)
+ 
+ 	__ibmvnic_set_mac(netdev, adapter->mac_addr);
+ 
++	netdev_dbg(netdev, "[S:%d] Login succeeded\n", adapter->state);
+ 	return 0;
+ }
+ 
+@@ -1343,6 +1346,10 @@ static int ibmvnic_close(struct net_device *netdev)
+ 	struct ibmvnic_adapter *adapter = netdev_priv(netdev);
+ 	int rc;
+ 
++	netdev_dbg(netdev, "[S:%d FOP:%d FRR:%d] Closing\n",
++		   adapter->state, adapter->failover_pending,
++		   adapter->force_reset_recovery);
++
+ 	/* If device failover is pending, just set device state and return.
+ 	 * Device operation will be handled by reset routine.
+ 	 */
+@@ -1937,8 +1944,10 @@ static int do_reset(struct ibmvnic_adapter *adapter,
+ 	struct net_device *netdev = adapter->netdev;
+ 	int i, rc;
+ 
+-	netdev_dbg(adapter->netdev, "Re-setting driver (%d)\n",
+-		   rwi->reset_reason);
++	netdev_dbg(adapter->netdev,
++		   "[S:%d FOP:%d] Reset reason %d, reset_state %d\n",
++		   adapter->state, adapter->failover_pending,
++		   rwi->reset_reason, reset_state);
+ 
+ 	rtnl_lock();
+ 	/*
+@@ -2097,6 +2106,8 @@ out:
+ 		adapter->state = reset_state;
+ 	rtnl_unlock();
+ 
++	netdev_dbg(adapter->netdev, "[S:%d FOP:%d] Reset done, rc %d\n",
++		   adapter->state, adapter->failover_pending, rc);
+ 	return rc;
+ }
+ 
+@@ -2166,6 +2177,8 @@ out:
+ 	/* restore adapter state if reset failed */
+ 	if (rc)
+ 		adapter->state = reset_state;
++	netdev_dbg(adapter->netdev, "[S:%d FOP:%d] Hard reset done, rc %d\n",
++		   adapter->state, adapter->failover_pending, rc);
+ 	return rc;
+ }
+ 
+@@ -2275,6 +2288,11 @@ static void __ibmvnic_reset(struct work_struct *work)
+ 	}
+ 
+ 	clear_bit_unlock(0, &adapter->resetting);
++
++	netdev_dbg(adapter->netdev,
++		   "[S:%d FRR:%d WFR:%d] Done processing resets\n",
++		   adapter->state, adapter->force_reset_recovery,
++		   adapter->wait_for_reset);
+ }
+ 
+ static void __ibmvnic_delayed_reset(struct work_struct *work)
+@@ -2295,6 +2313,8 @@ static int ibmvnic_reset(struct ibmvnic_adapter *adapter,
+ 	unsigned long flags;
+ 	int ret;
+ 
++	spin_lock_irqsave(&adapter->rwi_lock, flags);
++
+ 	/*
+ 	 * If failover is pending don't schedule any other reset.
+ 	 * Instead let the failover complete. If there is already a
+@@ -2315,13 +2335,11 @@ static int ibmvnic_reset(struct ibmvnic_adapter *adapter,
+ 		goto err;
+ 	}
+ 
+-	spin_lock_irqsave(&adapter->rwi_lock, flags);
+-
+ 	list_for_each(entry, &adapter->rwi_list) {
+ 		tmp = list_entry(entry, struct ibmvnic_rwi, list);
+ 		if (tmp->reset_reason == reason) {
+-			netdev_dbg(netdev, "Skipping matching reset\n");
+-			spin_unlock_irqrestore(&adapter->rwi_lock, flags);
++			netdev_dbg(netdev, "Skipping matching reset, reason=%d\n",
++				   reason);
+ 			ret = EBUSY;
+ 			goto err;
+ 		}
+@@ -2329,8 +2347,6 @@ static int ibmvnic_reset(struct ibmvnic_adapter *adapter,
+ 
+ 	rwi = kzalloc(sizeof(*rwi), GFP_ATOMIC);
+ 	if (!rwi) {
+-		spin_unlock_irqrestore(&adapter->rwi_lock, flags);
+-		ibmvnic_close(netdev);
+ 		ret = ENOMEM;
+ 		goto err;
+ 	}
+@@ -2343,12 +2359,17 @@ static int ibmvnic_reset(struct ibmvnic_adapter *adapter,
+ 	}
+ 	rwi->reset_reason = reason;
+ 	list_add_tail(&rwi->list, &adapter->rwi_list);
+-	spin_unlock_irqrestore(&adapter->rwi_lock, flags);
+ 	netdev_dbg(adapter->netdev, "Scheduling reset (reason %d)\n", reason);
+ 	schedule_work(&adapter->ibmvnic_reset);
+ 
+-	return 0;
++	ret = 0;
+ err:
++	/* ibmvnic_close() below can block, so drop the lock first */
++	spin_unlock_irqrestore(&adapter->rwi_lock, flags);
++
++	if (ret == ENOMEM)
++		ibmvnic_close(netdev);
++
+ 	return -ret;
+ }
+ 
+@@ -5359,7 +5380,18 @@ static int ibmvnic_remove(struct vio_dev *dev)
+ 	unsigned long flags;
+ 
+ 	spin_lock_irqsave(&adapter->state_lock, flags);
++
++	/* If ibmvnic_reset() is scheduling a reset, wait for it to
++	 * finish. Then, set the state to REMOVING to prevent it from
++	 * scheduling any more work and to have reset functions ignore
++	 * any resets that have already been scheduled. Drop the lock
++	 * after setting state, so __ibmvnic_reset() which is called
++	 * from the flush_work() below, can make progress.
++	 */
++	spin_lock(&adapter->rwi_lock);
+ 	adapter->state = VNIC_REMOVING;
++	spin_unlock(&adapter->rwi_lock);
++
+ 	spin_unlock_irqrestore(&adapter->state_lock, flags);
+ 
+ 	flush_work(&adapter->ibmvnic_reset);
+diff --git a/drivers/net/ethernet/ibm/ibmvnic.h b/drivers/net/ethernet/ibm/ibmvnic.h
+index 21e7ea858cda3..b27211063c643 100644
+--- a/drivers/net/ethernet/ibm/ibmvnic.h
++++ b/drivers/net/ethernet/ibm/ibmvnic.h
+@@ -1080,6 +1080,7 @@ struct ibmvnic_adapter {
+ 	struct tasklet_struct tasklet;
+ 	enum vnic_state state;
+ 	enum ibmvnic_reset_reason reset_reason;
++	/* when taking both state and rwi locks, take state lock first */
+ 	spinlock_t rwi_lock;
+ 	struct list_head rwi_list;
+ 	struct work_struct ibmvnic_reset;
+@@ -1096,6 +1097,8 @@ struct ibmvnic_adapter {
+ 	struct ibmvnic_tunables desired;
+ 	struct ibmvnic_tunables fallback;
+ 
+-	/* Used for serializatin of state field */
++	/* Used for serialization of state field. When taking both state
++	 * and rwi locks, take state lock first.
++	 */
+ 	spinlock_t state_lock;
+ };
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c
+index 3e4a4d6f0419c..4a2d03cada01e 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
+@@ -5920,7 +5920,7 @@ static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,
+ 	ch->enabled_tc = !i40e_is_channel_macvlan(ch) && enabled_tc;
+ 	ch->seid = ctxt.seid;
+ 	ch->vsi_number = ctxt.vsi_number;
+-	ch->stat_counter_idx = cpu_to_le16(ctxt.info.stat_counter_idx);
++	ch->stat_counter_idx = le16_to_cpu(ctxt.info.stat_counter_idx);
+ 
+ 	/* copy just the sections touched not the entire info
+ 	 * since not all sections are valid as returned by
+@@ -7599,8 +7599,8 @@ static inline void
+ i40e_set_cld_element(struct i40e_cloud_filter *filter,
+ 		     struct i40e_aqc_cloud_filters_element_data *cld)
+ {
+-	int i, j;
+ 	u32 ipa;
++	int i;
+ 
+ 	memset(cld, 0, sizeof(*cld));
+ 	ether_addr_copy(cld->outer_mac, filter->dst_mac);
+@@ -7611,14 +7611,14 @@ i40e_set_cld_element(struct i40e_cloud_filter *filter,
+ 
+ 	if (filter->n_proto == ETH_P_IPV6) {
+ #define IPV6_MAX_INDEX	(ARRAY_SIZE(filter->dst_ipv6) - 1)
+-		for (i = 0, j = 0; i < ARRAY_SIZE(filter->dst_ipv6);
+-		     i++, j += 2) {
++		for (i = 0; i < ARRAY_SIZE(filter->dst_ipv6); i++) {
+ 			ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]);
+-			ipa = cpu_to_le32(ipa);
+-			memcpy(&cld->ipaddr.raw_v6.data[j], &ipa, sizeof(ipa));
++
++			*(__le32 *)&cld->ipaddr.raw_v6.data[i * 2] = cpu_to_le32(ipa);
+ 		}
+ 	} else {
+ 		ipa = be32_to_cpu(filter->dst_ipv4);
++
+ 		memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa));
+ 	}
+ 
+diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethernet/intel/i40e/i40e_txrx.c
+index 38dec49ac64d2..899714243af7a 100644
+--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c
++++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c
+@@ -1782,7 +1782,7 @@ void i40e_process_skb_fields(struct i40e_ring *rx_ring,
+ 	skb_record_rx_queue(skb, rx_ring->queue_index);
+ 
+ 	if (qword & BIT(I40E_RX_DESC_STATUS_L2TAG1P_SHIFT)) {
+-		u16 vlan_tag = rx_desc->wb.qword0.lo_dword.l2tag1;
++		__le16 vlan_tag = rx_desc->wb.qword0.lo_dword.l2tag1;
+ 
+ 		__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
+ 				       le16_to_cpu(vlan_tag));
+diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
+index a7f74b3b97af5..47ae1d1723c54 100644
+--- a/drivers/net/phy/micrel.c
++++ b/drivers/net/phy/micrel.c
+@@ -1263,6 +1263,7 @@ static struct phy_driver ksphy_driver[] = {
+ 	.probe		= kszphy_probe,
+ 	.config_init	= ksz8081_config_init,
+ 	.ack_interrupt	= kszphy_ack_interrupt,
++	.soft_reset	= genphy_soft_reset,
+ 	.config_intr	= kszphy_config_intr,
+ 	.get_sset_count = kszphy_get_sset_count,
+ 	.get_strings	= kszphy_get_strings,
+diff --git a/drivers/net/wireless/intel/iwlwifi/cfg/22000.c b/drivers/net/wireless/intel/iwlwifi/cfg/22000.c
+index 92c50efd48fc3..39842bdef4b46 100644
+--- a/drivers/net/wireless/intel/iwlwifi/cfg/22000.c
++++ b/drivers/net/wireless/intel/iwlwifi/cfg/22000.c
+@@ -92,6 +92,7 @@
+ #define IWL_SNJ_A_HR_B_FW_PRE		"iwlwifi-SoSnj-a0-hr-b0-"
+ #define IWL_MA_A_GF_A_FW_PRE		"iwlwifi-ma-a0-gf-a0-"
+ #define IWL_MA_A_MR_A_FW_PRE		"iwlwifi-ma-a0-mr-a0-"
++#define IWL_SNJ_A_MR_A_FW_PRE		"iwlwifi-SoSnj-a0-mr-a0-"
+ 
+ #define IWL_QU_B_HR_B_MODULE_FIRMWARE(api) \
+ 	IWL_QU_B_HR_B_FW_PRE __stringify(api) ".ucode"
+@@ -127,6 +128,8 @@
+ 	IWL_MA_A_GF_A_FW_PRE __stringify(api) ".ucode"
+ #define IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(api) \
+ 	IWL_MA_A_MR_A_FW_PRE __stringify(api) ".ucode"
++#define IWL_SNJ_A_MR_A_MODULE_FIRMWARE(api) \
++	IWL_SNJ_A_MR_A_FW_PRE __stringify(api) ".ucode"
+ 
+ static const struct iwl_base_params iwl_22000_base_params = {
+ 	.eeprom_size = OTP_LOW_IMAGE_SIZE_32K,
+@@ -672,6 +675,13 @@ const struct iwl_cfg iwl_cfg_ma_a0_mr_a0 = {
+ 	.num_rbds = IWL_NUM_RBDS_AX210_HE,
+ };
+ 
++const struct iwl_cfg iwl_cfg_snj_a0_mr_a0 = {
++	.fw_name_pre = IWL_SNJ_A_MR_A_FW_PRE,
++	.uhb_supported = true,
++	IWL_DEVICE_AX210,
++	.num_rbds = IWL_NUM_RBDS_AX210_HE,
++};
++
+ MODULE_FIRMWARE(IWL_QU_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
+ MODULE_FIRMWARE(IWL_QNJ_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
+ MODULE_FIRMWARE(IWL_QU_C_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
+@@ -689,3 +699,4 @@ MODULE_FIRMWARE(IWL_SNJ_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
+ MODULE_FIRMWARE(IWL_SNJ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
+ MODULE_FIRMWARE(IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
+ MODULE_FIRMWARE(IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
++MODULE_FIRMWARE(IWL_SNJ_A_MR_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
+diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-config.h b/drivers/net/wireless/intel/iwlwifi/iwl-config.h
+index 9b91aa9b2e7f1..bd04e4fbbb8ab 100644
+--- a/drivers/net/wireless/intel/iwlwifi/iwl-config.h
++++ b/drivers/net/wireless/intel/iwlwifi/iwl-config.h
+@@ -472,6 +472,7 @@ struct iwl_cfg {
+ #define IWL_CFG_MAC_TYPE_QU		0x33
+ #define IWL_CFG_MAC_TYPE_QUZ		0x35
+ #define IWL_CFG_MAC_TYPE_QNJ		0x36
++#define IWL_CFG_MAC_TYPE_SNJ		0x42
+ #define IWL_CFG_MAC_TYPE_MA		0x44
+ 
+ #define IWL_CFG_RF_TYPE_TH		0x105
+@@ -656,6 +657,7 @@ extern const struct iwl_cfg iwlax211_cfg_snj_gf_a0;
+ extern const struct iwl_cfg iwlax201_cfg_snj_hr_b0;
+ extern const struct iwl_cfg iwl_cfg_ma_a0_gf_a0;
+ extern const struct iwl_cfg iwl_cfg_ma_a0_mr_a0;
++extern const struct iwl_cfg iwl_cfg_snj_a0_mr_a0;
+ #endif /* CONFIG_IWLMVM */
+ 
+ #endif /* __IWL_CONFIG_H__ */
+diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/drv.c b/drivers/net/wireless/intel/iwlwifi/pcie/drv.c
+index 2823a1e81656d..fa32f9045c0cb 100644
+--- a/drivers/net/wireless/intel/iwlwifi/pcie/drv.c
++++ b/drivers/net/wireless/intel/iwlwifi/pcie/drv.c
+@@ -1002,6 +1002,12 @@ static const struct iwl_dev_info iwl_dev_info_table[] = {
+ 		      IWL_CFG_RF_TYPE_MR, IWL_CFG_ANY,
+ 		      IWL_CFG_ANY, IWL_CFG_ANY,
+ 		      iwl_cfg_ma_a0_mr_a0, iwl_ma_name),
++	_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
++		      IWL_CFG_MAC_TYPE_SNJ, IWL_CFG_ANY,
++		      IWL_CFG_RF_TYPE_MR, IWL_CFG_ANY,
++		      IWL_CFG_ANY, IWL_CFG_ANY,
++		      iwl_cfg_snj_a0_mr_a0, iwl_ma_name),
++
+ 
+ #endif /* CONFIG_IWLMVM */
+ };
+diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c
+index e1e574ecf031b..de846aaa8728b 100644
+--- a/drivers/nvme/host/core.c
++++ b/drivers/nvme/host/core.c
+@@ -1894,30 +1894,18 @@ static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns)
+ 		blk_queue_max_write_zeroes_sectors(queue, UINT_MAX);
+ }
+ 
+-static void nvme_config_write_zeroes(struct gendisk *disk, struct nvme_ns *ns)
++/*
++ * Even though NVMe spec explicitly states that MDTS is not applicable to the
++ * write-zeroes, we are cautious and limit the size to the controllers
++ * max_hw_sectors value, which is based on the MDTS field and possibly other
++ * limiting factors.
++ */
++static void nvme_config_write_zeroes(struct request_queue *q,
++		struct nvme_ctrl *ctrl)
+ {
+-	u64 max_blocks;
+-
+-	if (!(ns->ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) ||
+-	    (ns->ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
+-		return;
+-	/*
+-	 * Even though NVMe spec explicitly states that MDTS is not
+-	 * applicable to the write-zeroes:- "The restriction does not apply to
+-	 * commands that do not transfer data between the host and the
+-	 * controller (e.g., Write Uncorrectable ro Write Zeroes command).".
+-	 * In order to be more cautious use controller's max_hw_sectors value
+-	 * to configure the maximum sectors for the write-zeroes which is
+-	 * configured based on the controller's MDTS field in the
+-	 * nvme_init_identify() if available.
+-	 */
+-	if (ns->ctrl->max_hw_sectors == UINT_MAX)
+-		max_blocks = (u64)USHRT_MAX + 1;
+-	else
+-		max_blocks = ns->ctrl->max_hw_sectors + 1;
+-
+-	blk_queue_max_write_zeroes_sectors(disk->queue,
+-					   nvme_lba_to_sect(ns, max_blocks));
++	if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) &&
++	    !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
++		blk_queue_max_write_zeroes_sectors(q, ctrl->max_hw_sectors);
+ }
+ 
+ static bool nvme_ns_ids_valid(struct nvme_ns_ids *ids)
+@@ -2089,7 +2077,7 @@ static void nvme_update_disk_info(struct gendisk *disk,
+ 	set_capacity_revalidate_and_notify(disk, capacity, false);
+ 
+ 	nvme_config_discard(disk, ns);
+-	nvme_config_write_zeroes(disk, ns);
++	nvme_config_write_zeroes(disk->queue, ns->ctrl);
+ 
+ 	if (id->nsattr & NVME_NS_ATTR_RO)
+ 		set_disk_ro(disk, true);
+diff --git a/drivers/nvme/host/rdma.c b/drivers/nvme/host/rdma.c
+index 1957030132722..8b326508a480e 100644
+--- a/drivers/nvme/host/rdma.c
++++ b/drivers/nvme/host/rdma.c
+@@ -736,8 +736,11 @@ static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl)
+ 		return ret;
+ 
+ 	ctrl->ctrl.queue_count = nr_io_queues + 1;
+-	if (ctrl->ctrl.queue_count < 2)
+-		return 0;
++	if (ctrl->ctrl.queue_count < 2) {
++		dev_err(ctrl->ctrl.device,
++			"unable to set any I/O queues\n");
++		return -ENOMEM;
++	}
+ 
+ 	dev_info(ctrl->ctrl.device,
+ 		"creating %d I/O queues.\n", nr_io_queues);
+diff --git a/drivers/nvme/host/tcp.c b/drivers/nvme/host/tcp.c
+index 739ac7deccd96..9444e5e2a95ba 100644
+--- a/drivers/nvme/host/tcp.c
++++ b/drivers/nvme/host/tcp.c
+@@ -287,7 +287,7 @@ static inline void nvme_tcp_queue_request(struct nvme_tcp_request *req,
+ 	 * directly, otherwise queue io_work. Also, only do that if we
+ 	 * are on the same cpu, so we don't introduce contention.
+ 	 */
+-	if (queue->io_cpu == __smp_processor_id() &&
++	if (queue->io_cpu == raw_smp_processor_id() &&
+ 	    sync && empty && mutex_trylock(&queue->send_mutex)) {
+ 		queue->more_requests = !last;
+ 		nvme_tcp_send_all(queue);
+@@ -568,6 +568,13 @@ static int nvme_tcp_setup_h2c_data_pdu(struct nvme_tcp_request *req,
+ 	req->pdu_len = le32_to_cpu(pdu->r2t_length);
+ 	req->pdu_sent = 0;
+ 
++	if (unlikely(!req->pdu_len)) {
++		dev_err(queue->ctrl->ctrl.device,
++			"req %d r2t len is %u, probably a bug...\n",
++			rq->tag, req->pdu_len);
++		return -EPROTO;
++	}
++
+ 	if (unlikely(req->data_sent + req->pdu_len > req->data_len)) {
+ 		dev_err(queue->ctrl->ctrl.device,
+ 			"req %d r2t len %u exceeded data len %u (%zu sent)\n",
+@@ -1748,8 +1755,11 @@ static int nvme_tcp_alloc_io_queues(struct nvme_ctrl *ctrl)
+ 		return ret;
+ 
+ 	ctrl->queue_count = nr_io_queues + 1;
+-	if (ctrl->queue_count < 2)
+-		return 0;
++	if (ctrl->queue_count < 2) {
++		dev_err(ctrl->device,
++			"unable to set any I/O queues\n");
++		return -ENOMEM;
++	}
+ 
+ 	dev_info(ctrl->device,
+ 		"creating %d I/O queues.\n", nr_io_queues);
+diff --git a/drivers/nvme/target/core.c b/drivers/nvme/target/core.c
+index 957b39a82431b..1e79d33c1df7e 100644
+--- a/drivers/nvme/target/core.c
++++ b/drivers/nvme/target/core.c
+@@ -1109,9 +1109,20 @@ static void nvmet_start_ctrl(struct nvmet_ctrl *ctrl)
+ {
+ 	lockdep_assert_held(&ctrl->lock);
+ 
+-	if (nvmet_cc_iosqes(ctrl->cc) != NVME_NVM_IOSQES ||
+-	    nvmet_cc_iocqes(ctrl->cc) != NVME_NVM_IOCQES ||
+-	    nvmet_cc_mps(ctrl->cc) != 0 ||
++	/*
++	 * Only I/O controllers should verify iosqes,iocqes.
++	 * Strictly speaking, the spec says a discovery controller
++	 * should verify iosqes,iocqes are zeroed, however that
++	 * would break backwards compatibility, so don't enforce it.
++	 */
++	if (ctrl->subsys->type != NVME_NQN_DISC &&
++	    (nvmet_cc_iosqes(ctrl->cc) != NVME_NVM_IOSQES ||
++	     nvmet_cc_iocqes(ctrl->cc) != NVME_NVM_IOCQES)) {
++		ctrl->csts = NVME_CSTS_CFS;
++		return;
++	}
++
++	if (nvmet_cc_mps(ctrl->cc) != 0 ||
+ 	    nvmet_cc_ams(ctrl->cc) != 0 ||
+ 	    nvmet_cc_css(ctrl->cc) != 0) {
+ 		ctrl->csts = NVME_CSTS_CFS;
+diff --git a/drivers/pci/hotplug/rpadlpar_sysfs.c b/drivers/pci/hotplug/rpadlpar_sysfs.c
+index cdbfa5df3a51f..dbfa0b55d31a5 100644
+--- a/drivers/pci/hotplug/rpadlpar_sysfs.c
++++ b/drivers/pci/hotplug/rpadlpar_sysfs.c
+@@ -34,12 +34,11 @@ static ssize_t add_slot_store(struct kobject *kobj, struct kobj_attribute *attr,
+ 	if (nbytes >= MAX_DRC_NAME_LEN)
+ 		return 0;
+ 
+-	memcpy(drc_name, buf, nbytes);
++	strscpy(drc_name, buf, nbytes + 1);
+ 
+ 	end = strchr(drc_name, '\n');
+-	if (!end)
+-		end = &drc_name[nbytes];
+-	*end = '\0';
++	if (end)
++		*end = '\0';
+ 
+ 	rc = dlpar_add_slot(drc_name);
+ 	if (rc)
+@@ -65,12 +64,11 @@ static ssize_t remove_slot_store(struct kobject *kobj,
+ 	if (nbytes >= MAX_DRC_NAME_LEN)
+ 		return 0;
+ 
+-	memcpy(drc_name, buf, nbytes);
++	strscpy(drc_name, buf, nbytes + 1);
+ 
+ 	end = strchr(drc_name, '\n');
+-	if (!end)
+-		end = &drc_name[nbytes];
+-	*end = '\0';
++	if (end)
++		*end = '\0';
+ 
+ 	rc = dlpar_remove_slot(drc_name);
+ 	if (rc)
+diff --git a/drivers/pci/hotplug/s390_pci_hpc.c b/drivers/pci/hotplug/s390_pci_hpc.c
+index c9e790c74051f..a047c421debe2 100644
+--- a/drivers/pci/hotplug/s390_pci_hpc.c
++++ b/drivers/pci/hotplug/s390_pci_hpc.c
+@@ -93,8 +93,9 @@ static int disable_slot(struct hotplug_slot *hotplug_slot)
+ 		pci_dev_put(pdev);
+ 		return -EBUSY;
+ 	}
++	pci_dev_put(pdev);
+ 
+-	zpci_remove_device(zdev);
++	zpci_remove_device(zdev, false);
+ 
+ 	rc = zpci_disable_device(zdev);
+ 	if (rc)
+diff --git a/drivers/regulator/pca9450-regulator.c b/drivers/regulator/pca9450-regulator.c
+index cb29421d745aa..d38109cc3a011 100644
+--- a/drivers/regulator/pca9450-regulator.c
++++ b/drivers/regulator/pca9450-regulator.c
+@@ -5,6 +5,7 @@
+  */
+ 
+ #include <linux/err.h>
++#include <linux/gpio/consumer.h>
+ #include <linux/i2c.h>
+ #include <linux/interrupt.h>
+ #include <linux/kernel.h>
+@@ -32,6 +33,7 @@ struct pca9450_regulator_desc {
+ struct pca9450 {
+ 	struct device *dev;
+ 	struct regmap *regmap;
++	struct gpio_desc *sd_vsel_gpio;
+ 	enum pca9450_chip_type type;
+ 	unsigned int rcnt;
+ 	int irq;
+@@ -795,6 +797,34 @@ static int pca9450_i2c_probe(struct i2c_client *i2c,
+ 		return ret;
+ 	}
+ 
++	/* Clear PRESET_EN bit in BUCK123_DVS to use DVS registers */
++	ret = regmap_clear_bits(pca9450->regmap, PCA9450_REG_BUCK123_DVS,
++				BUCK123_PRESET_EN);
++	if (ret) {
++		dev_err(&i2c->dev, "Failed to clear PRESET_EN bit: %d\n", ret);
++		return ret;
++	}
++
++	/* Set reset behavior on assertion of WDOG_B signal */
++	ret = regmap_update_bits(pca9450->regmap, PCA9450_REG_RESET_CTRL,
++				WDOG_B_CFG_MASK, WDOG_B_CFG_COLD_LDO12);
++	if (ret) {
++		dev_err(&i2c->dev, "Failed to set WDOG_B reset behavior\n");
++		return ret;
++	}
++
++	/*
++	 * The driver uses the LDO5CTRL_H register to control the LDO5 regulator.
++	 * This is only valid if the SD_VSEL input of the PMIC is high. Let's
++	 * check if the pin is available as GPIO and set it to high.
++	 */
++	pca9450->sd_vsel_gpio = gpiod_get_optional(pca9450->dev, "sd-vsel", GPIOD_OUT_HIGH);
++
++	if (IS_ERR(pca9450->sd_vsel_gpio)) {
++		dev_err(&i2c->dev, "Failed to get SD_VSEL GPIO\n");
++		return ret;
++	}
++
+ 	dev_info(&i2c->dev, "%s probed.\n",
+ 		type == PCA9450_TYPE_PCA9450A ? "pca9450a" : "pca9450bc");
+ 
+diff --git a/drivers/s390/net/qeth_core_main.c b/drivers/s390/net/qeth_core_main.c
+index 03f96177e58ee..4d51c4ace8ea3 100644
+--- a/drivers/s390/net/qeth_core_main.c
++++ b/drivers/s390/net/qeth_core_main.c
+@@ -470,6 +470,7 @@ static void qeth_qdio_handle_aob(struct qeth_card *card,
+ 	struct qaob *aob;
+ 	struct qeth_qdio_out_buffer *buffer;
+ 	enum iucv_tx_notify notification;
++	struct qeth_qdio_out_q *queue;
+ 	unsigned int i;
+ 
+ 	aob = (struct qaob *) phys_to_virt(phys_aob_addr);
+@@ -511,7 +512,9 @@ static void qeth_qdio_handle_aob(struct qeth_card *card,
+ 				kmem_cache_free(qeth_core_header_cache, data);
+ 		}
+ 
++		queue = buffer->q;
+ 		atomic_set(&buffer->state, QETH_QDIO_BUF_EMPTY);
++		napi_schedule(&queue->napi);
+ 		break;
+ 	default:
+ 		WARN_ON_ONCE(1);
+@@ -7013,9 +7016,7 @@ int qeth_open(struct net_device *dev)
+ 	card->data.state = CH_STATE_UP;
+ 	netif_tx_start_all_queues(dev);
+ 
+-	napi_enable(&card->napi);
+ 	local_bh_disable();
+-	napi_schedule(&card->napi);
+ 	if (IS_IQD(card)) {
+ 		struct qeth_qdio_out_q *queue;
+ 		unsigned int i;
+@@ -7027,8 +7028,12 @@ int qeth_open(struct net_device *dev)
+ 			napi_schedule(&queue->napi);
+ 		}
+ 	}
++
++	napi_enable(&card->napi);
++	napi_schedule(&card->napi);
+ 	/* kick-start the NAPI softirq: */
+ 	local_bh_enable();
++
+ 	return 0;
+ }
+ EXPORT_SYMBOL_GPL(qeth_open);
+@@ -7038,6 +7043,11 @@ int qeth_stop(struct net_device *dev)
+ 	struct qeth_card *card = dev->ml_priv;
+ 
+ 	QETH_CARD_TEXT(card, 4, "qethstop");
++
++	napi_disable(&card->napi);
++	cancel_delayed_work_sync(&card->buffer_reclaim_work);
++	qdio_stop_irq(CARD_DDEV(card));
++
+ 	if (IS_IQD(card)) {
+ 		struct qeth_qdio_out_q *queue;
+ 		unsigned int i;
+@@ -7058,10 +7068,6 @@ int qeth_stop(struct net_device *dev)
+ 		netif_tx_disable(dev);
+ 	}
+ 
+-	napi_disable(&card->napi);
+-	cancel_delayed_work_sync(&card->buffer_reclaim_work);
+-	qdio_stop_irq(CARD_DDEV(card));
+-
+ 	return 0;
+ }
+ EXPORT_SYMBOL_GPL(qeth_stop);
+diff --git a/drivers/scsi/aic94xx/aic94xx_scb.c b/drivers/scsi/aic94xx/aic94xx_scb.c
+index e2d880a5f3915..7b0566f6a97f2 100644
+--- a/drivers/scsi/aic94xx/aic94xx_scb.c
++++ b/drivers/scsi/aic94xx/aic94xx_scb.c
+@@ -68,7 +68,6 @@ static void asd_phy_event_tasklet(struct asd_ascb *ascb,
+ 					 struct done_list_struct *dl)
+ {
+ 	struct asd_ha_struct *asd_ha = ascb->ha;
+-	struct sas_ha_struct *sas_ha = &asd_ha->sas_ha;
+ 	int phy_id = dl->status_block[0] & DL_PHY_MASK;
+ 	struct asd_phy *phy = &asd_ha->phys[phy_id];
+ 
+@@ -81,7 +80,7 @@ static void asd_phy_event_tasklet(struct asd_ascb *ascb,
+ 		ASD_DPRINTK("phy%d: device unplugged\n", phy_id);
+ 		asd_turn_led(asd_ha, phy_id, 0);
+ 		sas_phy_disconnected(&phy->sas_phy);
+-		sas_ha->notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL);
++		sas_notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL);
+ 		break;
+ 	case CURRENT_OOB_DONE:
+ 		/* hot plugged device */
+@@ -89,12 +88,12 @@ static void asd_phy_event_tasklet(struct asd_ascb *ascb,
+ 		get_lrate_mode(phy, oob_mode);
+ 		ASD_DPRINTK("phy%d device plugged: lrate:0x%x, proto:0x%x\n",
+ 			    phy_id, phy->sas_phy.linkrate, phy->sas_phy.iproto);
+-		sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE);
++		sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE);
+ 		break;
+ 	case CURRENT_SPINUP_HOLD:
+ 		/* hot plug SATA, no COMWAKE sent */
+ 		asd_turn_led(asd_ha, phy_id, 1);
+-		sas_ha->notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD);
++		sas_notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD);
+ 		break;
+ 	case CURRENT_GTO_TIMEOUT:
+ 	case CURRENT_OOB_ERROR:
+@@ -102,7 +101,7 @@ static void asd_phy_event_tasklet(struct asd_ascb *ascb,
+ 			    dl->status_block[1]);
+ 		asd_turn_led(asd_ha, phy_id, 0);
+ 		sas_phy_disconnected(&phy->sas_phy);
+-		sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR);
++		sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR);
+ 		break;
+ 	}
+ }
+@@ -222,7 +221,6 @@ static void asd_bytes_dmaed_tasklet(struct asd_ascb *ascb,
+ 	int edb_el = edb_id + ascb->edb_index;
+ 	struct asd_dma_tok *edb = ascb->ha->seq.edb_arr[edb_el];
+ 	struct asd_phy *phy = &ascb->ha->phys[phy_id];
+-	struct sas_ha_struct *sas_ha = phy->sas_phy.ha;
+ 	u16 size = ((dl->status_block[3] & 7) << 8) | dl->status_block[2];
+ 
+ 	size = min(size, (u16) sizeof(phy->frame_rcvd));
+@@ -234,7 +232,7 @@ static void asd_bytes_dmaed_tasklet(struct asd_ascb *ascb,
+ 	spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags);
+ 	asd_dump_frame_rcvd(phy, dl);
+ 	asd_form_port(ascb->ha, phy);
+-	sas_ha->notify_port_event(&phy->sas_phy, PORTE_BYTES_DMAED);
++	sas_notify_port_event(&phy->sas_phy, PORTE_BYTES_DMAED);
+ }
+ 
+ static void asd_link_reset_err_tasklet(struct asd_ascb *ascb,
+@@ -270,7 +268,7 @@ static void asd_link_reset_err_tasklet(struct asd_ascb *ascb,
+ 	asd_turn_led(asd_ha, phy_id, 0);
+ 	sas_phy_disconnected(sas_phy);
+ 	asd_deform_port(asd_ha, phy);
+-	sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
++	sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
+ 
+ 	if (retries_left == 0) {
+ 		int num = 1;
+@@ -315,7 +313,7 @@ static void asd_primitive_rcvd_tasklet(struct asd_ascb *ascb,
+ 			spin_lock_irqsave(&sas_phy->sas_prim_lock, flags);
+ 			sas_phy->sas_prim = ffs(cont);
+ 			spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags);
+-			sas_ha->notify_port_event(sas_phy,PORTE_BROADCAST_RCVD);
++			sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
+ 			break;
+ 
+ 		case LmUNKNOWNP:
+@@ -336,7 +334,7 @@ static void asd_primitive_rcvd_tasklet(struct asd_ascb *ascb,
+ 			/* The sequencer disables all phys on that port.
+ 			 * We have to re-enable the phys ourselves. */
+ 			asd_deform_port(asd_ha, phy);
+-			sas_ha->notify_port_event(sas_phy, PORTE_HARD_RESET);
++			sas_notify_port_event(sas_phy, PORTE_HARD_RESET);
+ 			break;
+ 
+ 		default:
+@@ -567,7 +565,7 @@ static void escb_tasklet_complete(struct asd_ascb *ascb,
+ 		/* the device is gone */
+ 		sas_phy_disconnected(sas_phy);
+ 		asd_deform_port(asd_ha, phy);
+-		sas_ha->notify_port_event(sas_phy, PORTE_TIMER_EVENT);
++		sas_notify_port_event(sas_phy, PORTE_TIMER_EVENT);
+ 		break;
+ 	default:
+ 		ASD_DPRINTK("%s: phy%d: unknown event:0x%x\n", __func__,
+diff --git a/drivers/scsi/hisi_sas/hisi_sas_main.c b/drivers/scsi/hisi_sas/hisi_sas_main.c
+index 274ccf18ce2db..1feca45384c7a 100644
+--- a/drivers/scsi/hisi_sas/hisi_sas_main.c
++++ b/drivers/scsi/hisi_sas/hisi_sas_main.c
+@@ -622,7 +622,6 @@ static void hisi_sas_bytes_dmaed(struct hisi_hba *hisi_hba, int phy_no)
+ {
+ 	struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
+ 	struct asd_sas_phy *sas_phy = &phy->sas_phy;
+-	struct sas_ha_struct *sas_ha;
+ 
+ 	if (!phy->phy_attached)
+ 		return;
+@@ -633,8 +632,7 @@ static void hisi_sas_bytes_dmaed(struct hisi_hba *hisi_hba, int phy_no)
+ 		return;
+ 	}
+ 
+-	sas_ha = &hisi_hba->sha;
+-	sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE);
++	sas_notify_phy_event(sas_phy, PHYE_OOB_DONE);
+ 
+ 	if (sas_phy->phy) {
+ 		struct sas_phy *sphy = sas_phy->phy;
+@@ -662,7 +660,7 @@ static void hisi_sas_bytes_dmaed(struct hisi_hba *hisi_hba, int phy_no)
+ 	}
+ 
+ 	sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
+-	sas_ha->notify_port_event(sas_phy, PORTE_BYTES_DMAED);
++	sas_notify_port_event(sas_phy, PORTE_BYTES_DMAED);
+ }
+ 
+ static struct hisi_sas_device *hisi_sas_alloc_dev(struct domain_device *device)
+@@ -1417,7 +1415,6 @@ static void hisi_sas_refresh_port_id(struct hisi_hba *hisi_hba)
+ 
+ static void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 state)
+ {
+-	struct sas_ha_struct *sas_ha = &hisi_hba->sha;
+ 	struct asd_sas_port *_sas_port = NULL;
+ 	int phy_no;
+ 
+@@ -1438,7 +1435,7 @@ static void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 state)
+ 				_sas_port = sas_port;
+ 
+ 				if (dev_is_expander(dev->dev_type))
+-					sas_ha->notify_port_event(sas_phy,
++					sas_notify_port_event(sas_phy,
+ 							PORTE_BROADCAST_RCVD);
+ 			}
+ 		} else {
+@@ -2200,7 +2197,6 @@ void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy)
+ {
+ 	struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
+ 	struct asd_sas_phy *sas_phy = &phy->sas_phy;
+-	struct sas_ha_struct *sas_ha = &hisi_hba->sha;
+ 	struct device *dev = hisi_hba->dev;
+ 
+ 	if (rdy) {
+@@ -2216,7 +2212,7 @@ void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy)
+ 			return;
+ 		}
+ 		/* Phy down and not ready */
+-		sas_ha->notify_phy_event(sas_phy, PHYE_LOSS_OF_SIGNAL);
++		sas_notify_phy_event(sas_phy, PHYE_LOSS_OF_SIGNAL);
+ 		sas_phy_disconnected(sas_phy);
+ 
+ 		if (port) {
+diff --git a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
+index 45e866cb9164d..22eecc89d41bd 100644
+--- a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
++++ b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
+@@ -1408,7 +1408,6 @@ static irqreturn_t int_bcast_v1_hw(int irq, void *p)
+ 	struct hisi_sas_phy *phy = p;
+ 	struct hisi_hba *hisi_hba = phy->hisi_hba;
+ 	struct asd_sas_phy *sas_phy = &phy->sas_phy;
+-	struct sas_ha_struct *sha = &hisi_hba->sha;
+ 	struct device *dev = hisi_hba->dev;
+ 	int phy_no = sas_phy->id;
+ 	u32 irq_value;
+@@ -1424,7 +1423,7 @@ static irqreturn_t int_bcast_v1_hw(int irq, void *p)
+ 	}
+ 
+ 	if (!test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags))
+-		sha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
++		sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
+ 
+ end:
+ 	hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT2,
+diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
+index b57177b52facc..6ef8730c61a6e 100644
+--- a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
++++ b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
+@@ -2818,14 +2818,13 @@ static void phy_bcast_v2_hw(int phy_no, struct hisi_hba *hisi_hba)
+ {
+ 	struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
+ 	struct asd_sas_phy *sas_phy = &phy->sas_phy;
+-	struct sas_ha_struct *sas_ha = &hisi_hba->sha;
+ 	u32 bcast_status;
+ 
+ 	hisi_sas_phy_write32(hisi_hba, phy_no, SL_RX_BCAST_CHK_MSK, 1);
+ 	bcast_status = hisi_sas_phy_read32(hisi_hba, phy_no, RX_PRIMS_STATUS);
+ 	if ((bcast_status & RX_BCAST_CHG_MSK) &&
+ 	    !test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags))
+-		sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
++		sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
+ 	hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT0,
+ 			     CHL_INT0_SL_RX_BCST_ACK_MSK);
+ 	hisi_sas_phy_write32(hisi_hba, phy_no, SL_RX_BCAST_CHK_MSK, 0);
+diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
+index 2cbd8a524edab..19170c7ac336f 100644
+--- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
++++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
+@@ -1598,14 +1598,13 @@ static irqreturn_t phy_bcast_v3_hw(int phy_no, struct hisi_hba *hisi_hba)
+ {
+ 	struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
+ 	struct asd_sas_phy *sas_phy = &phy->sas_phy;
+-	struct sas_ha_struct *sas_ha = &hisi_hba->sha;
+ 	u32 bcast_status;
+ 
+ 	hisi_sas_phy_write32(hisi_hba, phy_no, SL_RX_BCAST_CHK_MSK, 1);
+ 	bcast_status = hisi_sas_phy_read32(hisi_hba, phy_no, RX_PRIMS_STATUS);
+ 	if ((bcast_status & RX_BCAST_CHG_MSK) &&
+ 	    !test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags))
+-		sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
++		sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
+ 	hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT0,
+ 			     CHL_INT0_SL_RX_BCST_ACK_MSK);
+ 	hisi_sas_phy_write32(hisi_hba, phy_no, SL_RX_BCAST_CHK_MSK, 0);
+diff --git a/drivers/scsi/isci/port.c b/drivers/scsi/isci/port.c
+index 1df45f028ea75..e50c3b0deeb30 100644
+--- a/drivers/scsi/isci/port.c
++++ b/drivers/scsi/isci/port.c
+@@ -164,7 +164,8 @@ static void isci_port_bc_change_received(struct isci_host *ihost,
+ 		"%s: isci_phy = %p, sas_phy = %p\n",
+ 		__func__, iphy, &iphy->sas_phy);
+ 
+-	ihost->sas_ha.notify_port_event(&iphy->sas_phy, PORTE_BROADCAST_RCVD);
++	sas_notify_port_event_gfp(&iphy->sas_phy,
++				  PORTE_BROADCAST_RCVD, GFP_ATOMIC);
+ 	sci_port_bcn_enable(iport);
+ }
+ 
+@@ -223,8 +224,8 @@ static void isci_port_link_up(struct isci_host *isci_host,
+ 	/* Notify libsas that we have an address frame, if indeed
+ 	 * we've found an SSP, SMP, or STP target */
+ 	if (success)
+-		isci_host->sas_ha.notify_port_event(&iphy->sas_phy,
+-						    PORTE_BYTES_DMAED);
++		sas_notify_port_event_gfp(&iphy->sas_phy,
++					  PORTE_BYTES_DMAED, GFP_ATOMIC);
+ }
+ 
+ 
+@@ -270,8 +271,8 @@ static void isci_port_link_down(struct isci_host *isci_host,
+ 	 * isci_port_deformed and isci_dev_gone functions.
+ 	 */
+ 	sas_phy_disconnected(&isci_phy->sas_phy);
+-	isci_host->sas_ha.notify_phy_event(&isci_phy->sas_phy,
+-					   PHYE_LOSS_OF_SIGNAL);
++	sas_notify_phy_event_gfp(&isci_phy->sas_phy,
++				 PHYE_LOSS_OF_SIGNAL, GFP_ATOMIC);
+ 
+ 	dev_dbg(&isci_host->pdev->dev,
+ 		"%s: isci_port = %p - Done\n", __func__, isci_port);
+diff --git a/drivers/scsi/libsas/sas_event.c b/drivers/scsi/libsas/sas_event.c
+index a1852f6c042b9..ba266a17250ae 100644
+--- a/drivers/scsi/libsas/sas_event.c
++++ b/drivers/scsi/libsas/sas_event.c
+@@ -109,7 +109,7 @@ void sas_enable_revalidation(struct sas_ha_struct *ha)
+ 
+ 		sas_phy = container_of(port->phy_list.next, struct asd_sas_phy,
+ 				port_phy_el);
+-		ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
++		sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
+ 	}
+ 	mutex_unlock(&ha->disco_mutex);
+ }
+@@ -131,18 +131,15 @@ static void sas_phy_event_worker(struct work_struct *work)
+ 	sas_free_event(ev);
+ }
+ 
+-static int sas_notify_port_event(struct asd_sas_phy *phy, enum port_event event)
++static int __sas_notify_port_event(struct asd_sas_phy *phy,
++				   enum port_event event,
++				   struct asd_sas_event *ev)
+ {
+-	struct asd_sas_event *ev;
+ 	struct sas_ha_struct *ha = phy->ha;
+ 	int ret;
+ 
+ 	BUG_ON(event >= PORT_NUM_EVENTS);
+ 
+-	ev = sas_alloc_event(phy);
+-	if (!ev)
+-		return -ENOMEM;
+-
+ 	INIT_SAS_EVENT(ev, sas_port_event_worker, phy, event);
+ 
+ 	ret = sas_queue_event(event, &ev->work, ha);
+@@ -152,18 +149,40 @@ static int sas_notify_port_event(struct asd_sas_phy *phy, enum port_event event)
+ 	return ret;
+ }
+ 
+-int sas_notify_phy_event(struct asd_sas_phy *phy, enum phy_event event)
++int sas_notify_port_event_gfp(struct asd_sas_phy *phy, enum port_event event,
++			      gfp_t gfp_flags)
+ {
+ 	struct asd_sas_event *ev;
+-	struct sas_ha_struct *ha = phy->ha;
+-	int ret;
+ 
+-	BUG_ON(event >= PHY_NUM_EVENTS);
++	ev = sas_alloc_event_gfp(phy, gfp_flags);
++	if (!ev)
++		return -ENOMEM;
++
++	return __sas_notify_port_event(phy, event, ev);
++}
++EXPORT_SYMBOL_GPL(sas_notify_port_event_gfp);
++
++int sas_notify_port_event(struct asd_sas_phy *phy, enum port_event event)
++{
++	struct asd_sas_event *ev;
+ 
+ 	ev = sas_alloc_event(phy);
+ 	if (!ev)
+ 		return -ENOMEM;
+ 
++	return __sas_notify_port_event(phy, event, ev);
++}
++EXPORT_SYMBOL_GPL(sas_notify_port_event);
++
++static inline int __sas_notify_phy_event(struct asd_sas_phy *phy,
++					 enum phy_event event,
++					 struct asd_sas_event *ev)
++{
++	struct sas_ha_struct *ha = phy->ha;
++	int ret;
++
++	BUG_ON(event >= PHY_NUM_EVENTS);
++
+ 	INIT_SAS_EVENT(ev, sas_phy_event_worker, phy, event);
+ 
+ 	ret = sas_queue_event(event, &ev->work, ha);
+@@ -173,10 +192,27 @@ int sas_notify_phy_event(struct asd_sas_phy *phy, enum phy_event event)
+ 	return ret;
+ }
+ 
+-int sas_init_events(struct sas_ha_struct *sas_ha)
++int sas_notify_phy_event_gfp(struct asd_sas_phy *phy, enum phy_event event,
++			     gfp_t gfp_flags)
+ {
+-	sas_ha->notify_port_event = sas_notify_port_event;
+-	sas_ha->notify_phy_event = sas_notify_phy_event;
++	struct asd_sas_event *ev;
+ 
+-	return 0;
++	ev = sas_alloc_event_gfp(phy, gfp_flags);
++	if (!ev)
++		return -ENOMEM;
++
++	return __sas_notify_phy_event(phy, event, ev);
++}
++EXPORT_SYMBOL_GPL(sas_notify_phy_event_gfp);
++
++int sas_notify_phy_event(struct asd_sas_phy *phy, enum phy_event event)
++{
++	struct asd_sas_event *ev;
++
++	ev = sas_alloc_event(phy);
++	if (!ev)
++		return -ENOMEM;
++
++	return __sas_notify_phy_event(phy, event, ev);
+ }
++EXPORT_SYMBOL_GPL(sas_notify_phy_event);
+diff --git a/drivers/scsi/libsas/sas_init.c b/drivers/scsi/libsas/sas_init.c
+index 21c43b18d5d5b..f8ae1f0f17d36 100644
+--- a/drivers/scsi/libsas/sas_init.c
++++ b/drivers/scsi/libsas/sas_init.c
+@@ -123,12 +123,6 @@ int sas_register_ha(struct sas_ha_struct *sas_ha)
+ 		goto Undo_phys;
+ 	}
+ 
+-	error = sas_init_events(sas_ha);
+-	if (error) {
+-		pr_notice("couldn't start event thread:%d\n", error);
+-		goto Undo_ports;
+-	}
+-
+ 	error = -ENOMEM;
+ 	snprintf(name, sizeof(name), "%s_event_q", dev_name(sas_ha->dev));
+ 	sas_ha->event_q = create_singlethread_workqueue(name);
+@@ -590,16 +584,15 @@ sas_domain_attach_transport(struct sas_domain_function_template *dft)
+ }
+ EXPORT_SYMBOL_GPL(sas_domain_attach_transport);
+ 
+-
+-struct asd_sas_event *sas_alloc_event(struct asd_sas_phy *phy)
++static struct asd_sas_event *__sas_alloc_event(struct asd_sas_phy *phy,
++					       gfp_t gfp_flags)
+ {
+ 	struct asd_sas_event *event;
+-	gfp_t flags = in_interrupt() ? GFP_ATOMIC : GFP_KERNEL;
+ 	struct sas_ha_struct *sas_ha = phy->ha;
+ 	struct sas_internal *i =
+ 		to_sas_internal(sas_ha->core.shost->transportt);
+ 
+-	event = kmem_cache_zalloc(sas_event_cache, flags);
++	event = kmem_cache_zalloc(sas_event_cache, gfp_flags);
+ 	if (!event)
+ 		return NULL;
+ 
+@@ -610,7 +603,8 @@ struct asd_sas_event *sas_alloc_event(struct asd_sas_phy *phy)
+ 			if (cmpxchg(&phy->in_shutdown, 0, 1) == 0) {
+ 				pr_notice("The phy%d bursting events, shut it down.\n",
+ 					  phy->id);
+-				sas_notify_phy_event(phy, PHYE_SHUTDOWN);
++				sas_notify_phy_event_gfp(phy, PHYE_SHUTDOWN,
++							 gfp_flags);
+ 			}
+ 		} else {
+ 			/* Do not support PHY control, stop allocating events */
+@@ -624,6 +618,17 @@ struct asd_sas_event *sas_alloc_event(struct asd_sas_phy *phy)
+ 	return event;
+ }
+ 
++struct asd_sas_event *sas_alloc_event(struct asd_sas_phy *phy)
++{
++	return __sas_alloc_event(phy, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);
++}
++
++struct asd_sas_event *sas_alloc_event_gfp(struct asd_sas_phy *phy,
++					  gfp_t gfp_flags)
++{
++	return __sas_alloc_event(phy, gfp_flags);
++}
++
+ void sas_free_event(struct asd_sas_event *event)
+ {
+ 	struct asd_sas_phy *phy = event->phy;
+diff --git a/drivers/scsi/libsas/sas_internal.h b/drivers/scsi/libsas/sas_internal.h
+index 1f1d01901978c..52e09c3e2b50d 100644
+--- a/drivers/scsi/libsas/sas_internal.h
++++ b/drivers/scsi/libsas/sas_internal.h
+@@ -49,12 +49,13 @@ int  sas_register_phys(struct sas_ha_struct *sas_ha);
+ void sas_unregister_phys(struct sas_ha_struct *sas_ha);
+ 
+ struct asd_sas_event *sas_alloc_event(struct asd_sas_phy *phy);
++struct asd_sas_event *sas_alloc_event_gfp(struct asd_sas_phy *phy,
++					  gfp_t gfp_flags);
+ void sas_free_event(struct asd_sas_event *event);
+ 
+ int  sas_register_ports(struct sas_ha_struct *sas_ha);
+ void sas_unregister_ports(struct sas_ha_struct *sas_ha);
+ 
+-int  sas_init_events(struct sas_ha_struct *sas_ha);
+ void sas_disable_revalidation(struct sas_ha_struct *ha);
+ void sas_enable_revalidation(struct sas_ha_struct *ha);
+ void __sas_drain_work(struct sas_ha_struct *ha);
+@@ -78,6 +79,8 @@ int sas_smp_phy_control(struct domain_device *dev, int phy_id,
+ int sas_smp_get_phy_events(struct sas_phy *phy);
+ 
+ int sas_notify_phy_event(struct asd_sas_phy *phy, enum phy_event event);
++int sas_notify_phy_event_gfp(struct asd_sas_phy *phy, enum phy_event event,
++			     gfp_t flags);
+ void sas_device_set_phy(struct domain_device *dev, struct sas_port *port);
+ struct domain_device *sas_find_dev_by_rphy(struct sas_rphy *rphy);
+ struct domain_device *sas_ex_to_ata(struct domain_device *ex_dev, int phy_id);
+diff --git a/drivers/scsi/lpfc/lpfc_debugfs.c b/drivers/scsi/lpfc/lpfc_debugfs.c
+index c9a327b13e5cf..b89c5513243e8 100644
+--- a/drivers/scsi/lpfc/lpfc_debugfs.c
++++ b/drivers/scsi/lpfc/lpfc_debugfs.c
+@@ -2423,7 +2423,7 @@ lpfc_debugfs_dif_err_write(struct file *file, const char __user *buf,
+ 	memset(dstbuf, 0, 33);
+ 	size = (nbytes < 32) ? nbytes : 32;
+ 	if (copy_from_user(dstbuf, buf, size))
+-		return 0;
++		return -EFAULT;
+ 
+ 	if (dent == phba->debug_InjErrLBA) {
+ 		if ((dstbuf[0] == 'o') && (dstbuf[1] == 'f') &&
+@@ -2432,7 +2432,7 @@ lpfc_debugfs_dif_err_write(struct file *file, const char __user *buf,
+ 	}
+ 
+ 	if ((tmp == 0) && (kstrtoull(dstbuf, 0, &tmp)))
+-		return 0;
++		return -EINVAL;
+ 
+ 	if (dent == phba->debug_writeGuard)
+ 		phba->lpfc_injerr_wgrd_cnt = (uint32_t)tmp;
+diff --git a/drivers/scsi/mvsas/mv_sas.c b/drivers/scsi/mvsas/mv_sas.c
+index a920eced92ecc..484e01428da28 100644
+--- a/drivers/scsi/mvsas/mv_sas.c
++++ b/drivers/scsi/mvsas/mv_sas.c
+@@ -216,11 +216,11 @@ void mvs_set_sas_addr(struct mvs_info *mvi, int port_id, u32 off_lo,
+ 	MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi);
+ }
+ 
+-static void mvs_bytes_dmaed(struct mvs_info *mvi, int i)
++static void mvs_bytes_dmaed(struct mvs_info *mvi, int i, gfp_t gfp_flags)
+ {
+ 	struct mvs_phy *phy = &mvi->phy[i];
+ 	struct asd_sas_phy *sas_phy = &phy->sas_phy;
+-	struct sas_ha_struct *sas_ha;
++
+ 	if (!phy->phy_attached)
+ 		return;
+ 
+@@ -229,8 +229,7 @@ static void mvs_bytes_dmaed(struct mvs_info *mvi, int i)
+ 		return;
+ 	}
+ 
+-	sas_ha = mvi->sas;
+-	sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE);
++	sas_notify_phy_event_gfp(sas_phy, PHYE_OOB_DONE, gfp_flags);
+ 
+ 	if (sas_phy->phy) {
+ 		struct sas_phy *sphy = sas_phy->phy;
+@@ -262,8 +261,7 @@ static void mvs_bytes_dmaed(struct mvs_info *mvi, int i)
+ 
+ 	sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
+ 
+-	mvi->sas->notify_port_event(sas_phy,
+-				   PORTE_BYTES_DMAED);
++	sas_notify_port_event_gfp(sas_phy, PORTE_BYTES_DMAED, gfp_flags);
+ }
+ 
+ void mvs_scan_start(struct Scsi_Host *shost)
+@@ -279,7 +277,7 @@ void mvs_scan_start(struct Scsi_Host *shost)
+ 	for (j = 0; j < core_nr; j++) {
+ 		mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j];
+ 		for (i = 0; i < mvi->chip->n_phy; ++i)
+-			mvs_bytes_dmaed(mvi, i);
++			mvs_bytes_dmaed(mvi, i, GFP_KERNEL);
+ 	}
+ 	mvs_prv->scan_finished = 1;
+ }
+@@ -1880,7 +1878,6 @@ static void mvs_work_queue(struct work_struct *work)
+ 	struct mvs_info *mvi = mwq->mvi;
+ 	unsigned long flags;
+ 	u32 phy_no = (unsigned long) mwq->data;
+-	struct sas_ha_struct *sas_ha = mvi->sas;
+ 	struct mvs_phy *phy = &mvi->phy[phy_no];
+ 	struct asd_sas_phy *sas_phy = &phy->sas_phy;
+ 
+@@ -1895,21 +1892,21 @@ static void mvs_work_queue(struct work_struct *work)
+ 			if (!(tmp & PHY_READY_MASK)) {
+ 				sas_phy_disconnected(sas_phy);
+ 				mvs_phy_disconnected(phy);
+-				sas_ha->notify_phy_event(sas_phy,
+-					PHYE_LOSS_OF_SIGNAL);
++				sas_notify_phy_event_gfp(sas_phy,
++					PHYE_LOSS_OF_SIGNAL, GFP_ATOMIC);
+ 				mv_dprintk("phy%d Removed Device\n", phy_no);
+ 			} else {
+ 				MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
+ 				mvs_update_phyinfo(mvi, phy_no, 1);
+-				mvs_bytes_dmaed(mvi, phy_no);
++				mvs_bytes_dmaed(mvi, phy_no, GFP_ATOMIC);
+ 				mvs_port_notify_formed(sas_phy, 0);
+ 				mv_dprintk("phy%d Attached Device\n", phy_no);
+ 			}
+ 		}
+ 	} else if (mwq->handler & EXP_BRCT_CHG) {
+ 		phy->phy_event &= ~EXP_BRCT_CHG;
+-		sas_ha->notify_port_event(sas_phy,
+-				PORTE_BROADCAST_RCVD);
++		sas_notify_port_event_gfp(sas_phy,
++				PORTE_BROADCAST_RCVD, GFP_ATOMIC);
+ 		mv_dprintk("phy%d Got Broadcast Change\n", phy_no);
+ 	}
+ 	list_del(&mwq->entry);
+@@ -2026,7 +2023,7 @@ void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events)
+ 				mdelay(10);
+ 			}
+ 
+-			mvs_bytes_dmaed(mvi, phy_no);
++			mvs_bytes_dmaed(mvi, phy_no, GFP_ATOMIC);
+ 			/* whether driver is going to handle hot plug */
+ 			if (phy->phy_event & PHY_PLUG_OUT) {
+ 				mvs_port_notify_formed(&phy->sas_phy, 0);
+diff --git a/drivers/scsi/myrs.c b/drivers/scsi/myrs.c
+index 7a3ade765ce3b..78c41bbf67562 100644
+--- a/drivers/scsi/myrs.c
++++ b/drivers/scsi/myrs.c
+@@ -2274,12 +2274,12 @@ static void myrs_cleanup(struct myrs_hba *cs)
+ 	if (cs->mmio_base) {
+ 		cs->disable_intr(cs);
+ 		iounmap(cs->mmio_base);
++		cs->mmio_base = NULL;
+ 	}
+ 	if (cs->irq)
+ 		free_irq(cs->irq, cs);
+ 	if (cs->io_addr)
+ 		release_region(cs->io_addr, 0x80);
+-	iounmap(cs->mmio_base);
+ 	pci_set_drvdata(pdev, NULL);
+ 	pci_disable_device(pdev);
+ 	scsi_host_put(cs->host);
+diff --git a/drivers/scsi/pm8001/pm8001_ctl.c b/drivers/scsi/pm8001/pm8001_ctl.c
+index 3587f7c8a4289..12035baf0997b 100644
+--- a/drivers/scsi/pm8001/pm8001_ctl.c
++++ b/drivers/scsi/pm8001/pm8001_ctl.c
+@@ -841,10 +841,9 @@ static ssize_t pm8001_store_update_fw(struct device *cdev,
+ 			       pm8001_ha->dev);
+ 
+ 	if (ret) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk(
+-			"Failed to load firmware image file %s,	error %d\n",
+-			filename_ptr, ret));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "Failed to load firmware image file %s, error %d\n",
++			   filename_ptr, ret);
+ 		pm8001_ha->fw_status = FAIL_OPEN_BIOS_FILE;
+ 		goto out;
+ 	}
+diff --git a/drivers/scsi/pm8001/pm8001_hwi.c b/drivers/scsi/pm8001/pm8001_hwi.c
+index 2b7b2954ec31a..95ba1bd16db93 100644
+--- a/drivers/scsi/pm8001/pm8001_hwi.c
++++ b/drivers/scsi/pm8001/pm8001_hwi.c
+@@ -400,9 +400,9 @@ int pm8001_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue)
+ 	} while ((regVal != shiftValue) && time_before(jiffies, start));
+ 
+ 	if (regVal != shiftValue) {
+-		PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("TIMEOUT:SPC_IBW_AXI_TRANSLATION_LOW"
+-			" = 0x%x\n", regVal));
++		pm8001_dbg(pm8001_ha, INIT,
++			   "TIMEOUT:SPC_IBW_AXI_TRANSLATION_LOW = 0x%x\n",
++			   regVal);
+ 		return -1;
+ 	}
+ 	return 0;
+@@ -623,12 +623,10 @@ static void init_pci_device_addresses(struct pm8001_hba_info *pm8001_ha)
+ 
+ 	value = pm8001_cr32(pm8001_ha, 0, 0x44);
+ 	offset = value & 0x03FFFFFF;
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("Scratchpad 0 Offset: %x\n", offset));
++	pm8001_dbg(pm8001_ha, INIT, "Scratchpad 0 Offset: %x\n", offset);
+ 	pcilogic = (value & 0xFC000000) >> 26;
+ 	pcibar = get_pci_bar_index(pcilogic);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("Scratchpad 0 PCI BAR: %d\n", pcibar));
++	pm8001_dbg(pm8001_ha, INIT, "Scratchpad 0 PCI BAR: %d\n", pcibar);
+ 	pm8001_ha->main_cfg_tbl_addr = base_addr =
+ 		pm8001_ha->io_mem[pcibar].memvirtaddr + offset;
+ 	pm8001_ha->general_stat_tbl_addr =
+@@ -652,16 +650,15 @@ static int pm8001_chip_init(struct pm8001_hba_info *pm8001_ha)
+ 	* as this is shared with BIOS data */
+ 	if (deviceid == 0x8081 || deviceid == 0x0042) {
+ 		if (-1 == pm8001_bar4_shift(pm8001_ha, GSM_SM_BASE)) {
+-			PM8001_FAIL_DBG(pm8001_ha,
+-				pm8001_printk("Shift Bar4 to 0x%x failed\n",
+-					GSM_SM_BASE));
++			pm8001_dbg(pm8001_ha, FAIL,
++				   "Shift Bar4 to 0x%x failed\n",
++				   GSM_SM_BASE);
+ 			return -1;
+ 		}
+ 	}
+ 	/* check the firmware status */
+ 	if (-1 == check_fw_ready(pm8001_ha)) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("Firmware is not ready!\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "Firmware is not ready!\n");
+ 		return -EBUSY;
+ 	}
+ 
+@@ -686,8 +683,7 @@ static int pm8001_chip_init(struct pm8001_hba_info *pm8001_ha)
+ 	}
+ 	/* notify firmware update finished and check initialization status */
+ 	if (0 == mpi_init_check(pm8001_ha)) {
+-		PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("MPI initialize successful!\n"));
++		pm8001_dbg(pm8001_ha, INIT, "MPI initialize successful!\n");
+ 	} else
+ 		return -EBUSY;
+ 	/*This register is a 16-bit timer with a resolution of 1us. This is the
+@@ -709,9 +705,9 @@ static int mpi_uninit_check(struct pm8001_hba_info *pm8001_ha)
+ 	pci_read_config_word(pm8001_ha->pdev, PCI_DEVICE_ID, &deviceid);
+ 	if (deviceid == 0x8081 || deviceid == 0x0042) {
+ 		if (-1 == pm8001_bar4_shift(pm8001_ha, GSM_SM_BASE)) {
+-			PM8001_FAIL_DBG(pm8001_ha,
+-				pm8001_printk("Shift Bar4 to 0x%x failed\n",
+-					GSM_SM_BASE));
++			pm8001_dbg(pm8001_ha, FAIL,
++				   "Shift Bar4 to 0x%x failed\n",
++				   GSM_SM_BASE);
+ 			return -1;
+ 		}
+ 	}
+@@ -729,8 +725,8 @@ static int mpi_uninit_check(struct pm8001_hba_info *pm8001_ha)
+ 	} while ((value != 0) && (--max_wait_count));
+ 
+ 	if (!max_wait_count) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("TIMEOUT:IBDB value/=0x%x\n", value));
++		pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:IBDB value/=0x%x\n",
++			   value);
+ 		return -1;
+ 	}
+ 
+@@ -747,9 +743,8 @@ static int mpi_uninit_check(struct pm8001_hba_info *pm8001_ha)
+ 			break;
+ 	} while (--max_wait_count);
+ 	if (!max_wait_count) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk(" TIME OUT MPI State = 0x%x\n",
+-				gst_len_mpistate & GST_MPI_STATE_MASK));
++		pm8001_dbg(pm8001_ha, FAIL, " TIME OUT MPI State = 0x%x\n",
++			   gst_len_mpistate & GST_MPI_STATE_MASK);
+ 		return -1;
+ 	}
+ 	return 0;
+@@ -763,25 +758,23 @@ static u32 soft_reset_ready_check(struct pm8001_hba_info *pm8001_ha)
+ {
+ 	u32 regVal, regVal1, regVal2;
+ 	if (mpi_uninit_check(pm8001_ha) != 0) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("MPI state is not ready\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "MPI state is not ready\n");
+ 		return -1;
+ 	}
+ 	/* read the scratch pad 2 register bit 2 */
+ 	regVal = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2)
+ 		& SCRATCH_PAD2_FWRDY_RST;
+ 	if (regVal == SCRATCH_PAD2_FWRDY_RST) {
+-		PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("Firmware is ready for reset .\n"));
++		pm8001_dbg(pm8001_ha, INIT, "Firmware is ready for reset.\n");
+ 	} else {
+ 		unsigned long flags;
+ 		/* Trigger NMI twice via RB6 */
+ 		spin_lock_irqsave(&pm8001_ha->lock, flags);
+ 		if (-1 == pm8001_bar4_shift(pm8001_ha, RB6_ACCESS_REG)) {
+ 			spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+-			PM8001_FAIL_DBG(pm8001_ha,
+-				pm8001_printk("Shift Bar4 to 0x%x failed\n",
+-					RB6_ACCESS_REG));
++			pm8001_dbg(pm8001_ha, FAIL,
++				   "Shift Bar4 to 0x%x failed\n",
++				   RB6_ACCESS_REG);
+ 			return -1;
+ 		}
+ 		pm8001_cw32(pm8001_ha, 2, SPC_RB6_OFFSET,
+@@ -794,16 +787,14 @@ static u32 soft_reset_ready_check(struct pm8001_hba_info *pm8001_ha)
+ 		if (regVal != SCRATCH_PAD2_FWRDY_RST) {
+ 			regVal1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
+ 			regVal2 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2);
+-			PM8001_FAIL_DBG(pm8001_ha,
+-				pm8001_printk("TIMEOUT:MSGU_SCRATCH_PAD1"
+-				"=0x%x, MSGU_SCRATCH_PAD2=0x%x\n",
+-				regVal1, regVal2));
+-			PM8001_FAIL_DBG(pm8001_ha,
+-				pm8001_printk("SCRATCH_PAD0 value = 0x%x\n",
+-				pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0)));
+-			PM8001_FAIL_DBG(pm8001_ha,
+-				pm8001_printk("SCRATCH_PAD3 value = 0x%x\n",
+-				pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3)));
++			pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:MSGU_SCRATCH_PAD1=0x%x, MSGU_SCRATCH_PAD2=0x%x\n",
++				   regVal1, regVal2);
++			pm8001_dbg(pm8001_ha, FAIL,
++				   "SCRATCH_PAD0 value = 0x%x\n",
++				   pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0));
++			pm8001_dbg(pm8001_ha, FAIL,
++				   "SCRATCH_PAD3 value = 0x%x\n",
++				   pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3));
+ 			spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+ 			return -1;
+ 		}
+@@ -828,7 +819,7 @@ pm8001_chip_soft_rst(struct pm8001_hba_info *pm8001_ha)
+ 
+ 	/* step1: Check FW is ready for soft reset */
+ 	if (soft_reset_ready_check(pm8001_ha) != 0) {
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("FW is not ready\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "FW is not ready\n");
+ 		return -1;
+ 	}
+ 
+@@ -838,46 +829,43 @@ pm8001_chip_soft_rst(struct pm8001_hba_info *pm8001_ha)
+ 	spin_lock_irqsave(&pm8001_ha->lock, flags);
+ 	if (-1 == pm8001_bar4_shift(pm8001_ha, MBIC_AAP1_ADDR_BASE)) {
+ 		spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("Shift Bar4 to 0x%x failed\n",
+-			MBIC_AAP1_ADDR_BASE));
++		pm8001_dbg(pm8001_ha, FAIL, "Shift Bar4 to 0x%x failed\n",
++			   MBIC_AAP1_ADDR_BASE);
+ 		return -1;
+ 	}
+ 	regVal = pm8001_cr32(pm8001_ha, 2, MBIC_NMI_ENABLE_VPE0_IOP);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("MBIC - NMI Enable VPE0 (IOP)= 0x%x\n", regVal));
++	pm8001_dbg(pm8001_ha, INIT, "MBIC - NMI Enable VPE0 (IOP)= 0x%x\n",
++		   regVal);
+ 	pm8001_cw32(pm8001_ha, 2, MBIC_NMI_ENABLE_VPE0_IOP, 0x0);
+ 	/* map 0x70000 to BAR4(0x20), BAR2(win) */
+ 	if (-1 == pm8001_bar4_shift(pm8001_ha, MBIC_IOP_ADDR_BASE)) {
+ 		spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("Shift Bar4 to 0x%x failed\n",
+-			MBIC_IOP_ADDR_BASE));
++		pm8001_dbg(pm8001_ha, FAIL, "Shift Bar4 to 0x%x failed\n",
++			   MBIC_IOP_ADDR_BASE);
+ 		return -1;
+ 	}
+ 	regVal = pm8001_cr32(pm8001_ha, 2, MBIC_NMI_ENABLE_VPE0_AAP1);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("MBIC - NMI Enable VPE0 (AAP1)= 0x%x\n", regVal));
++	pm8001_dbg(pm8001_ha, INIT, "MBIC - NMI Enable VPE0 (AAP1)= 0x%x\n",
++		   regVal);
+ 	pm8001_cw32(pm8001_ha, 2, MBIC_NMI_ENABLE_VPE0_AAP1, 0x0);
+ 
+ 	regVal = pm8001_cr32(pm8001_ha, 1, PCIE_EVENT_INTERRUPT_ENABLE);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("PCIE -Event Interrupt Enable = 0x%x\n", regVal));
++	pm8001_dbg(pm8001_ha, INIT, "PCIE -Event Interrupt Enable = 0x%x\n",
++		   regVal);
+ 	pm8001_cw32(pm8001_ha, 1, PCIE_EVENT_INTERRUPT_ENABLE, 0x0);
+ 
+ 	regVal = pm8001_cr32(pm8001_ha, 1, PCIE_EVENT_INTERRUPT);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("PCIE - Event Interrupt  = 0x%x\n", regVal));
++	pm8001_dbg(pm8001_ha, INIT, "PCIE - Event Interrupt  = 0x%x\n",
++		   regVal);
+ 	pm8001_cw32(pm8001_ha, 1, PCIE_EVENT_INTERRUPT, regVal);
+ 
+ 	regVal = pm8001_cr32(pm8001_ha, 1, PCIE_ERROR_INTERRUPT_ENABLE);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("PCIE -Error Interrupt Enable = 0x%x\n", regVal));
++	pm8001_dbg(pm8001_ha, INIT, "PCIE -Error Interrupt Enable = 0x%x\n",
++		   regVal);
+ 	pm8001_cw32(pm8001_ha, 1, PCIE_ERROR_INTERRUPT_ENABLE, 0x0);
+ 
+ 	regVal = pm8001_cr32(pm8001_ha, 1, PCIE_ERROR_INTERRUPT);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("PCIE - Error Interrupt = 0x%x\n", regVal));
++	pm8001_dbg(pm8001_ha, INIT, "PCIE - Error Interrupt = 0x%x\n", regVal);
+ 	pm8001_cw32(pm8001_ha, 1, PCIE_ERROR_INTERRUPT, regVal);
+ 
+ 	/* read the scratch pad 1 register bit 2 */
+@@ -893,15 +881,13 @@ pm8001_chip_soft_rst(struct pm8001_hba_info *pm8001_ha)
+ 	/* map 0x0700000 to BAR4(0x20), BAR2(win) */
+ 	if (-1 == pm8001_bar4_shift(pm8001_ha, GSM_ADDR_BASE)) {
+ 		spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("Shift Bar4 to 0x%x failed\n",
+-			GSM_ADDR_BASE));
++		pm8001_dbg(pm8001_ha, FAIL, "Shift Bar4 to 0x%x failed\n",
++			   GSM_ADDR_BASE);
+ 		return -1;
+ 	}
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("GSM 0x0(0x00007b88)-GSM Configuration and"
+-		" Reset = 0x%x\n",
+-		pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET)));
++	pm8001_dbg(pm8001_ha, INIT,
++		   "GSM 0x0(0x00007b88)-GSM Configuration and Reset = 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET));
+ 
+ 	/* step 3: host read GSM Configuration and Reset register */
+ 	regVal = pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET);
+@@ -916,59 +902,52 @@ pm8001_chip_soft_rst(struct pm8001_hba_info *pm8001_ha)
+ 	regVal &= ~(0x00003b00);
+ 	/* host write GSM Configuration and Reset register */
+ 	pm8001_cw32(pm8001_ha, 2, GSM_CONFIG_RESET, regVal);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("GSM 0x0 (0x00007b88 ==> 0x00004088) - GSM "
+-		"Configuration and Reset is set to = 0x%x\n",
+-		pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET)));
++	pm8001_dbg(pm8001_ha, INIT,
++		   "GSM 0x0 (0x00007b88 ==> 0x00004088) - GSM Configuration and Reset is set to = 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET));
+ 
+ 	/* step 4: */
+ 	/* disable GSM - Read Address Parity Check */
+ 	regVal1 = pm8001_cr32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("GSM 0x700038 - Read Address Parity Check "
+-		"Enable = 0x%x\n", regVal1));
++	pm8001_dbg(pm8001_ha, INIT,
++		   "GSM 0x700038 - Read Address Parity Check Enable = 0x%x\n",
++		   regVal1);
+ 	pm8001_cw32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK, 0x0);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("GSM 0x700038 - Read Address Parity Check Enable"
+-		"is set to = 0x%x\n",
+-		pm8001_cr32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK)));
++	pm8001_dbg(pm8001_ha, INIT,
++		   "GSM 0x700038 - Read Address Parity Check Enable is set to = 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK));
+ 
+ 	/* disable GSM - Write Address Parity Check */
+ 	regVal2 = pm8001_cr32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("GSM 0x700040 - Write Address Parity Check"
+-		" Enable = 0x%x\n", regVal2));
++	pm8001_dbg(pm8001_ha, INIT,
++		   "GSM 0x700040 - Write Address Parity Check Enable = 0x%x\n",
++		   regVal2);
+ 	pm8001_cw32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK, 0x0);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("GSM 0x700040 - Write Address Parity Check "
+-		"Enable is set to = 0x%x\n",
+-		pm8001_cr32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK)));
++	pm8001_dbg(pm8001_ha, INIT,
++		   "GSM 0x700040 - Write Address Parity Check Enable is set to = 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK));
+ 
+ 	/* disable GSM - Write Data Parity Check */
+ 	regVal3 = pm8001_cr32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("GSM 0x300048 - Write Data Parity Check"
+-		" Enable = 0x%x\n", regVal3));
++	pm8001_dbg(pm8001_ha, INIT, "GSM 0x300048 - Write Data Parity Check Enable = 0x%x\n",
++		   regVal3);
+ 	pm8001_cw32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK, 0x0);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("GSM 0x300048 - Write Data Parity Check Enable"
+-		"is set to = 0x%x\n",
+-	pm8001_cr32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK)));
++	pm8001_dbg(pm8001_ha, INIT,
++		   "GSM 0x300048 - Write Data Parity Check Enable is set to = 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK));
+ 
+ 	/* step 5: delay 10 usec */
+ 	udelay(10);
+ 	/* step 5-b: set GPIO-0 output control to tristate anyway */
+ 	if (-1 == pm8001_bar4_shift(pm8001_ha, GPIO_ADDR_BASE)) {
+ 		spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+-		PM8001_INIT_DBG(pm8001_ha,
+-				pm8001_printk("Shift Bar4 to 0x%x failed\n",
+-				GPIO_ADDR_BASE));
++		pm8001_dbg(pm8001_ha, INIT, "Shift Bar4 to 0x%x failed\n",
++			   GPIO_ADDR_BASE);
+ 		return -1;
+ 	}
+ 	regVal = pm8001_cr32(pm8001_ha, 2, GPIO_GPIO_0_0UTPUT_CTL_OFFSET);
+-	PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("GPIO Output Control Register:"
+-			" = 0x%x\n", regVal));
++	pm8001_dbg(pm8001_ha, INIT, "GPIO Output Control Register: = 0x%x\n",
++		   regVal);
+ 	/* set GPIO-0 output control to tri-state */
+ 	regVal &= 0xFFFFFFFC;
+ 	pm8001_cw32(pm8001_ha, 2, GPIO_GPIO_0_0UTPUT_CTL_OFFSET, regVal);
+@@ -977,23 +956,20 @@ pm8001_chip_soft_rst(struct pm8001_hba_info *pm8001_ha)
+ 	/* map 0x00000 to BAR4(0x20), BAR2(win) */
+ 	if (-1 == pm8001_bar4_shift(pm8001_ha, SPC_TOP_LEVEL_ADDR_BASE)) {
+ 		spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("SPC Shift Bar4 to 0x%x failed\n",
+-			SPC_TOP_LEVEL_ADDR_BASE));
++		pm8001_dbg(pm8001_ha, FAIL, "SPC Shift Bar4 to 0x%x failed\n",
++			   SPC_TOP_LEVEL_ADDR_BASE);
+ 		return -1;
+ 	}
+ 	regVal = pm8001_cr32(pm8001_ha, 2, SPC_REG_RESET);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("Top Register before resetting IOP/AAP1"
+-		":= 0x%x\n", regVal));
++	pm8001_dbg(pm8001_ha, INIT, "Top Register before resetting IOP/AAP1:= 0x%x\n",
++		   regVal);
+ 	regVal &= ~(SPC_REG_RESET_PCS_IOP_SS | SPC_REG_RESET_PCS_AAP1_SS);
+ 	pm8001_cw32(pm8001_ha, 2, SPC_REG_RESET, regVal);
+ 
+ 	/* step 7: Reset the BDMA/OSSP */
+ 	regVal = pm8001_cr32(pm8001_ha, 2, SPC_REG_RESET);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("Top Register before resetting BDMA/OSSP"
+-		": = 0x%x\n", regVal));
++	pm8001_dbg(pm8001_ha, INIT, "Top Register before resetting BDMA/OSSP: = 0x%x\n",
++		   regVal);
+ 	regVal &= ~(SPC_REG_RESET_BDMA_CORE | SPC_REG_RESET_OSSP);
+ 	pm8001_cw32(pm8001_ha, 2, SPC_REG_RESET, regVal);
+ 
+@@ -1002,9 +978,9 @@ pm8001_chip_soft_rst(struct pm8001_hba_info *pm8001_ha)
+ 
+ 	/* step 9: bring the BDMA and OSSP out of reset */
+ 	regVal = pm8001_cr32(pm8001_ha, 2, SPC_REG_RESET);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("Top Register before bringing up BDMA/OSSP"
+-		":= 0x%x\n", regVal));
++	pm8001_dbg(pm8001_ha, INIT,
++		   "Top Register before bringing up BDMA/OSSP:= 0x%x\n",
++		   regVal);
+ 	regVal |= (SPC_REG_RESET_BDMA_CORE | SPC_REG_RESET_OSSP);
+ 	pm8001_cw32(pm8001_ha, 2, SPC_REG_RESET, regVal);
+ 
+@@ -1015,14 +991,13 @@ pm8001_chip_soft_rst(struct pm8001_hba_info *pm8001_ha)
+ 	/* map 0x0700000 to BAR4(0x20), BAR2(win) */
+ 	if (-1 == pm8001_bar4_shift(pm8001_ha, GSM_ADDR_BASE)) {
+ 		spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("SPC Shift Bar4 to 0x%x failed\n",
+-			GSM_ADDR_BASE));
++		pm8001_dbg(pm8001_ha, FAIL, "SPC Shift Bar4 to 0x%x failed\n",
++			   GSM_ADDR_BASE);
+ 		return -1;
+ 	}
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("GSM 0x0 (0x00007b88)-GSM Configuration and "
+-		"Reset = 0x%x\n", pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET)));
++	pm8001_dbg(pm8001_ha, INIT,
++		   "GSM 0x0 (0x00007b88)-GSM Configuration and Reset = 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET));
+ 	regVal = pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET);
+ 	/* Put those bits to high */
+ 	/* GSM XCBI offset = 0x70 0000
+@@ -1034,44 +1009,37 @@ pm8001_chip_soft_rst(struct pm8001_hba_info *pm8001_ha)
+ 	*/
+ 	regVal |= (GSM_CONFIG_RESET_VALUE);
+ 	pm8001_cw32(pm8001_ha, 2, GSM_CONFIG_RESET, regVal);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("GSM (0x00004088 ==> 0x00007b88) - GSM"
+-		" Configuration and Reset is set to = 0x%x\n",
+-		pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET)));
++	pm8001_dbg(pm8001_ha, INIT, "GSM (0x00004088 ==> 0x00007b88) - GSM Configuration and Reset is set to = 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET));
+ 
+ 	/* step 12: Restore GSM - Read Address Parity Check */
+ 	regVal = pm8001_cr32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK);
+ 	/* just for debugging */
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("GSM 0x700038 - Read Address Parity Check Enable"
+-		" = 0x%x\n", regVal));
++	pm8001_dbg(pm8001_ha, INIT,
++		   "GSM 0x700038 - Read Address Parity Check Enable = 0x%x\n",
++		   regVal);
+ 	pm8001_cw32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK, regVal1);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("GSM 0x700038 - Read Address Parity"
+-		" Check Enable is set to = 0x%x\n",
+-		pm8001_cr32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK)));
++	pm8001_dbg(pm8001_ha, INIT, "GSM 0x700038 - Read Address Parity Check Enable is set to = 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK));
+ 	/* Restore GSM - Write Address Parity Check */
+ 	regVal = pm8001_cr32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK);
+ 	pm8001_cw32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK, regVal2);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("GSM 0x700040 - Write Address Parity Check"
+-		" Enable is set to = 0x%x\n",
+-		pm8001_cr32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK)));
++	pm8001_dbg(pm8001_ha, INIT,
++		   "GSM 0x700040 - Write Address Parity Check Enable is set to = 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK));
+ 	/* Restore GSM - Write Data Parity Check */
+ 	regVal = pm8001_cr32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK);
+ 	pm8001_cw32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK, regVal3);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("GSM 0x700048 - Write Data Parity Check Enable"
+-		"is set to = 0x%x\n",
+-		pm8001_cr32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK)));
++	pm8001_dbg(pm8001_ha, INIT,
++		   "GSM 0x700048 - Write Data Parity Check Enableis set to = 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK));
+ 
+ 	/* step 13: bring the IOP and AAP1 out of reset */
+ 	/* map 0x00000 to BAR4(0x20), BAR2(win) */
+ 	if (-1 == pm8001_bar4_shift(pm8001_ha, SPC_TOP_LEVEL_ADDR_BASE)) {
+ 		spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("Shift Bar4 to 0x%x failed\n",
+-			SPC_TOP_LEVEL_ADDR_BASE));
++		pm8001_dbg(pm8001_ha, FAIL, "Shift Bar4 to 0x%x failed\n",
++			   SPC_TOP_LEVEL_ADDR_BASE);
+ 		return -1;
+ 	}
+ 	regVal = pm8001_cr32(pm8001_ha, 2, SPC_REG_RESET);
+@@ -1094,22 +1062,20 @@ pm8001_chip_soft_rst(struct pm8001_hba_info *pm8001_ha)
+ 		if (!max_wait_count) {
+ 			regVal = pm8001_cr32(pm8001_ha, 0,
+ 				MSGU_SCRATCH_PAD_1);
+-			PM8001_FAIL_DBG(pm8001_ha,
+-				pm8001_printk("TIMEOUT : ToggleVal 0x%x,"
+-				"MSGU_SCRATCH_PAD1 = 0x%x\n",
+-				toggleVal, regVal));
+-			PM8001_FAIL_DBG(pm8001_ha,
+-				pm8001_printk("SCRATCH_PAD0 value = 0x%x\n",
+-				pm8001_cr32(pm8001_ha, 0,
+-				MSGU_SCRATCH_PAD_0)));
+-			PM8001_FAIL_DBG(pm8001_ha,
+-				pm8001_printk("SCRATCH_PAD2 value = 0x%x\n",
+-				pm8001_cr32(pm8001_ha, 0,
+-				MSGU_SCRATCH_PAD_2)));
+-			PM8001_FAIL_DBG(pm8001_ha,
+-				pm8001_printk("SCRATCH_PAD3 value = 0x%x\n",
+-				pm8001_cr32(pm8001_ha, 0,
+-				MSGU_SCRATCH_PAD_3)));
++			pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT : ToggleVal 0x%x,MSGU_SCRATCH_PAD1 = 0x%x\n",
++				   toggleVal, regVal);
++			pm8001_dbg(pm8001_ha, FAIL,
++				   "SCRATCH_PAD0 value = 0x%x\n",
++				   pm8001_cr32(pm8001_ha, 0,
++					       MSGU_SCRATCH_PAD_0));
++			pm8001_dbg(pm8001_ha, FAIL,
++				   "SCRATCH_PAD2 value = 0x%x\n",
++				   pm8001_cr32(pm8001_ha, 0,
++					       MSGU_SCRATCH_PAD_2));
++			pm8001_dbg(pm8001_ha, FAIL,
++				   "SCRATCH_PAD3 value = 0x%x\n",
++				   pm8001_cr32(pm8001_ha, 0,
++					       MSGU_SCRATCH_PAD_3));
+ 			spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+ 			return -1;
+ 		}
+@@ -1124,22 +1090,22 @@ pm8001_chip_soft_rst(struct pm8001_hba_info *pm8001_ha)
+ 		if (check_fw_ready(pm8001_ha) == -1) {
+ 			regVal = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
+ 			/* return error if MPI Configuration Table not ready */
+-			PM8001_INIT_DBG(pm8001_ha,
+-				pm8001_printk("FW not ready SCRATCH_PAD1"
+-				" = 0x%x\n", regVal));
++			pm8001_dbg(pm8001_ha, INIT,
++				   "FW not ready SCRATCH_PAD1 = 0x%x\n",
++				   regVal);
+ 			regVal = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2);
+ 			/* return error if MPI Configuration Table not ready */
+-			PM8001_INIT_DBG(pm8001_ha,
+-				pm8001_printk("FW not ready SCRATCH_PAD2"
+-				" = 0x%x\n", regVal));
+-			PM8001_INIT_DBG(pm8001_ha,
+-				pm8001_printk("SCRATCH_PAD0 value = 0x%x\n",
+-				pm8001_cr32(pm8001_ha, 0,
+-				MSGU_SCRATCH_PAD_0)));
+-			PM8001_INIT_DBG(pm8001_ha,
+-				pm8001_printk("SCRATCH_PAD3 value = 0x%x\n",
+-				pm8001_cr32(pm8001_ha, 0,
+-				MSGU_SCRATCH_PAD_3)));
++			pm8001_dbg(pm8001_ha, INIT,
++				   "FW not ready SCRATCH_PAD2 = 0x%x\n",
++				   regVal);
++			pm8001_dbg(pm8001_ha, INIT,
++				   "SCRATCH_PAD0 value = 0x%x\n",
++				   pm8001_cr32(pm8001_ha, 0,
++					       MSGU_SCRATCH_PAD_0));
++			pm8001_dbg(pm8001_ha, INIT,
++				   "SCRATCH_PAD3 value = 0x%x\n",
++				   pm8001_cr32(pm8001_ha, 0,
++					       MSGU_SCRATCH_PAD_3));
+ 			spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+ 			return -1;
+ 		}
+@@ -1147,8 +1113,7 @@ pm8001_chip_soft_rst(struct pm8001_hba_info *pm8001_ha)
+ 	pm8001_bar4_shift(pm8001_ha, 0);
+ 	spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+ 
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("SPC soft reset Complete\n"));
++	pm8001_dbg(pm8001_ha, INIT, "SPC soft reset Complete\n");
+ 	return 0;
+ }
+ 
+@@ -1156,8 +1121,7 @@ static void pm8001_hw_chip_rst(struct pm8001_hba_info *pm8001_ha)
+ {
+ 	u32 i;
+ 	u32 regVal;
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("chip reset start\n"));
++	pm8001_dbg(pm8001_ha, INIT, "chip reset start\n");
+ 
+ 	/* do SPC chip reset. */
+ 	regVal = pm8001_cr32(pm8001_ha, 1, SPC_REG_RESET);
+@@ -1181,8 +1145,7 @@ static void pm8001_hw_chip_rst(struct pm8001_hba_info *pm8001_ha)
+ 		mdelay(1);
+ 	} while ((--i) != 0);
+ 
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("chip reset finished\n"));
++	pm8001_dbg(pm8001_ha, INIT, "chip reset finished\n");
+ }
+ 
+ /**
+@@ -1356,12 +1319,18 @@ int pm8001_mpi_build_cmd(struct pm8001_hba_info *pm8001_ha,
+ {
+ 	u32 Header = 0, hpriority = 0, bc = 1, category = 0x02;
+ 	void *pMessage;
+-
+-	if (pm8001_mpi_msg_free_get(circularQ, pm8001_ha->iomb_size,
+-		&pMessage) < 0) {
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("No free mpi buffer\n"));
+-		return -ENOMEM;
++	unsigned long flags;
++	int q_index = circularQ - pm8001_ha->inbnd_q_tbl;
++	int rv = -1;
++
++	WARN_ON(q_index >= PM8001_MAX_INB_NUM);
++	spin_lock_irqsave(&circularQ->iq_lock, flags);
++	rv = pm8001_mpi_msg_free_get(circularQ, pm8001_ha->iomb_size,
++			&pMessage);
++	if (rv < 0) {
++		pm8001_dbg(pm8001_ha, IO, "No free mpi buffer\n");
++		rv = -ENOMEM;
++		goto done;
+ 	}
+ 
+ 	if (nb > (pm8001_ha->iomb_size - sizeof(struct mpi_msg_hdr)))
+@@ -1380,11 +1349,13 @@ int pm8001_mpi_build_cmd(struct pm8001_hba_info *pm8001_ha,
+ 	/*Update the PI to the firmware*/
+ 	pm8001_cw32(pm8001_ha, circularQ->pi_pci_bar,
+ 		circularQ->pi_offset, circularQ->producer_idx);
+-	PM8001_DEVIO_DBG(pm8001_ha,
+-		pm8001_printk("INB Q %x OPCODE:%x , UPDATED PI=%d CI=%d\n",
+-			responseQueue, opCode, circularQ->producer_idx,
+-			circularQ->consumer_index));
+-	return 0;
++	pm8001_dbg(pm8001_ha, DEVIO,
++		   "INB Q %x OPCODE:%x , UPDATED PI=%d CI=%d\n",
++		   responseQueue, opCode, circularQ->producer_idx,
++		   circularQ->consumer_index);
++done:
++	spin_unlock_irqrestore(&circularQ->iq_lock, flags);
++	return rv;
+ }
+ 
+ u32 pm8001_mpi_msg_free_set(struct pm8001_hba_info *pm8001_ha, void *pMsg,
+@@ -1398,17 +1369,17 @@ u32 pm8001_mpi_msg_free_set(struct pm8001_hba_info *pm8001_ha, void *pMsg,
+ 	pOutBoundMsgHeader = (struct mpi_msg_hdr *)(circularQ->base_virt +
+ 				circularQ->consumer_idx * pm8001_ha->iomb_size);
+ 	if (pOutBoundMsgHeader != msgHeader) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("consumer_idx = %d msgHeader = %p\n",
+-			circularQ->consumer_idx, msgHeader));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "consumer_idx = %d msgHeader = %p\n",
++			   circularQ->consumer_idx, msgHeader);
+ 
+ 		/* Update the producer index from SPC */
+ 		producer_index = pm8001_read_32(circularQ->pi_virt);
+ 		circularQ->producer_index = cpu_to_le32(producer_index);
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("consumer_idx = %d producer_index = %d"
+-			"msgHeader = %p\n", circularQ->consumer_idx,
+-			circularQ->producer_index, msgHeader));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "consumer_idx = %d producer_index = %dmsgHeader = %p\n",
++			   circularQ->consumer_idx,
++			   circularQ->producer_index, msgHeader);
+ 		return 0;
+ 	}
+ 	/* free the circular queue buffer elements associated with the message*/
+@@ -1420,9 +1391,8 @@ u32 pm8001_mpi_msg_free_set(struct pm8001_hba_info *pm8001_ha, void *pMsg,
+ 	/* Update the producer index from SPC*/
+ 	producer_index = pm8001_read_32(circularQ->pi_virt);
+ 	circularQ->producer_index = cpu_to_le32(producer_index);
+-	PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk(" CI=%d PI=%d\n", circularQ->consumer_idx,
+-		circularQ->producer_index));
++	pm8001_dbg(pm8001_ha, IO, " CI=%d PI=%d\n",
++		   circularQ->consumer_idx, circularQ->producer_index);
+ 	return 0;
+ }
+ 
+@@ -1452,10 +1422,10 @@ u32 pm8001_mpi_msg_consume(struct pm8001_hba_info *pm8001_ha,
+ 			/* read header */
+ 			header_tmp = pm8001_read_32(msgHeader);
+ 			msgHeader_tmp = cpu_to_le32(header_tmp);
+-			PM8001_DEVIO_DBG(pm8001_ha, pm8001_printk(
+-				"outbound opcode msgheader:%x ci=%d pi=%d\n",
+-				msgHeader_tmp, circularQ->consumer_idx,
+-				circularQ->producer_index));
++			pm8001_dbg(pm8001_ha, DEVIO,
++				   "outbound opcode msgheader:%x ci=%d pi=%d\n",
++				   msgHeader_tmp, circularQ->consumer_idx,
++				   circularQ->producer_index);
+ 			if (0 != (le32_to_cpu(msgHeader_tmp) & 0x80000000)) {
+ 				if (OPC_OUB_SKIP_ENTRY !=
+ 					(le32_to_cpu(msgHeader_tmp) & 0xfff)) {
+@@ -1464,12 +1434,11 @@ u32 pm8001_mpi_msg_consume(struct pm8001_hba_info *pm8001_ha,
+ 						sizeof(struct mpi_msg_hdr);
+ 					*pBC = (u8)((le32_to_cpu(msgHeader_tmp)
+ 						>> 24) & 0x1f);
+-					PM8001_IO_DBG(pm8001_ha,
+-						pm8001_printk(": CI=%d PI=%d "
+-						"msgHeader=%x\n",
+-						circularQ->consumer_idx,
+-						circularQ->producer_index,
+-						msgHeader_tmp));
++					pm8001_dbg(pm8001_ha, IO,
++						   ": CI=%d PI=%d msgHeader=%x\n",
++						   circularQ->consumer_idx,
++						   circularQ->producer_index,
++						   msgHeader_tmp);
+ 					return MPI_IO_STATUS_SUCCESS;
+ 				} else {
+ 					circularQ->consumer_idx =
+@@ -1578,17 +1547,15 @@ void pm8001_work_fn(struct work_struct *work)
+ 		ts->stat = SAS_QUEUE_FULL;
+ 		pm8001_dev = ccb->device;
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		spin_lock_irqsave(&t->task_state_lock, flags1);
+ 		t->task_state_flags &= ~SAS_TASK_STATE_PENDING;
+ 		t->task_state_flags &= ~SAS_TASK_AT_INITIATOR;
+ 		t->task_state_flags |= SAS_TASK_STATE_DONE;
+ 		if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
+ 			spin_unlock_irqrestore(&t->task_state_lock, flags1);
+-			PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("task 0x%p"
+-				" done with event 0x%x resp 0x%x stat 0x%x but"
+-				" aborted by upper layer!\n",
+-				t, pw->handler, ts->resp, ts->stat));
++			pm8001_dbg(pm8001_ha, FAIL, "task 0x%p done with event 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
++				   t, pw->handler, ts->resp, ts->stat);
+ 			pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
+ 			spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+ 		} else {
+@@ -1608,26 +1575,16 @@ void pm8001_work_fn(struct work_struct *work)
+ 		unsigned long flags, flags1;
+ 		int i, ret = 0;
+ 
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
+ 
+ 		ret = pm8001_query_task(t);
+ 
+-		PM8001_IO_DBG(pm8001_ha,
+-			switch (ret) {
+-			case TMF_RESP_FUNC_SUCC:
+-				pm8001_printk("...Task on lu\n");
+-				break;
+-
+-			case TMF_RESP_FUNC_COMPLETE:
+-				pm8001_printk("...Task NOT on lu\n");
+-				break;
+-
+-			default:
+-				PM8001_DEVIO_DBG(pm8001_ha, pm8001_printk(
+-					"...query task failed!!!\n"));
+-				break;
+-			});
++		if (ret == TMF_RESP_FUNC_SUCC)
++			pm8001_dbg(pm8001_ha, IO, "...Task on lu\n");
++		else if (ret == TMF_RESP_FUNC_COMPLETE)
++			pm8001_dbg(pm8001_ha, IO, "...Task NOT on lu\n");
++		else
++			pm8001_dbg(pm8001_ha, DEVIO, "...query task failed!!!\n");
+ 
+ 		spin_lock_irqsave(&pm8001_ha->lock, flags);
+ 
+@@ -1672,8 +1629,7 @@ void pm8001_work_fn(struct work_struct *work)
+ 				break;
+ 			default: /* device misbehavior */
+ 				ret = TMF_RESP_FUNC_FAILED;
+-				PM8001_IO_DBG(pm8001_ha,
+-					pm8001_printk("...Reset phy\n"));
++				pm8001_dbg(pm8001_ha, IO, "...Reset phy\n");
+ 				pm8001_I_T_nexus_reset(dev);
+ 				break;
+ 			}
+@@ -1687,15 +1643,14 @@ void pm8001_work_fn(struct work_struct *work)
+ 		default: /* device misbehavior */
+ 			spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+ 			ret = TMF_RESP_FUNC_FAILED;
+-			PM8001_IO_DBG(pm8001_ha,
+-				pm8001_printk("...Reset phy\n"));
++			pm8001_dbg(pm8001_ha, IO, "...Reset phy\n");
+ 			pm8001_I_T_nexus_reset(dev);
+ 		}
+ 
+ 		if (ret == TMF_RESP_FUNC_FAILED)
+ 			t = NULL;
+ 		pm8001_open_reject_retry(pm8001_ha, t, pm8001_dev);
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk("...Complete\n"));
++		pm8001_dbg(pm8001_ha, IO, "...Complete\n");
+ 	}	break;
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS:
+ 		dev = pm8001_dev->sas_device;
+@@ -1749,15 +1704,14 @@ static void pm8001_send_abort_all(struct pm8001_hba_info *pm8001_ha,
+ 	int ret;
+ 
+ 	if (!pm8001_ha_dev) {
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("dev is null\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "dev is null\n");
+ 		return;
+ 	}
+ 
+ 	task = sas_alloc_slow_task(GFP_ATOMIC);
+ 
+ 	if (!task) {
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("cannot "
+-						"allocate task\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "cannot allocate task\n");
+ 		return;
+ 	}
+ 
+@@ -1802,8 +1756,7 @@ static void pm8001_send_read_log(struct pm8001_hba_info *pm8001_ha,
+ 	task = sas_alloc_slow_task(GFP_ATOMIC);
+ 
+ 	if (!task) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("cannot allocate task !!!\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "cannot allocate task !!!\n");
+ 		return;
+ 	}
+ 	task->task_done = pm8001_task_done;
+@@ -1811,8 +1764,7 @@ static void pm8001_send_read_log(struct pm8001_hba_info *pm8001_ha,
+ 	res = pm8001_tag_alloc(pm8001_ha, &ccb_tag);
+ 	if (res) {
+ 		sas_free_task(task);
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("cannot allocate tag !!!\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "cannot allocate tag !!!\n");
+ 		return;
+ 	}
+ 
+@@ -1823,8 +1775,8 @@ static void pm8001_send_read_log(struct pm8001_hba_info *pm8001_ha,
+ 	if (!dev) {
+ 		sas_free_task(task);
+ 		pm8001_tag_free(pm8001_ha, ccb_tag);
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("Domain device cannot be allocated\n"));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "Domain device cannot be allocated\n");
+ 		return;
+ 	}
+ 	task->dev = dev;
+@@ -1901,27 +1853,25 @@ mpi_ssp_completion(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 	t = ccb->task;
+ 
+ 	if (status && status != IO_UNDERFLOW)
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("sas IO status 0x%x\n", status));
++		pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", status);
+ 	if (unlikely(!t || !t->lldd_task || !t->dev))
+ 		return;
+ 	ts = &t->task_status;
+ 	/* Print sas address of IO failed device */
+ 	if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) &&
+ 		(status != IO_UNDERFLOW))
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("SAS Address of IO Failure Drive:"
+-			"%016llx", SAS_ADDR(t->dev->sas_addr)));
++		pm8001_dbg(pm8001_ha, FAIL, "SAS Address of IO Failure Drive:%016llx\n",
++			   SAS_ADDR(t->dev->sas_addr));
+ 
+ 	if (status)
+-		PM8001_IOERR_DBG(pm8001_ha, pm8001_printk(
+-			"status:0x%x, tag:0x%x, task:0x%p\n",
+-			status, tag, t));
++		pm8001_dbg(pm8001_ha, IOERR,
++			   "status:0x%x, tag:0x%x, task:0x%p\n",
++			   status, tag, t);
+ 
+ 	switch (status) {
+ 	case IO_SUCCESS:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_SUCCESS"
+-			",param = %d\n", param));
++		pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS,param = %d\n",
++			   param);
+ 		if (param == 0) {
+ 			ts->resp = SAS_TASK_COMPLETE;
+ 			ts->stat = SAM_STAT_GOOD;
+@@ -1933,69 +1883,63 @@ mpi_ssp_completion(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 			sas_ssp_task_response(pm8001_ha->dev, t, iu);
+ 		}
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_ABORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_ABORTED IOMB Tag\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_ABORTED_TASK;
+ 		break;
+ 	case IO_UNDERFLOW:
+ 		/* SSP Completion with error */
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW"
+-			",param = %d\n", param));
++		pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW,param = %d\n",
++			   param);
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_UNDERRUN;
+ 		ts->residual = param;
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_NO_DEVICE:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_NO_DEVICE\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n");
+ 		ts->resp = SAS_TASK_UNDELIVERED;
+ 		ts->stat = SAS_PHY_DOWN;
+ 		break;
+ 	case IO_XFER_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		/* Force the midlayer to retry */
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	case IO_XFER_ERROR_PHY_NOT_READY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_EPROTO;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_UNKNOWN;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_UNKNOWN;
+@@ -2005,68 +1949,59 @@ mpi_ssp_completion(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 				IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_BAD_DEST;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_CONNECTION_RATE_"
+-			"NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_CONN_RATE;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
+ 		ts->resp = SAS_TASK_UNDELIVERED;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
+ 		break;
+ 	case IO_XFER_ERROR_NAK_RECEIVED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	case IO_XFER_ERROR_ACK_NAK_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_NAK_R_ERR;
+ 		break;
+ 	case IO_XFER_ERROR_DMA:
+-		PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("IO_XFER_ERROR_DMA\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		break;
+ 	case IO_XFER_OPEN_RETRY_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	case IO_XFER_ERROR_OFFSET_MISMATCH:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		break;
+ 	case IO_PORT_IN_RESET:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_PORT_IN_RESET\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		break;
+ 	case IO_DS_NON_OPERATIONAL:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_DS_NON_OPERATIONAL\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		if (!t->uldd_task)
+@@ -2075,51 +2010,44 @@ mpi_ssp_completion(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 				IO_DS_NON_OPERATIONAL);
+ 		break;
+ 	case IO_DS_IN_RECOVERY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_DS_IN_RECOVERY\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		break;
+ 	case IO_TM_TAG_NOT_FOUND:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_TM_TAG_NOT_FOUND\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_TM_TAG_NOT_FOUND\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		break;
+ 	case IO_SSP_EXT_IU_ZERO_LEN_ERROR:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_SSP_EXT_IU_ZERO_LEN_ERROR\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_SSP_EXT_IU_ZERO_LEN_ERROR\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	default:
+-		PM8001_DEVIO_DBG(pm8001_ha,
+-			pm8001_printk("Unknown status 0x%x\n", status));
++		pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status);
+ 		/* not allowed case. Therefore, return failed status */
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		break;
+ 	}
+-	PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("scsi_status = %x\n ",
+-		psspPayload->ssp_resp_iu.status));
++	pm8001_dbg(pm8001_ha, IO, "scsi_status = %x\n",
++		   psspPayload->ssp_resp_iu.status);
+ 	spin_lock_irqsave(&t->task_state_lock, flags);
+ 	t->task_state_flags &= ~SAS_TASK_STATE_PENDING;
+ 	t->task_state_flags &= ~SAS_TASK_AT_INITIATOR;
+ 	t->task_state_flags |= SAS_TASK_STATE_DONE;
+ 	if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
+ 		spin_unlock_irqrestore(&t->task_state_lock, flags);
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("task 0x%p done with"
+-			" io_status 0x%x resp 0x%x "
+-			"stat 0x%x but aborted by upper layer!\n",
+-			t, status, ts->resp, ts->stat));
++		pm8001_dbg(pm8001_ha, FAIL, "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
++			   t, status, ts->resp, ts->stat);
+ 		pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
+ 	} else {
+ 		spin_unlock_irqrestore(&t->task_state_lock, flags);
+@@ -2148,60 +2076,52 @@ static void mpi_ssp_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 	t = ccb->task;
+ 	pm8001_dev = ccb->device;
+ 	if (event)
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("sas IO status 0x%x\n", event));
++		pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", event);
+ 	if (unlikely(!t || !t->lldd_task || !t->dev))
+ 		return;
+ 	ts = &t->task_status;
+-	PM8001_DEVIO_DBG(pm8001_ha,
+-		pm8001_printk("port_id = %x,device_id = %x\n",
+-		port_id, dev_id));
++	pm8001_dbg(pm8001_ha, DEVIO, "port_id = %x,device_id = %x\n",
++		   port_id, dev_id);
+ 	switch (event) {
+ 	case IO_OVERFLOW:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n");)
++		pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		ts->residual = 0;
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
+ 		pm8001_handle_event(pm8001_ha, t, IO_XFER_ERROR_BREAK);
+ 		return;
+ 	case IO_XFER_ERROR_PHY_NOT_READY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT"
+-			"_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_EPROTO;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_UNKNOWN;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_UNKNOWN;
+@@ -2211,88 +2131,78 @@ static void mpi_ssp_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 				IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_BAD_DEST;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_CONNECTION_RATE_"
+-			"NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_CONN_RATE;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-		       pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
+ 		break;
+ 	case IO_XFER_ERROR_NAK_RECEIVED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	case IO_XFER_ERROR_ACK_NAK_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_NAK_R_ERR;
+ 		break;
+ 	case IO_XFER_OPEN_RETRY_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
+ 		pm8001_handle_event(pm8001_ha, t, IO_XFER_OPEN_RETRY_TIMEOUT);
+ 		return;
+ 	case IO_XFER_ERROR_UNEXPECTED_PHASE:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_UNEXPECTED_PHASE\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		break;
+ 	case IO_XFER_ERROR_XFER_RDY_OVERRUN:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_XFER_RDY_OVERRUN\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		break;
+ 	case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-		       pm8001_printk("IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		break;
+ 	case IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		break;
+ 	case IO_XFER_ERROR_OFFSET_MISMATCH:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		break;
+ 	case IO_XFER_ERROR_XFER_ZERO_DATA_LEN:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		break;
+ 	case IO_XFER_CMD_FRAME_ISSUED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("  IO_XFER_CMD_FRAME_ISSUED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n");
+ 		return;
+ 	default:
+-		PM8001_DEVIO_DBG(pm8001_ha,
+-			pm8001_printk("Unknown status 0x%x\n", event));
++		pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", event);
+ 		/* not allowed case. Therefore, return failed status */
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+@@ -2304,10 +2214,8 @@ static void mpi_ssp_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 	t->task_state_flags |= SAS_TASK_STATE_DONE;
+ 	if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
+ 		spin_unlock_irqrestore(&t->task_state_lock, flags);
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("task 0x%p done with"
+-			" event 0x%x resp 0x%x "
+-			"stat 0x%x but aborted by upper layer!\n",
+-			t, event, ts->resp, ts->stat));
++		pm8001_dbg(pm8001_ha, FAIL, "task 0x%p done with event 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
++			   t, event, ts->resp, ts->stat);
+ 		pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
+ 	} else {
+ 		spin_unlock_irqrestore(&t->task_state_lock, flags);
+@@ -2343,8 +2251,7 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	tag = le32_to_cpu(psataPayload->tag);
+ 
+ 	if (!tag) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("tag null\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "tag null\n");
+ 		return;
+ 	}
+ 	ccb = &pm8001_ha->ccb_info[tag];
+@@ -2353,8 +2260,7 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		t = ccb->task;
+ 		pm8001_dev = ccb->device;
+ 	} else {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("ccb null\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "ccb null\n");
+ 		return;
+ 	}
+ 
+@@ -2362,29 +2268,26 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		if (t->dev && (t->dev->lldd_dev))
+ 			pm8001_dev = t->dev->lldd_dev;
+ 	} else {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("task null\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "task null\n");
+ 		return;
+ 	}
+ 
+ 	if ((pm8001_dev && !(pm8001_dev->id & NCQ_READ_LOG_FLAG))
+ 		&& unlikely(!t || !t->lldd_task || !t->dev)) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("task or dev null\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "task or dev null\n");
+ 		return;
+ 	}
+ 
+ 	ts = &t->task_status;
+ 	if (!ts) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("ts null\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "ts null\n");
+ 		return;
+ 	}
+ 
+ 	if (status)
+-		PM8001_IOERR_DBG(pm8001_ha, pm8001_printk(
+-			"status:0x%x, tag:0x%x, task::0x%p\n",
+-			status, tag, t));
++		pm8001_dbg(pm8001_ha, IOERR,
++			   "status:0x%x, tag:0x%x, task::0x%p\n",
++			   status, tag, t);
+ 
+ 	/* Print sas address of IO failed device */
+ 	if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) &&
+@@ -2416,19 +2319,19 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 						& 0xff000000)) +
+ 						pm8001_dev->attached_phy +
+ 						0x10);
+-			PM8001_FAIL_DBG(pm8001_ha,
+-				pm8001_printk("SAS Address of IO Failure Drive:"
+-				"%08x%08x", temp_sata_addr_hi,
+-					temp_sata_addr_low));
++			pm8001_dbg(pm8001_ha, FAIL,
++				   "SAS Address of IO Failure Drive:%08x%08x\n",
++				   temp_sata_addr_hi,
++				   temp_sata_addr_low);
+ 		} else {
+-			PM8001_FAIL_DBG(pm8001_ha,
+-				pm8001_printk("SAS Address of IO Failure Drive:"
+-				"%016llx", SAS_ADDR(t->dev->sas_addr)));
++			pm8001_dbg(pm8001_ha, FAIL,
++				   "SAS Address of IO Failure Drive:%016llx\n",
++				   SAS_ADDR(t->dev->sas_addr));
+ 		}
+ 	}
+ 	switch (status) {
+ 	case IO_SUCCESS:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_SUCCESS\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n");
+ 		if (param == 0) {
+ 			ts->resp = SAS_TASK_COMPLETE;
+ 			ts->stat = SAM_STAT_GOOD;
+@@ -2450,99 +2353,102 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 			ts->resp = SAS_TASK_COMPLETE;
+ 			ts->stat = SAS_PROTO_RESPONSE;
+ 			ts->residual = param;
+-			PM8001_IO_DBG(pm8001_ha,
+-				pm8001_printk("SAS_PROTO_RESPONSE len = %d\n",
+-				param));
++			pm8001_dbg(pm8001_ha, IO,
++				   "SAS_PROTO_RESPONSE len = %d\n",
++				   param);
+ 			sata_resp = &psataPayload->sata_resp[0];
+ 			resp = (struct ata_task_resp *)ts->buf;
+ 			if (t->ata_task.dma_xfer == 0 &&
+ 			    t->data_dir == DMA_FROM_DEVICE) {
+ 				len = sizeof(struct pio_setup_fis);
+-				PM8001_IO_DBG(pm8001_ha,
+-				pm8001_printk("PIO read len = %d\n", len));
++				pm8001_dbg(pm8001_ha, IO,
++					   "PIO read len = %d\n", len);
+ 			} else if (t->ata_task.use_ncq) {
+ 				len = sizeof(struct set_dev_bits_fis);
+-				PM8001_IO_DBG(pm8001_ha,
+-					pm8001_printk("FPDMA len = %d\n", len));
++				pm8001_dbg(pm8001_ha, IO, "FPDMA len = %d\n",
++					   len);
+ 			} else {
+ 				len = sizeof(struct dev_to_host_fis);
+-				PM8001_IO_DBG(pm8001_ha,
+-				pm8001_printk("other len = %d\n", len));
++				pm8001_dbg(pm8001_ha, IO, "other len = %d\n",
++					   len);
+ 			}
+ 			if (SAS_STATUS_BUF_SIZE >= sizeof(*resp)) {
+ 				resp->frame_len = len;
+ 				memcpy(&resp->ending_fis[0], sata_resp, len);
+ 				ts->buf_valid_size = sizeof(*resp);
+ 			} else
+-				PM8001_IO_DBG(pm8001_ha,
+-					pm8001_printk("response to large\n"));
++				pm8001_dbg(pm8001_ha, IO,
++					   "response too large\n");
+ 		}
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_ABORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_ABORTED IOMB Tag\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_ABORTED_TASK;
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 		/* following cases are to do cases */
+ 	case IO_UNDERFLOW:
+ 		/* SATA Completion with error */
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_UNDERFLOW param = %d\n", param));
++		pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW param = %d\n", param);
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_UNDERRUN;
+ 		ts->residual =  param;
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_NO_DEVICE:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_NO_DEVICE\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n");
+ 		ts->resp = SAS_TASK_UNDELIVERED;
+ 		ts->stat = SAS_PHY_DOWN;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_INTERRUPTED;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_PHY_NOT_READY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT"
+-			"_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_EPROTO;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_UNKNOWN;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_CONT0;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
+ 		if (!t->uldd_task) {
+@@ -2556,8 +2462,8 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		}
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
+ 		ts->resp = SAS_TASK_UNDELIVERED;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_BAD_DEST;
+@@ -2572,17 +2478,15 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		}
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_CONNECTION_RATE_"
+-			"NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_CONN_RATE;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_STP_RESOURCES"
+-			"_BUSY\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
+ 		if (!t->uldd_task) {
+@@ -2596,57 +2500,65 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		}
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-		       pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_NAK_RECEIVED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_NAK_R_ERR;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_ACK_NAK_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_NAK_R_ERR;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_DMA:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_DMA\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_ABORTED_TASK;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_SATA_LINK_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_SATA_LINK_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_SATA_LINK_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_UNDELIVERED;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_REJECTED_NCQ_MODE:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_REJECTED_NCQ_MODE\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_UNDERRUN;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_OPEN_RETRY_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_PORT_IN_RESET:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_PORT_IN_RESET\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_DS_NON_OPERATIONAL:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_DS_NON_OPERATIONAL\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
+ 		if (!t->uldd_task) {
+@@ -2659,14 +2571,14 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		}
+ 		break;
+ 	case IO_DS_IN_RECOVERY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("  IO_DS_IN_RECOVERY\n"));
++		pm8001_dbg(pm8001_ha, IO, "  IO_DS_IN_RECOVERY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_DS_IN_ERROR:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_DS_IN_ERROR\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_ERROR\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
+ 		if (!t->uldd_task) {
+@@ -2679,18 +2591,21 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		}
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	default:
+-		PM8001_DEVIO_DBG(pm8001_ha,
+-			pm8001_printk("Unknown status 0x%x\n", status));
++		pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status);
+ 		/* not allowed case. Therefore, return failed status */
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	}
+ 	spin_lock_irqsave(&t->task_state_lock, flags);
+@@ -2699,10 +2614,9 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	t->task_state_flags |= SAS_TASK_STATE_DONE;
+ 	if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
+ 		spin_unlock_irqrestore(&t->task_state_lock, flags);
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("task 0x%p done with io_status 0x%x"
+-			" resp 0x%x stat 0x%x but aborted by upper layer!\n",
+-			t, status, ts->resp, ts->stat));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
++			   t, status, ts->resp, ts->stat);
+ 		pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
+ 	} else {
+ 		spin_unlock_irqrestore(&t->task_state_lock, flags);
+@@ -2731,12 +2645,10 @@ static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 		t = ccb->task;
+ 		pm8001_dev = ccb->device;
+ 	} else {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("No CCB !!!. returning\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "No CCB !!!. returning\n");
+ 	}
+ 	if (event)
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("SATA EVENT 0x%x\n", event));
++		pm8001_dbg(pm8001_ha, FAIL, "SATA EVENT 0x%x\n", event);
+ 
+ 	/* Check if this is NCQ error */
+ 	if (event == IO_XFER_ERROR_ABORTED_NCQ_MODE) {
+@@ -2752,61 +2664,54 @@ static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 	t = ccb->task;
+ 	pm8001_dev = ccb->device;
+ 	if (event)
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("sata IO status 0x%x\n", event));
++		pm8001_dbg(pm8001_ha, FAIL, "sata IO status 0x%x\n", event);
+ 	if (unlikely(!t || !t->lldd_task || !t->dev))
+ 		return;
+ 	ts = &t->task_status;
+-	PM8001_DEVIO_DBG(pm8001_ha, pm8001_printk(
+-		"port_id:0x%x, device_id:0x%x, tag:0x%x, event:0x%x\n",
+-		port_id, dev_id, tag, event));
++	pm8001_dbg(pm8001_ha, DEVIO,
++		   "port_id:0x%x, device_id:0x%x, tag:0x%x, event:0x%x\n",
++		   port_id, dev_id, tag, event);
+ 	switch (event) {
+ 	case IO_OVERFLOW:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		ts->residual = 0;
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_INTERRUPTED;
+ 		break;
+ 	case IO_XFER_ERROR_PHY_NOT_READY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT"
+-			"_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_EPROTO;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_UNKNOWN;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_CONT0;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
+ 		ts->resp = SAS_TASK_UNDELIVERED;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
+ 		if (!t->uldd_task) {
+@@ -2820,94 +2725,82 @@ static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 		}
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
+ 		ts->resp = SAS_TASK_UNDELIVERED;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_BAD_DEST;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_CONNECTION_RATE_"
+-			"NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_CONN_RATE;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-		       pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
+ 		break;
+ 	case IO_XFER_ERROR_NAK_RECEIVED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_NAK_R_ERR;
+ 		break;
+ 	case IO_XFER_ERROR_PEER_ABORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_PEER_ABORTED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PEER_ABORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_NAK_R_ERR;
+ 		break;
+ 	case IO_XFER_ERROR_REJECTED_NCQ_MODE:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_REJECTED_NCQ_MODE\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_UNDERRUN;
+ 		break;
+ 	case IO_XFER_OPEN_RETRY_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
+ 		break;
+ 	case IO_XFER_ERROR_UNEXPECTED_PHASE:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_UNEXPECTED_PHASE\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
+ 		break;
+ 	case IO_XFER_ERROR_XFER_RDY_OVERRUN:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_XFER_RDY_OVERRUN\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
+ 		break;
+ 	case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-		       pm8001_printk("IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
+ 		break;
+ 	case IO_XFER_ERROR_OFFSET_MISMATCH:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
+ 		break;
+ 	case IO_XFER_ERROR_XFER_ZERO_DATA_LEN:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
+ 		break;
+ 	case IO_XFER_CMD_FRAME_ISSUED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_CMD_FRAME_ISSUED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n");
+ 		break;
+ 	case IO_XFER_PIO_SETUP_ERROR:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_PIO_SETUP_ERROR\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_PIO_SETUP_ERROR\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
+ 		break;
+ 	default:
+-		PM8001_DEVIO_DBG(pm8001_ha,
+-			pm8001_printk("Unknown status 0x%x\n", event));
++		pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", event);
+ 		/* not allowed case. Therefore, return failed status */
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
+@@ -2919,10 +2812,9 @@ static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 	t->task_state_flags |= SAS_TASK_STATE_DONE;
+ 	if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
+ 		spin_unlock_irqrestore(&t->task_state_lock, flags);
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("task 0x%p done with io_status 0x%x"
+-			" resp 0x%x stat 0x%x but aborted by upper layer!\n",
+-			t, event, ts->resp, ts->stat));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
++			   t, event, ts->resp, ts->stat);
+ 		pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
+ 	} else {
+ 		spin_unlock_irqrestore(&t->task_state_lock, flags);
+@@ -2952,86 +2844,79 @@ mpi_smp_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	ts = &t->task_status;
+ 	pm8001_dev = ccb->device;
+ 	if (status) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("smp IO status 0x%x\n", status));
+-		PM8001_IOERR_DBG(pm8001_ha,
+-			pm8001_printk("status:0x%x, tag:0x%x, task:0x%p\n",
+-			status, tag, t));
++		pm8001_dbg(pm8001_ha, FAIL, "smp IO status 0x%x\n", status);
++		pm8001_dbg(pm8001_ha, IOERR,
++			   "status:0x%x, tag:0x%x, task:0x%p\n",
++			   status, tag, t);
+ 	}
+ 	if (unlikely(!t || !t->lldd_task || !t->dev))
+ 		return;
+ 
+ 	switch (status) {
+ 	case IO_SUCCESS:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_SUCCESS\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAM_STAT_GOOD;
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_ABORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_ABORTED IOMB\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_ABORTED_TASK;
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OVERFLOW:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		ts->residual = 0;
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_NO_DEVICE:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_NO_DEVICE\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_PHY_DOWN;
+ 		break;
+ 	case IO_ERROR_HW_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_ERROR_HW_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_ERROR_HW_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAM_STAT_BUSY;
+ 		break;
+ 	case IO_XFER_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAM_STAT_BUSY;
+ 		break;
+ 	case IO_XFER_ERROR_PHY_NOT_READY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAM_STAT_BUSY;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_UNKNOWN;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_UNKNOWN;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_CONT0;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_UNKNOWN;
+@@ -3040,76 +2925,67 @@ mpi_smp_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 				IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_BAD_DEST;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_CONNECTION_RATE_"
+-			"NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_CONN_RATE;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-		       pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
+ 		break;
+ 	case IO_XFER_ERROR_RX_FRAME:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_RX_FRAME\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_RX_FRAME\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
+ 		break;
+ 	case IO_XFER_OPEN_RETRY_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	case IO_ERROR_INTERNAL_SMP_RESOURCE:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_ERROR_INTERNAL_SMP_RESOURCE\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_ERROR_INTERNAL_SMP_RESOURCE\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_QUEUE_FULL;
+ 		break;
+ 	case IO_PORT_IN_RESET:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_PORT_IN_RESET\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	case IO_DS_NON_OPERATIONAL:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_DS_NON_OPERATIONAL\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
+ 		break;
+ 	case IO_DS_IN_RECOVERY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_DS_IN_RECOVERY\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	default:
+-		PM8001_DEVIO_DBG(pm8001_ha,
+-			pm8001_printk("Unknown status 0x%x\n", status));
++		pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status);
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
+ 		/* not allowed case. Therefore, return failed status */
+@@ -3121,10 +2997,8 @@ mpi_smp_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	t->task_state_flags |= SAS_TASK_STATE_DONE;
+ 	if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
+ 		spin_unlock_irqrestore(&t->task_state_lock, flags);
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("task 0x%p done with"
+-			" io_status 0x%x resp 0x%x "
+-			"stat 0x%x but aborted by upper layer!\n",
+-			t, status, ts->resp, ts->stat));
++		pm8001_dbg(pm8001_ha, FAIL, "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
++			   t, status, ts->resp, ts->stat);
+ 		pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
+ 	} else {
+ 		spin_unlock_irqrestore(&t->task_state_lock, flags);
+@@ -3146,9 +3020,8 @@ void pm8001_mpi_set_dev_state_resp(struct pm8001_hba_info *pm8001_ha,
+ 	u32 device_id = le32_to_cpu(pPayload->device_id);
+ 	u8 pds = le32_to_cpu(pPayload->pds_nds) & PDS_BITS;
+ 	u8 nds = le32_to_cpu(pPayload->pds_nds) & NDS_BITS;
+-	PM8001_MSG_DBG(pm8001_ha, pm8001_printk("Set device id = 0x%x state "
+-		"from 0x%x to 0x%x status = 0x%x!\n",
+-		device_id, pds, nds, status));
++	pm8001_dbg(pm8001_ha, MSG, "Set device id = 0x%x state from 0x%x to 0x%x status = 0x%x!\n",
++		   device_id, pds, nds, status);
+ 	complete(pm8001_dev->setds_completion);
+ 	ccb->task = NULL;
+ 	ccb->ccb_tag = 0xFFFFFFFF;
+@@ -3163,10 +3036,9 @@ void pm8001_mpi_set_nvmd_resp(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	struct pm8001_ccb_info *ccb = &pm8001_ha->ccb_info[tag];
+ 	u32 dlen_status = le32_to_cpu(pPayload->dlen_status);
+ 	complete(pm8001_ha->nvmd_completion);
+-	PM8001_MSG_DBG(pm8001_ha, pm8001_printk("Set nvm data complete!\n"));
++	pm8001_dbg(pm8001_ha, MSG, "Set nvm data complete!\n");
+ 	if ((dlen_status & NVMD_STAT) != 0) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("Set nvm data error!\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "Set nvm data error!\n");
+ 		return;
+ 	}
+ 	ccb->task = NULL;
+@@ -3188,26 +3060,22 @@ pm8001_mpi_get_nvmd_resp(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	void *virt_addr = pm8001_ha->memoryMap.region[NVMD].virt_ptr;
+ 	fw_control_context = ccb->fw_control_context;
+ 
+-	PM8001_MSG_DBG(pm8001_ha, pm8001_printk("Get nvm data complete!\n"));
++	pm8001_dbg(pm8001_ha, MSG, "Get nvm data complete!\n");
+ 	if ((dlen_status & NVMD_STAT) != 0) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("Get nvm data error!\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "Get nvm data error!\n");
+ 		complete(pm8001_ha->nvmd_completion);
+ 		return;
+ 	}
+ 
+ 	if (ir_tds_bn_dps_das_nvm & IPMode) {
+ 		/* indirect mode - IR bit set */
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("Get NVMD success, IR=1\n"));
++		pm8001_dbg(pm8001_ha, MSG, "Get NVMD success, IR=1\n");
+ 		if ((ir_tds_bn_dps_das_nvm & NVMD_TYPE) == TWI_DEVICE) {
+ 			if (ir_tds_bn_dps_das_nvm == 0x80a80200) {
+ 				memcpy(pm8001_ha->sas_addr,
+ 				      ((u8 *)virt_addr + 4),
+ 				       SAS_ADDR_SIZE);
+-				PM8001_MSG_DBG(pm8001_ha,
+-					pm8001_printk("Get SAS address"
+-					" from VPD successfully!\n"));
++				pm8001_dbg(pm8001_ha, MSG, "Get SAS address from VPD successfully!\n");
+ 			}
+ 		} else if (((ir_tds_bn_dps_das_nvm & NVMD_TYPE) == C_SEEPROM)
+ 			|| ((ir_tds_bn_dps_das_nvm & NVMD_TYPE) == VPD_FLASH) ||
+@@ -3218,14 +3086,14 @@ pm8001_mpi_get_nvmd_resp(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 			;
+ 		} else {
+ 			/* Should not be happened*/
+-			PM8001_MSG_DBG(pm8001_ha,
+-				pm8001_printk("(IR=1)Wrong Device type 0x%x\n",
+-				ir_tds_bn_dps_das_nvm));
++			pm8001_dbg(pm8001_ha, MSG,
++				   "(IR=1)Wrong Device type 0x%x\n",
++				   ir_tds_bn_dps_das_nvm);
+ 		}
+ 	} else /* direct mode */{
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("Get NVMD success, IR=0, dataLen=%d\n",
+-			(dlen_status & NVMD_LEN) >> 24));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "Get NVMD success, IR=0, dataLen=%d\n",
++			   (dlen_status & NVMD_LEN) >> 24);
+ 	}
+ 	/* Though fw_control_context is freed below, usrAddr still needs
+ 	 * to be updated as this holds the response to the request function
+@@ -3234,10 +3102,15 @@ pm8001_mpi_get_nvmd_resp(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		pm8001_ha->memoryMap.region[NVMD].virt_ptr,
+ 		fw_control_context->len);
+ 	kfree(ccb->fw_control_context);
++	/* To avoid race condition, complete should be
++	 * called after the message is copied to
++	 * fw_control_context->usrAddr
++	 */
++	complete(pm8001_ha->nvmd_completion);
++	pm8001_dbg(pm8001_ha, MSG, "Set nvm data complete!\n");
+ 	ccb->task = NULL;
+ 	ccb->ccb_tag = 0xFFFFFFFF;
+ 	pm8001_tag_free(pm8001_ha, tag);
+-	complete(pm8001_ha->nvmd_completion);
+ }
+ 
+ int pm8001_mpi_local_phy_ctl(struct pm8001_hba_info *pm8001_ha, void *piomb)
+@@ -3250,13 +3123,13 @@ int pm8001_mpi_local_phy_ctl(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	u32 phy_op = le32_to_cpu(pPayload->phyop_phyid) & OP_BITS;
+ 	tag = le32_to_cpu(pPayload->tag);
+ 	if (status != 0) {
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("%x phy execute %x phy op failed!\n",
+-			phy_id, phy_op));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "%x phy execute %x phy op failed!\n",
++			   phy_id, phy_op);
+ 	} else {
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("%x phy execute %x phy op success!\n",
+-			phy_id, phy_op));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "%x phy execute %x phy op success!\n",
++			   phy_id, phy_op);
+ 		pm8001_ha->phy[phy_id].reset_success = true;
+ 	}
+ 	if (pm8001_ha->phy[phy_id].enable_completion) {
+@@ -3303,10 +3176,10 @@ void pm8001_bytes_dmaed(struct pm8001_hba_info *pm8001_ha, int i)
+ 	} else if (phy->phy_type & PORT_TYPE_SATA) {
+ 		/*Nothing*/
+ 	}
+-	PM8001_MSG_DBG(pm8001_ha, pm8001_printk("phy %d byte dmaded.\n", i));
++	pm8001_dbg(pm8001_ha, MSG, "phy %d byte dmaded.\n", i);
+ 
+ 	sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
+-	pm8001_ha->sas->notify_port_event(sas_phy, PORTE_BYTES_DMAED);
++	sas_notify_port_event(sas_phy, PORTE_BYTES_DMAED);
+ }
+ 
+ /* Get the link rate speed  */
+@@ -3420,43 +3293,39 @@ hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate);
+ 	u8 portstate = (u8)(npip_portstate & 0x0000000F);
+ 	struct pm8001_port *port = &pm8001_ha->port[port_id];
+-	struct sas_ha_struct *sas_ha = pm8001_ha->sas;
+ 	struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
+ 	unsigned long flags;
+ 	u8 deviceType = pPayload->sas_identify.dev_type;
+ 	port->port_state =  portstate;
+ 	phy->phy_state = PHY_STATE_LINK_UP_SPC;
+-	PM8001_MSG_DBG(pm8001_ha,
+-		pm8001_printk("HW_EVENT_SAS_PHY_UP port id = %d, phy id = %d\n",
+-		port_id, phy_id));
++	pm8001_dbg(pm8001_ha, MSG,
++		   "HW_EVENT_SAS_PHY_UP port id = %d, phy id = %d\n",
++		   port_id, phy_id);
+ 
+ 	switch (deviceType) {
+ 	case SAS_PHY_UNUSED:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("device type no device.\n"));
++		pm8001_dbg(pm8001_ha, MSG, "device type no device.\n");
+ 		break;
+ 	case SAS_END_DEVICE:
+-		PM8001_MSG_DBG(pm8001_ha, pm8001_printk("end device.\n"));
++		pm8001_dbg(pm8001_ha, MSG, "end device.\n");
+ 		pm8001_chip_phy_ctl_req(pm8001_ha, phy_id,
+ 			PHY_NOTIFY_ENABLE_SPINUP);
+ 		port->port_attached = 1;
+ 		pm8001_get_lrate_mode(phy, link_rate);
+ 		break;
+ 	case SAS_EDGE_EXPANDER_DEVICE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("expander device.\n"));
++		pm8001_dbg(pm8001_ha, MSG, "expander device.\n");
+ 		port->port_attached = 1;
+ 		pm8001_get_lrate_mode(phy, link_rate);
+ 		break;
+ 	case SAS_FANOUT_EXPANDER_DEVICE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("fanout expander device.\n"));
++		pm8001_dbg(pm8001_ha, MSG, "fanout expander device.\n");
+ 		port->port_attached = 1;
+ 		pm8001_get_lrate_mode(phy, link_rate);
+ 		break;
+ 	default:
+-		PM8001_DEVIO_DBG(pm8001_ha,
+-			pm8001_printk("unknown device type(%x)\n", deviceType));
++		pm8001_dbg(pm8001_ha, DEVIO, "unknown device type(%x)\n",
++			   deviceType);
+ 		break;
+ 	}
+ 	phy->phy_type |= PORT_TYPE_SAS;
+@@ -3467,7 +3336,7 @@ hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	else if (phy->identify.device_type != SAS_PHY_UNUSED)
+ 		phy->identify.target_port_protocols = SAS_PROTOCOL_SMP;
+ 	phy->sas_phy.oob_mode = SAS_OOB_MODE;
+-	sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE);
++	sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE);
+ 	spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags);
+ 	memcpy(phy->frame_rcvd, &pPayload->sas_identify,
+ 		sizeof(struct sas_identify_frame)-4);
+@@ -3499,12 +3368,10 @@ hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate);
+ 	u8 portstate = (u8)(npip_portstate & 0x0000000F);
+ 	struct pm8001_port *port = &pm8001_ha->port[port_id];
+-	struct sas_ha_struct *sas_ha = pm8001_ha->sas;
+ 	struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
+ 	unsigned long flags;
+-	PM8001_DEVIO_DBG(pm8001_ha,
+-		pm8001_printk("HW_EVENT_SATA_PHY_UP port id = %d,"
+-		" phy id = %d\n", port_id, phy_id));
++	pm8001_dbg(pm8001_ha, DEVIO, "HW_EVENT_SATA_PHY_UP port id = %d, phy id = %d\n",
++		   port_id, phy_id);
+ 	port->port_state =  portstate;
+ 	phy->phy_state = PHY_STATE_LINK_UP_SPC;
+ 	port->port_attached = 1;
+@@ -3512,7 +3379,7 @@ hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	phy->phy_type |= PORT_TYPE_SATA;
+ 	phy->phy_attached = 1;
+ 	phy->sas_phy.oob_mode = SATA_OOB_MODE;
+-	sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE);
++	sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE);
+ 	spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags);
+ 	memcpy(phy->frame_rcvd, ((u8 *)&pPayload->sata_fis - 4),
+ 		sizeof(struct dev_to_host_fis));
+@@ -3552,37 +3419,35 @@ hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	case PORT_VALID:
+ 		break;
+ 	case PORT_INVALID:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" PortInvalid portID %d\n", port_id));
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" Last phy Down and port invalid\n"));
++		pm8001_dbg(pm8001_ha, MSG, " PortInvalid portID %d\n",
++			   port_id);
++		pm8001_dbg(pm8001_ha, MSG,
++			   " Last phy Down and port invalid\n");
+ 		port->port_attached = 0;
+ 		pm8001_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN,
+ 			port_id, phy_id, 0, 0);
+ 		break;
+ 	case PORT_IN_RESET:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" Port In Reset portID %d\n", port_id));
++		pm8001_dbg(pm8001_ha, MSG, " Port In Reset portID %d\n",
++			   port_id);
+ 		break;
+ 	case PORT_NOT_ESTABLISHED:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" phy Down and PORT_NOT_ESTABLISHED\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   " phy Down and PORT_NOT_ESTABLISHED\n");
+ 		port->port_attached = 0;
+ 		break;
+ 	case PORT_LOSTCOMM:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" phy Down and PORT_LOSTCOMM\n"));
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" Last phy Down and port invalid\n"));
++		pm8001_dbg(pm8001_ha, MSG, " phy Down and PORT_LOSTCOMM\n");
++		pm8001_dbg(pm8001_ha, MSG,
++			   " Last phy Down and port invalid\n");
+ 		port->port_attached = 0;
+ 		pm8001_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN,
+ 			port_id, phy_id, 0, 0);
+ 		break;
+ 	default:
+ 		port->port_attached = 0;
+-		PM8001_DEVIO_DBG(pm8001_ha,
+-			pm8001_printk(" phy Down and(default) = %x\n",
+-			portstate));
++		pm8001_dbg(pm8001_ha, DEVIO, " phy Down and(default) = %x\n",
++			   portstate);
+ 		break;
+ 
+ 	}
+@@ -3613,44 +3478,42 @@ int pm8001_mpi_reg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	pm8001_dev = ccb->device;
+ 	status = le32_to_cpu(registerRespPayload->status);
+ 	device_id = le32_to_cpu(registerRespPayload->device_id);
+-	PM8001_MSG_DBG(pm8001_ha,
+-		pm8001_printk(" register device is status = %d\n", status));
++	pm8001_dbg(pm8001_ha, MSG, " register device is status = %d\n",
++		   status);
+ 	switch (status) {
+ 	case DEVREG_SUCCESS:
+-		PM8001_MSG_DBG(pm8001_ha, pm8001_printk("DEVREG_SUCCESS\n"));
++		pm8001_dbg(pm8001_ha, MSG, "DEVREG_SUCCESS\n");
+ 		pm8001_dev->device_id = device_id;
+ 		break;
+ 	case DEVREG_FAILURE_OUT_OF_RESOURCE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("DEVREG_FAILURE_OUT_OF_RESOURCE\n"));
++		pm8001_dbg(pm8001_ha, MSG, "DEVREG_FAILURE_OUT_OF_RESOURCE\n");
+ 		break;
+ 	case DEVREG_FAILURE_DEVICE_ALREADY_REGISTERED:
+-		PM8001_MSG_DBG(pm8001_ha,
+-		   pm8001_printk("DEVREG_FAILURE_DEVICE_ALREADY_REGISTERED\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "DEVREG_FAILURE_DEVICE_ALREADY_REGISTERED\n");
+ 		break;
+ 	case DEVREG_FAILURE_INVALID_PHY_ID:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("DEVREG_FAILURE_INVALID_PHY_ID\n"));
++		pm8001_dbg(pm8001_ha, MSG, "DEVREG_FAILURE_INVALID_PHY_ID\n");
+ 		break;
+ 	case DEVREG_FAILURE_PHY_ID_ALREADY_REGISTERED:
+-		PM8001_MSG_DBG(pm8001_ha,
+-		   pm8001_printk("DEVREG_FAILURE_PHY_ID_ALREADY_REGISTERED\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "DEVREG_FAILURE_PHY_ID_ALREADY_REGISTERED\n");
+ 		break;
+ 	case DEVREG_FAILURE_PORT_ID_OUT_OF_RANGE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("DEVREG_FAILURE_PORT_ID_OUT_OF_RANGE\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "DEVREG_FAILURE_PORT_ID_OUT_OF_RANGE\n");
+ 		break;
+ 	case DEVREG_FAILURE_PORT_NOT_VALID_STATE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("DEVREG_FAILURE_PORT_NOT_VALID_STATE\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "DEVREG_FAILURE_PORT_NOT_VALID_STATE\n");
+ 		break;
+ 	case DEVREG_FAILURE_DEVICE_TYPE_NOT_VALID:
+-		PM8001_MSG_DBG(pm8001_ha,
+-		       pm8001_printk("DEVREG_FAILURE_DEVICE_TYPE_NOT_VALID\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "DEVREG_FAILURE_DEVICE_TYPE_NOT_VALID\n");
+ 		break;
+ 	default:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("DEVREG_FAILURE_DEVICE_TYPE_NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "DEVREG_FAILURE_DEVICE_TYPE_NOT_SUPPORTED\n");
+ 		break;
+ 	}
+ 	complete(pm8001_dev->dcompletion);
+@@ -3670,9 +3533,9 @@ int pm8001_mpi_dereg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	status = le32_to_cpu(registerRespPayload->status);
+ 	device_id = le32_to_cpu(registerRespPayload->device_id);
+ 	if (status != 0)
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" deregister device failed ,status = %x"
+-			", device_id = %x\n", status, device_id));
++		pm8001_dbg(pm8001_ha, MSG,
++			   " deregister device failed ,status = %x, device_id = %x\n",
++			   status, device_id);
+ 	return 0;
+ }
+ 
+@@ -3692,44 +3555,37 @@ int pm8001_mpi_fw_flash_update_resp(struct pm8001_hba_info *pm8001_ha,
+ 	status = le32_to_cpu(ppayload->status);
+ 	switch (status) {
+ 	case FLASH_UPDATE_COMPLETE_PENDING_REBOOT:
+-		PM8001_MSG_DBG(pm8001_ha,
+-		pm8001_printk(": FLASH_UPDATE_COMPLETE_PENDING_REBOOT\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   ": FLASH_UPDATE_COMPLETE_PENDING_REBOOT\n");
+ 		break;
+ 	case FLASH_UPDATE_IN_PROGRESS:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(": FLASH_UPDATE_IN_PROGRESS\n"));
++		pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_IN_PROGRESS\n");
+ 		break;
+ 	case FLASH_UPDATE_HDR_ERR:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(": FLASH_UPDATE_HDR_ERR\n"));
++		pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_HDR_ERR\n");
+ 		break;
+ 	case FLASH_UPDATE_OFFSET_ERR:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(": FLASH_UPDATE_OFFSET_ERR\n"));
++		pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_OFFSET_ERR\n");
+ 		break;
+ 	case FLASH_UPDATE_CRC_ERR:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(": FLASH_UPDATE_CRC_ERR\n"));
++		pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_CRC_ERR\n");
+ 		break;
+ 	case FLASH_UPDATE_LENGTH_ERR:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(": FLASH_UPDATE_LENGTH_ERR\n"));
++		pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_LENGTH_ERR\n");
+ 		break;
+ 	case FLASH_UPDATE_HW_ERR:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(": FLASH_UPDATE_HW_ERR\n"));
++		pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_HW_ERR\n");
+ 		break;
+ 	case FLASH_UPDATE_DNLD_NOT_SUPPORTED:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(": FLASH_UPDATE_DNLD_NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   ": FLASH_UPDATE_DNLD_NOT_SUPPORTED\n");
+ 		break;
+ 	case FLASH_UPDATE_DISABLED:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(": FLASH_UPDATE_DISABLED\n"));
++		pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_DISABLED\n");
+ 		break;
+ 	default:
+-		PM8001_DEVIO_DBG(pm8001_ha,
+-			pm8001_printk("No matched status = %d\n", status));
++		pm8001_dbg(pm8001_ha, DEVIO, "No matched status = %d\n",
++			   status);
+ 		break;
+ 	}
+ 	kfree(ccb->fw_control_context);
+@@ -3747,12 +3603,11 @@ int pm8001_mpi_general_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 	struct general_event_resp *pPayload =
+ 		(struct general_event_resp *)(piomb + 4);
+ 	status = le32_to_cpu(pPayload->status);
+-	PM8001_MSG_DBG(pm8001_ha,
+-		pm8001_printk(" status = 0x%x\n", status));
++	pm8001_dbg(pm8001_ha, MSG, " status = 0x%x\n", status);
+ 	for (i = 0; i < GENERAL_EVENT_PAYLOAD; i++)
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("inb_IOMB_payload[0x%x] 0x%x,\n", i,
+-			pPayload->inb_IOMB_payload[i]));
++		pm8001_dbg(pm8001_ha, MSG, "inb_IOMB_payload[0x%x] 0x%x,\n",
++			   i,
++			   pPayload->inb_IOMB_payload[i]);
+ 	return 0;
+ }
+ 
+@@ -3772,8 +3627,7 @@ int pm8001_mpi_task_abort_resp(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	status = le32_to_cpu(pPayload->status);
+ 	tag = le32_to_cpu(pPayload->tag);
+ 	if (!tag) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk(" TAG NULL. RETURNING !!!"));
++		pm8001_dbg(pm8001_ha, FAIL, " TAG NULL. RETURNING !!!\n");
+ 		return -1;
+ 	}
+ 
+@@ -3783,23 +3637,21 @@ int pm8001_mpi_task_abort_resp(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	pm8001_dev = ccb->device; /* retrieve device */
+ 
+ 	if (!t)	{
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk(" TASK NULL. RETURNING !!!"));
++		pm8001_dbg(pm8001_ha, FAIL, " TASK NULL. RETURNING !!!\n");
+ 		return -1;
+ 	}
+ 	ts = &t->task_status;
+ 	if (status != 0)
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("task abort failed status 0x%x ,"
+-			"tag = 0x%x, scp= 0x%x\n", status, tag, scp));
++		pm8001_dbg(pm8001_ha, FAIL, "task abort failed status 0x%x ,tag = 0x%x, scp= 0x%x\n",
++			   status, tag, scp);
+ 	switch (status) {
+ 	case IO_SUCCESS:
+-		PM8001_EH_DBG(pm8001_ha, pm8001_printk("IO_SUCCESS\n"));
++		pm8001_dbg(pm8001_ha, EH, "IO_SUCCESS\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAM_STAT_GOOD;
+ 		break;
+ 	case IO_NOT_VALID:
+-		PM8001_EH_DBG(pm8001_ha, pm8001_printk("IO_NOT_VALID\n"));
++		pm8001_dbg(pm8001_ha, EH, "IO_NOT_VALID\n");
+ 		ts->resp = TMF_RESP_FUNC_FAILED;
+ 		break;
+ 	}
+@@ -3844,14 +3696,13 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void* piomb)
+ 	struct sas_ha_struct *sas_ha = pm8001_ha->sas;
+ 	struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
+ 	struct asd_sas_phy *sas_phy = sas_ha->sas_phy[phy_id];
+-	PM8001_DEVIO_DBG(pm8001_ha, pm8001_printk(
+-		"SPC HW event for portid:%d, phyid:%d, event:%x, status:%x\n",
+-		port_id, phy_id, eventType, status));
++	pm8001_dbg(pm8001_ha, DEVIO,
++		   "SPC HW event for portid:%d, phyid:%d, event:%x, status:%x\n",
++		   port_id, phy_id, eventType, status);
+ 	switch (eventType) {
+ 	case HW_EVENT_PHY_START_STATUS:
+-		PM8001_MSG_DBG(pm8001_ha,
+-		pm8001_printk("HW_EVENT_PHY_START_STATUS"
+-			" status = %x\n", status));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_START_STATUS status = %x\n",
++			   status);
+ 		if (status == 0) {
+ 			phy->phy_state = 1;
+ 			if (pm8001_ha->flags == PM8001F_RUN_TIME &&
+@@ -3860,178 +3711,160 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void* piomb)
+ 		}
+ 		break;
+ 	case HW_EVENT_SAS_PHY_UP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_PHY_START_STATUS\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_START_STATUS\n");
+ 		hw_event_sas_phy_up(pm8001_ha, piomb);
+ 		break;
+ 	case HW_EVENT_SATA_PHY_UP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_SATA_PHY_UP\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_PHY_UP\n");
+ 		hw_event_sata_phy_up(pm8001_ha, piomb);
+ 		break;
+ 	case HW_EVENT_PHY_STOP_STATUS:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_PHY_STOP_STATUS "
+-			"status = %x\n", status));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_STOP_STATUS status = %x\n",
++			   status);
+ 		if (status == 0)
+ 			phy->phy_state = 0;
+ 		break;
+ 	case HW_EVENT_SATA_SPINUP_HOLD:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_SATA_SPINUP_HOLD\n"));
+-		sas_ha->notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD);
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_SPINUP_HOLD\n");
++		sas_notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD);
+ 		break;
+ 	case HW_EVENT_PHY_DOWN:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_PHY_DOWN\n"));
+-		sas_ha->notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL);
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_DOWN\n");
++		sas_notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL);
+ 		phy->phy_attached = 0;
+ 		phy->phy_state = 0;
+ 		hw_event_phy_down(pm8001_ha, piomb);
+ 		break;
+ 	case HW_EVENT_PORT_INVALID:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_PORT_INVALID\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_INVALID\n");
+ 		sas_phy_disconnected(sas_phy);
+ 		phy->phy_attached = 0;
+-		sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
++		sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
+ 		break;
+ 	/* the broadcast change primitive received, tell the LIBSAS this event
+ 	to revalidate the sas domain*/
+ 	case HW_EVENT_BROADCAST_CHANGE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_BROADCAST_CHANGE\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_CHANGE\n");
+ 		pm8001_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_BROADCAST_CHANGE,
+ 			port_id, phy_id, 1, 0);
+ 		spin_lock_irqsave(&sas_phy->sas_prim_lock, flags);
+ 		sas_phy->sas_prim = HW_EVENT_BROADCAST_CHANGE;
+ 		spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags);
+-		sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
++		sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
+ 		break;
+ 	case HW_EVENT_PHY_ERROR:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_PHY_ERROR\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_ERROR\n");
+ 		sas_phy_disconnected(&phy->sas_phy);
+ 		phy->phy_attached = 0;
+-		sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR);
++		sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR);
+ 		break;
+ 	case HW_EVENT_BROADCAST_EXP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_BROADCAST_EXP\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_EXP\n");
+ 		spin_lock_irqsave(&sas_phy->sas_prim_lock, flags);
+ 		sas_phy->sas_prim = HW_EVENT_BROADCAST_EXP;
+ 		spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags);
+-		sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
++		sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
+ 		break;
+ 	case HW_EVENT_LINK_ERR_INVALID_DWORD:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_LINK_ERR_INVALID_DWORD\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "HW_EVENT_LINK_ERR_INVALID_DWORD\n");
+ 		pm8001_hw_event_ack_req(pm8001_ha, 0,
+ 			HW_EVENT_LINK_ERR_INVALID_DWORD, port_id, phy_id, 0, 0);
+ 		sas_phy_disconnected(sas_phy);
+ 		phy->phy_attached = 0;
+-		sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
++		sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
+ 		break;
+ 	case HW_EVENT_LINK_ERR_DISPARITY_ERROR:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_LINK_ERR_DISPARITY_ERROR\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "HW_EVENT_LINK_ERR_DISPARITY_ERROR\n");
+ 		pm8001_hw_event_ack_req(pm8001_ha, 0,
+ 			HW_EVENT_LINK_ERR_DISPARITY_ERROR,
+ 			port_id, phy_id, 0, 0);
+ 		sas_phy_disconnected(sas_phy);
+ 		phy->phy_attached = 0;
+-		sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
++		sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
+ 		break;
+ 	case HW_EVENT_LINK_ERR_CODE_VIOLATION:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_LINK_ERR_CODE_VIOLATION\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "HW_EVENT_LINK_ERR_CODE_VIOLATION\n");
+ 		pm8001_hw_event_ack_req(pm8001_ha, 0,
+ 			HW_EVENT_LINK_ERR_CODE_VIOLATION,
+ 			port_id, phy_id, 0, 0);
+ 		sas_phy_disconnected(sas_phy);
+ 		phy->phy_attached = 0;
+-		sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
++		sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
+ 		break;
+ 	case HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH:
+-		PM8001_MSG_DBG(pm8001_ha,
+-		      pm8001_printk("HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH\n");
+ 		pm8001_hw_event_ack_req(pm8001_ha, 0,
+ 			HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH,
+ 			port_id, phy_id, 0, 0);
+ 		sas_phy_disconnected(sas_phy);
+ 		phy->phy_attached = 0;
+-		sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
++		sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
+ 		break;
+ 	case HW_EVENT_MALFUNCTION:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_MALFUNCTION\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_MALFUNCTION\n");
+ 		break;
+ 	case HW_EVENT_BROADCAST_SES:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_BROADCAST_SES\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_SES\n");
+ 		spin_lock_irqsave(&sas_phy->sas_prim_lock, flags);
+ 		sas_phy->sas_prim = HW_EVENT_BROADCAST_SES;
+ 		spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags);
+-		sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
++		sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
+ 		break;
+ 	case HW_EVENT_INBOUND_CRC_ERROR:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_INBOUND_CRC_ERROR\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_INBOUND_CRC_ERROR\n");
+ 		pm8001_hw_event_ack_req(pm8001_ha, 0,
+ 			HW_EVENT_INBOUND_CRC_ERROR,
+ 			port_id, phy_id, 0, 0);
+ 		break;
+ 	case HW_EVENT_HARD_RESET_RECEIVED:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_HARD_RESET_RECEIVED\n"));
+-		sas_ha->notify_port_event(sas_phy, PORTE_HARD_RESET);
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_HARD_RESET_RECEIVED\n");
++		sas_notify_port_event(sas_phy, PORTE_HARD_RESET);
+ 		break;
+ 	case HW_EVENT_ID_FRAME_TIMEOUT:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_ID_FRAME_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_ID_FRAME_TIMEOUT\n");
+ 		sas_phy_disconnected(sas_phy);
+ 		phy->phy_attached = 0;
+-		sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
++		sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
+ 		break;
+ 	case HW_EVENT_LINK_ERR_PHY_RESET_FAILED:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_LINK_ERR_PHY_RESET_FAILED\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "HW_EVENT_LINK_ERR_PHY_RESET_FAILED\n");
+ 		pm8001_hw_event_ack_req(pm8001_ha, 0,
+ 			HW_EVENT_LINK_ERR_PHY_RESET_FAILED,
+ 			port_id, phy_id, 0, 0);
+ 		sas_phy_disconnected(sas_phy);
+ 		phy->phy_attached = 0;
+-		sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
++		sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
+ 		break;
+ 	case HW_EVENT_PORT_RESET_TIMER_TMO:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_PORT_RESET_TIMER_TMO\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_TIMER_TMO\n");
+ 		sas_phy_disconnected(sas_phy);
+ 		phy->phy_attached = 0;
+-		sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
++		sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
+ 		break;
+ 	case HW_EVENT_PORT_RECOVERY_TIMER_TMO:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_PORT_RECOVERY_TIMER_TMO\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "HW_EVENT_PORT_RECOVERY_TIMER_TMO\n");
+ 		sas_phy_disconnected(sas_phy);
+ 		phy->phy_attached = 0;
+-		sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
++		sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
+ 		break;
+ 	case HW_EVENT_PORT_RECOVER:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_PORT_RECOVER\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RECOVER\n");
+ 		break;
+ 	case HW_EVENT_PORT_RESET_COMPLETE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_PORT_RESET_COMPLETE\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_COMPLETE\n");
+ 		break;
+ 	case EVENT_BROADCAST_ASYNCH_EVENT:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("EVENT_BROADCAST_ASYNCH_EVENT\n"));
++		pm8001_dbg(pm8001_ha, MSG, "EVENT_BROADCAST_ASYNCH_EVENT\n");
+ 		break;
+ 	default:
+-		PM8001_DEVIO_DBG(pm8001_ha,
+-			pm8001_printk("Unknown event type = %x\n", eventType));
++		pm8001_dbg(pm8001_ha, DEVIO, "Unknown event type = %x\n",
++			   eventType);
+ 		break;
+ 	}
+ 	return 0;
+@@ -4047,163 +3880,132 @@ static void process_one_iomb(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	__le32 pHeader = *(__le32 *)piomb;
+ 	u8 opc = (u8)((le32_to_cpu(pHeader)) & 0xFFF);
+ 
+-	PM8001_MSG_DBG(pm8001_ha, pm8001_printk("process_one_iomb:"));
++	pm8001_dbg(pm8001_ha, MSG, "process_one_iomb:\n");
+ 
+ 	switch (opc) {
+ 	case OPC_OUB_ECHO:
+-		PM8001_MSG_DBG(pm8001_ha, pm8001_printk("OPC_OUB_ECHO\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_ECHO\n");
+ 		break;
+ 	case OPC_OUB_HW_EVENT:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_HW_EVENT\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_HW_EVENT\n");
+ 		mpi_hw_event(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SSP_COMP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SSP_COMP\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_COMP\n");
+ 		mpi_ssp_completion(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SMP_COMP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SMP_COMP\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_COMP\n");
+ 		mpi_smp_completion(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_LOCAL_PHY_CNTRL:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_LOCAL_PHY_CNTRL\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_LOCAL_PHY_CNTRL\n");
+ 		pm8001_mpi_local_phy_ctl(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_DEV_REGIST:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_DEV_REGIST\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_REGIST\n");
+ 		pm8001_mpi_reg_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_DEREG_DEV:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("unregister the device\n"));
++		pm8001_dbg(pm8001_ha, MSG, "unregister the device\n");
+ 		pm8001_mpi_dereg_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_GET_DEV_HANDLE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_GET_DEV_HANDLE\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEV_HANDLE\n");
+ 		break;
+ 	case OPC_OUB_SATA_COMP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SATA_COMP\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_COMP\n");
+ 		mpi_sata_completion(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SATA_EVENT:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SATA_EVENT\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_EVENT\n");
+ 		mpi_sata_event(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SSP_EVENT:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SSP_EVENT\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_EVENT\n");
+ 		mpi_ssp_event(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_DEV_HANDLE_ARRIV:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_DEV_HANDLE_ARRIV\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_HANDLE_ARRIV\n");
+ 		/*This is for target*/
+ 		break;
+ 	case OPC_OUB_SSP_RECV_EVENT:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SSP_RECV_EVENT\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_RECV_EVENT\n");
+ 		/*This is for target*/
+ 		break;
+ 	case OPC_OUB_DEV_INFO:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_DEV_INFO\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_INFO\n");
+ 		break;
+ 	case OPC_OUB_FW_FLASH_UPDATE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_FW_FLASH_UPDATE\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_FW_FLASH_UPDATE\n");
+ 		pm8001_mpi_fw_flash_update_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_GPIO_RESPONSE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_GPIO_RESPONSE\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_RESPONSE\n");
+ 		break;
+ 	case OPC_OUB_GPIO_EVENT:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_GPIO_EVENT\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_EVENT\n");
+ 		break;
+ 	case OPC_OUB_GENERAL_EVENT:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_GENERAL_EVENT\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GENERAL_EVENT\n");
+ 		pm8001_mpi_general_event(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SSP_ABORT_RSP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SSP_ABORT_RSP\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_ABORT_RSP\n");
+ 		pm8001_mpi_task_abort_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SATA_ABORT_RSP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SATA_ABORT_RSP\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_ABORT_RSP\n");
+ 		pm8001_mpi_task_abort_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SAS_DIAG_MODE_START_END:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SAS_DIAG_MODE_START_END\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "OPC_OUB_SAS_DIAG_MODE_START_END\n");
+ 		break;
+ 	case OPC_OUB_SAS_DIAG_EXECUTE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SAS_DIAG_EXECUTE\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_DIAG_EXECUTE\n");
+ 		break;
+ 	case OPC_OUB_GET_TIME_STAMP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_GET_TIME_STAMP\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_TIME_STAMP\n");
+ 		break;
+ 	case OPC_OUB_SAS_HW_EVENT_ACK:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SAS_HW_EVENT_ACK\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_HW_EVENT_ACK\n");
+ 		break;
+ 	case OPC_OUB_PORT_CONTROL:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_PORT_CONTROL\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_PORT_CONTROL\n");
+ 		break;
+ 	case OPC_OUB_SMP_ABORT_RSP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SMP_ABORT_RSP\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_ABORT_RSP\n");
+ 		pm8001_mpi_task_abort_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_GET_NVMD_DATA:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_GET_NVMD_DATA\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_NVMD_DATA\n");
+ 		pm8001_mpi_get_nvmd_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SET_NVMD_DATA:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SET_NVMD_DATA\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_NVMD_DATA\n");
+ 		pm8001_mpi_set_nvmd_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_DEVICE_HANDLE_REMOVAL:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_DEVICE_HANDLE_REMOVAL\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEVICE_HANDLE_REMOVAL\n");
+ 		break;
+ 	case OPC_OUB_SET_DEVICE_STATE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SET_DEVICE_STATE\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEVICE_STATE\n");
+ 		pm8001_mpi_set_dev_state_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_GET_DEVICE_STATE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_GET_DEVICE_STATE\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEVICE_STATE\n");
+ 		break;
+ 	case OPC_OUB_SET_DEV_INFO:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SET_DEV_INFO\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEV_INFO\n");
+ 		break;
+ 	case OPC_OUB_SAS_RE_INITIALIZE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SAS_RE_INITIALIZE\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_RE_INITIALIZE\n");
+ 		break;
+ 	default:
+-		PM8001_DEVIO_DBG(pm8001_ha,
+-			pm8001_printk("Unknown outbound Queue IOMB OPC = %x\n",
+-			opc));
++		pm8001_dbg(pm8001_ha, DEVIO,
++			   "Unknown outbound Queue IOMB OPC = %x\n",
++			   opc);
+ 		break;
+ 	}
+ }
+@@ -4416,19 +4218,19 @@ static int pm8001_chip_sata_req(struct pm8001_hba_info *pm8001_ha,
+ 	circularQ = &pm8001_ha->inbnd_q_tbl[0];
+ 	if (task->data_dir == DMA_NONE) {
+ 		ATAP = 0x04;  /* no data*/
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk("no data\n"));
++		pm8001_dbg(pm8001_ha, IO, "no data\n");
+ 	} else if (likely(!task->ata_task.device_control_reg_update)) {
+ 		if (task->ata_task.dma_xfer) {
+ 			ATAP = 0x06; /* DMA */
+-			PM8001_IO_DBG(pm8001_ha, pm8001_printk("DMA\n"));
++			pm8001_dbg(pm8001_ha, IO, "DMA\n");
+ 		} else {
+ 			ATAP = 0x05; /* PIO*/
+-			PM8001_IO_DBG(pm8001_ha, pm8001_printk("PIO\n"));
++			pm8001_dbg(pm8001_ha, IO, "PIO\n");
+ 		}
+ 		if (task->ata_task.use_ncq &&
+ 			dev->sata_dev.class != ATA_DEV_ATAPI) {
+ 			ATAP = 0x07; /* FPDMA */
+-			PM8001_IO_DBG(pm8001_ha, pm8001_printk("FPDMA\n"));
++			pm8001_dbg(pm8001_ha, IO, "FPDMA\n");
+ 		}
+ 	}
+ 	if (task->ata_task.use_ncq && pm8001_get_ncq_tag(task, &hdr_tag)) {
+@@ -4485,10 +4287,10 @@ static int pm8001_chip_sata_req(struct pm8001_hba_info *pm8001_ha,
+ 					SAS_TASK_STATE_ABORTED))) {
+ 				spin_unlock_irqrestore(&task->task_state_lock,
+ 							flags);
+-				PM8001_FAIL_DBG(pm8001_ha,
+-					pm8001_printk("task 0x%p resp 0x%x "
+-					" stat 0x%x but aborted by upper layer "
+-					"\n", task, ts->resp, ts->stat));
++				pm8001_dbg(pm8001_ha, FAIL,
++					   "task 0x%p resp 0x%x  stat 0x%x but aborted by upper layer\n",
++					   task, ts->resp,
++					   ts->stat);
+ 				pm8001_ccb_task_free(pm8001_ha, task, ccb, tag);
+ 			} else {
+ 				spin_unlock_irqrestore(&task->task_state_lock,
+@@ -4637,8 +4439,8 @@ int pm8001_chip_dereg_dev_req(struct pm8001_hba_info *pm8001_ha,
+ 	memset(&payload, 0, sizeof(payload));
+ 	payload.tag = cpu_to_le32(1);
+ 	payload.device_id = cpu_to_le32(device_id);
+-	PM8001_MSG_DBG(pm8001_ha,
+-		pm8001_printk("unregister device device_id = %d\n", device_id));
++	pm8001_dbg(pm8001_ha, MSG, "unregister device device_id = %d\n",
++		   device_id);
+ 	ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload,
+ 			sizeof(payload), 0);
+ 	return ret;
+@@ -4690,9 +4492,9 @@ static irqreturn_t
+ pm8001_chip_isr(struct pm8001_hba_info *pm8001_ha, u8 vec)
+ {
+ 	pm8001_chip_interrupt_disable(pm8001_ha, vec);
+-	PM8001_DEVIO_DBG(pm8001_ha, pm8001_printk(
+-		"irq vec %d, ODMR:0x%x\n",
+-		vec, pm8001_cr32(pm8001_ha, 0, 0x30)));
++	pm8001_dbg(pm8001_ha, DEVIO,
++		   "irq vec %d, ODMR:0x%x\n",
++		   vec, pm8001_cr32(pm8001_ha, 0, 0x30));
+ 	process_oq(pm8001_ha, vec);
+ 	pm8001_chip_interrupt_enable(pm8001_ha, vec);
+ 	return IRQ_HANDLED;
+@@ -4729,9 +4531,8 @@ int pm8001_chip_abort_task(struct pm8001_hba_info *pm8001_ha,
+ {
+ 	u32 opc, device_id;
+ 	int rc = TMF_RESP_FUNC_FAILED;
+-	PM8001_EH_DBG(pm8001_ha,
+-		pm8001_printk("cmd_tag = %x, abort task tag = 0x%x",
+-			cmd_tag, task_tag));
++	pm8001_dbg(pm8001_ha, EH, "cmd_tag = %x, abort task tag = 0x%x\n",
++		   cmd_tag, task_tag);
+ 	if (pm8001_dev->dev_type == SAS_END_DEVICE)
+ 		opc = OPC_INB_SSP_ABORT;
+ 	else if (pm8001_dev->dev_type == SAS_SATA_DEV)
+@@ -4742,7 +4543,7 @@ int pm8001_chip_abort_task(struct pm8001_hba_info *pm8001_ha,
+ 	rc = send_task_abort(pm8001_ha, opc, device_id, flag,
+ 		task_tag, cmd_tag);
+ 	if (rc != TMF_RESP_FUNC_COMPLETE)
+-		PM8001_EH_DBG(pm8001_ha, pm8001_printk("rc= %d\n", rc));
++		pm8001_dbg(pm8001_ha, EH, "rc= %d\n", rc);
+ 	return rc;
+ }
+ 
+@@ -5008,8 +4809,9 @@ pm8001_chip_fw_flash_update_req(struct pm8001_hba_info *pm8001_ha,
+ 	if (!fw_control_context)
+ 		return -ENOMEM;
+ 	fw_control = (struct fw_control_info *)&ioctl_payload->func_specific;
+-	PM8001_DEVIO_DBG(pm8001_ha, pm8001_printk(
+-		"dma fw_control context input length :%x\n", fw_control->len));
++	pm8001_dbg(pm8001_ha, DEVIO,
++		   "dma fw_control context input length :%x\n",
++		   fw_control->len);
+ 	memcpy(buffer, fw_control->buffer, fw_control->len);
+ 	flash_update_info.sgl.addr = cpu_to_le64(phys_addr);
+ 	flash_update_info.sgl.im_len.len = cpu_to_le32(fw_control->len);
+diff --git a/drivers/scsi/pm8001/pm8001_init.c b/drivers/scsi/pm8001/pm8001_init.c
+index 2025361b36e96..7657d68e12d5f 100644
+--- a/drivers/scsi/pm8001/pm8001_init.c
++++ b/drivers/scsi/pm8001/pm8001_init.c
+@@ -271,15 +271,14 @@ static int pm8001_alloc(struct pm8001_hba_info *pm8001_ha,
+ 
+ 	spin_lock_init(&pm8001_ha->lock);
+ 	spin_lock_init(&pm8001_ha->bitmap_lock);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("pm8001_alloc: PHY:%x\n",
+-				pm8001_ha->chip->n_phy));
++	pm8001_dbg(pm8001_ha, INIT, "pm8001_alloc: PHY:%x\n",
++		   pm8001_ha->chip->n_phy);
+ 
+ 	/* Setup Interrupt */
+ 	rc = pm8001_setup_irq(pm8001_ha);
+ 	if (rc) {
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
+-				"pm8001_setup_irq failed [ret: %d]\n", rc));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "pm8001_setup_irq failed [ret: %d]\n", rc);
+ 		goto err_out_shost;
+ 	}
+ 	/* Request Interrupt */
+@@ -394,9 +393,9 @@ static int pm8001_alloc(struct pm8001_hba_info *pm8001_ha,
+ 			&pm8001_ha->memoryMap.region[i].phys_addr_lo,
+ 			pm8001_ha->memoryMap.region[i].total_len,
+ 			pm8001_ha->memoryMap.region[i].alignment) != 0) {
+-				PM8001_FAIL_DBG(pm8001_ha,
+-					pm8001_printk("Mem%d alloc failed\n",
+-					i));
++			pm8001_dbg(pm8001_ha, FAIL,
++				   "Mem%d alloc failed\n",
++				   i);
+ 				goto err_out;
+ 		}
+ 	}
+@@ -412,7 +411,7 @@ static int pm8001_alloc(struct pm8001_hba_info *pm8001_ha,
+ 		pm8001_ha->devices[i].dev_type = SAS_PHY_UNUSED;
+ 		pm8001_ha->devices[i].id = i;
+ 		pm8001_ha->devices[i].device_id = PM8001_MAX_DEVICES;
+-		pm8001_ha->devices[i].running_req = 0;
++		atomic_set(&pm8001_ha->devices[i].running_req, 0);
+ 	}
+ 	pm8001_ha->flags = PM8001F_INIT_TIME;
+ 	/* Initialize tags */
+@@ -467,15 +466,15 @@ static int pm8001_ioremap(struct pm8001_hba_info *pm8001_ha)
+ 			pm8001_ha->io_mem[logicalBar].memvirtaddr =
+ 				ioremap(pm8001_ha->io_mem[logicalBar].membase,
+ 				pm8001_ha->io_mem[logicalBar].memsize);
+-			PM8001_INIT_DBG(pm8001_ha,
+-				pm8001_printk("PCI: bar %d, logicalBar %d ",
+-				bar, logicalBar));
+-			PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
+-				"base addr %llx virt_addr=%llx len=%d\n",
+-				(u64)pm8001_ha->io_mem[logicalBar].membase,
+-				(u64)(unsigned long)
+-				pm8001_ha->io_mem[logicalBar].memvirtaddr,
+-				pm8001_ha->io_mem[logicalBar].memsize));
++			pm8001_dbg(pm8001_ha, INIT,
++				   "PCI: bar %d, logicalBar %d\n",
++				   bar, logicalBar);
++			pm8001_dbg(pm8001_ha, INIT,
++				   "base addr %llx virt_addr=%llx len=%d\n",
++				   (u64)pm8001_ha->io_mem[logicalBar].membase,
++				   (u64)(unsigned long)
++				   pm8001_ha->io_mem[logicalBar].memvirtaddr,
++				   pm8001_ha->io_mem[logicalBar].memsize);
+ 		} else {
+ 			pm8001_ha->io_mem[logicalBar].membase	= 0;
+ 			pm8001_ha->io_mem[logicalBar].memsize	= 0;
+@@ -520,8 +519,8 @@ static struct pm8001_hba_info *pm8001_pci_alloc(struct pci_dev *pdev,
+ 	else {
+ 		pm8001_ha->link_rate = LINKRATE_15 | LINKRATE_30 |
+ 			LINKRATE_60 | LINKRATE_120;
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
+-			"Setting link rate to default value\n"));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "Setting link rate to default value\n");
+ 	}
+ 	sprintf(pm8001_ha->name, "%s%d", DRV_NAME, pm8001_ha->id);
+ 	/* IOMB size is 128 for 8088/89 controllers */
+@@ -684,13 +683,13 @@ static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
+ 	payload.offset = 0;
+ 	payload.func_specific = kzalloc(payload.rd_length, GFP_KERNEL);
+ 	if (!payload.func_specific) {
+-		PM8001_INIT_DBG(pm8001_ha, pm8001_printk("mem alloc fail\n"));
++		pm8001_dbg(pm8001_ha, INIT, "mem alloc fail\n");
+ 		return;
+ 	}
+ 	rc = PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload);
+ 	if (rc) {
+ 		kfree(payload.func_specific);
+-		PM8001_INIT_DBG(pm8001_ha, pm8001_printk("nvmd failed\n"));
++		pm8001_dbg(pm8001_ha, INIT, "nvmd failed\n");
+ 		return;
+ 	}
+ 	wait_for_completion(&completion);
+@@ -718,9 +717,8 @@ static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
+ 			sas_add[7] = sas_add[7] + 4;
+ 		memcpy(&pm8001_ha->phy[i].dev_sas_addr,
+ 			sas_add, SAS_ADDR_SIZE);
+-		PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("phy %d sas_addr = %016llx\n", i,
+-			pm8001_ha->phy[i].dev_sas_addr));
++		pm8001_dbg(pm8001_ha, INIT, "phy %d sas_addr = %016llx\n", i,
++			   pm8001_ha->phy[i].dev_sas_addr);
+ 	}
+ 	kfree(payload.func_specific);
+ #else
+@@ -760,7 +758,7 @@ static int pm8001_get_phy_settings_info(struct pm8001_hba_info *pm8001_ha)
+ 	rc = PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload);
+ 	if (rc) {
+ 		kfree(payload.func_specific);
+-		PM8001_INIT_DBG(pm8001_ha, pm8001_printk("nvmd failed\n"));
++		pm8001_dbg(pm8001_ha, INIT, "nvmd failed\n");
+ 		return -ENOMEM;
+ 	}
+ 	wait_for_completion(&completion);
+@@ -854,9 +852,9 @@ void pm8001_get_phy_mask(struct pm8001_hba_info *pm8001_ha, int *phymask)
+ 		break;
+ 
+ 	default:
+-		PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("Unknown subsystem device=0x%.04x",
+-				pm8001_ha->pdev->subsystem_device));
++		pm8001_dbg(pm8001_ha, INIT,
++			   "Unknown subsystem device=0x%.04x\n",
++			   pm8001_ha->pdev->subsystem_device);
+ 	}
+ }
+ 
+@@ -950,9 +948,9 @@ static u32 pm8001_setup_msix(struct pm8001_hba_info *pm8001_ha)
+ 	/* Maximum queue number updating in HBA structure */
+ 	pm8001_ha->max_q_num = number_of_intr;
+ 
+-	PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
+-		"pci_alloc_irq_vectors request ret:%d no of intr %d\n",
+-				rc, pm8001_ha->number_of_intr));
++	pm8001_dbg(pm8001_ha, INIT,
++		   "pci_alloc_irq_vectors request ret:%d no of intr %d\n",
++		   rc, pm8001_ha->number_of_intr);
+ 	return 0;
+ }
+ 
+@@ -964,9 +962,9 @@ static u32 pm8001_request_msix(struct pm8001_hba_info *pm8001_ha)
+ 	if (pm8001_ha->chip_id != chip_8001)
+ 		flag &= ~IRQF_SHARED;
+ 
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("pci_enable_msix request number of intr %d\n",
+-		pm8001_ha->number_of_intr));
++	pm8001_dbg(pm8001_ha, INIT,
++		   "pci_enable_msix request number of intr %d\n",
++		   pm8001_ha->number_of_intr);
+ 
+ 	for (i = 0; i < pm8001_ha->number_of_intr; i++) {
+ 		snprintf(pm8001_ha->intr_drvname[i],
+@@ -1002,8 +1000,7 @@ static u32 pm8001_setup_irq(struct pm8001_hba_info *pm8001_ha)
+ #ifdef PM8001_USE_MSIX
+ 	if (pci_find_capability(pdev, PCI_CAP_ID_MSIX))
+ 		return pm8001_setup_msix(pm8001_ha);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("MSIX not supported!!!\n"));
++	pm8001_dbg(pm8001_ha, INIT, "MSIX not supported!!!\n");
+ #endif
+ 	return 0;
+ }
+@@ -1023,8 +1020,7 @@ static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha)
+ 	if (pdev->msix_cap && pci_msi_enabled())
+ 		return pm8001_request_msix(pm8001_ha);
+ 	else {
+-		PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("MSIX not supported!!!\n"));
++		pm8001_dbg(pm8001_ha, INIT, "MSIX not supported!!!\n");
+ 		goto intx;
+ 	}
+ #endif
+@@ -1108,8 +1104,8 @@ static int pm8001_pci_probe(struct pci_dev *pdev,
+ 	PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha);
+ 	rc = PM8001_CHIP_DISP->chip_init(pm8001_ha);
+ 	if (rc) {
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
+-			"chip_init failed [ret: %d]\n", rc));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "chip_init failed [ret: %d]\n", rc);
+ 		goto err_out_ha_free;
+ 	}
+ 
+@@ -1138,8 +1134,8 @@ static int pm8001_pci_probe(struct pci_dev *pdev,
+ 	pm8001_post_sas_ha_init(shost, chip);
+ 	rc = sas_register_ha(SHOST_TO_SAS_HA(shost));
+ 	if (rc) {
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
+-			"sas_register_ha failed [ret: %d]\n", rc));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "sas_register_ha failed [ret: %d]\n", rc);
+ 		goto err_out_shost;
+ 	}
+ 	list_add_tail(&pm8001_ha->list, &hba_list);
+@@ -1191,8 +1187,8 @@ pm8001_init_ccb_tag(struct pm8001_hba_info *pm8001_ha, struct Scsi_Host *shost,
+ 	pm8001_ha->ccb_info = (struct pm8001_ccb_info *)
+ 		kcalloc(ccb_count, sizeof(struct pm8001_ccb_info), GFP_KERNEL);
+ 	if (!pm8001_ha->ccb_info) {
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk
+-			("Unable to allocate memory for ccb\n"));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "Unable to allocate memory for ccb\n");
+ 		goto err_out_noccb;
+ 	}
+ 	for (i = 0; i < ccb_count; i++) {
+@@ -1200,8 +1196,8 @@ pm8001_init_ccb_tag(struct pm8001_hba_info *pm8001_ha, struct Scsi_Host *shost,
+ 				sizeof(struct pm8001_prd) * PM8001_MAX_DMA_SG,
+ 				&pm8001_ha->ccb_info[i].ccb_dma_handle);
+ 		if (!pm8001_ha->ccb_info[i].buf_prd) {
+-			PM8001_FAIL_DBG(pm8001_ha, pm8001_printk
+-					("pm80xx: ccb prd memory allocation error\n"));
++			pm8001_dbg(pm8001_ha, FAIL,
++				   "pm80xx: ccb prd memory allocation error\n");
+ 			goto err_out;
+ 		}
+ 		pm8001_ha->ccb_info[i].task = NULL;
+@@ -1345,8 +1341,7 @@ static int pm8001_pci_resume(struct pci_dev *pdev)
+ 	/* chip soft rst only for spc */
+ 	if (pm8001_ha->chip_id == chip_8001) {
+ 		PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha);
+-		PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("chip soft reset successful\n"));
++		pm8001_dbg(pm8001_ha, INIT, "chip soft reset successful\n");
+ 	}
+ 	rc = PM8001_CHIP_DISP->chip_init(pm8001_ha);
+ 	if (rc)
+diff --git a/drivers/scsi/pm8001/pm8001_sas.c b/drivers/scsi/pm8001/pm8001_sas.c
+index 9889bab7d31c1..474468df2a78d 100644
+--- a/drivers/scsi/pm8001/pm8001_sas.c
++++ b/drivers/scsi/pm8001/pm8001_sas.c
+@@ -158,7 +158,6 @@ int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
+ 	int rc = 0, phy_id = sas_phy->id;
+ 	struct pm8001_hba_info *pm8001_ha = NULL;
+ 	struct sas_phy_linkrates *rates;
+-	struct sas_ha_struct *sas_ha;
+ 	struct pm8001_phy *phy;
+ 	DECLARE_COMPLETION_ONSTACK(completion);
+ 	unsigned long flags;
+@@ -207,18 +206,16 @@ int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
+ 		if (pm8001_ha->chip_id != chip_8001) {
+ 			if (pm8001_ha->phy[phy_id].phy_state ==
+ 				PHY_STATE_LINK_UP_SPCV) {
+-				sas_ha = pm8001_ha->sas;
+ 				sas_phy_disconnected(&phy->sas_phy);
+-				sas_ha->notify_phy_event(&phy->sas_phy,
++				sas_notify_phy_event(&phy->sas_phy,
+ 					PHYE_LOSS_OF_SIGNAL);
+ 				phy->phy_attached = 0;
+ 			}
+ 		} else {
+ 			if (pm8001_ha->phy[phy_id].phy_state ==
+ 				PHY_STATE_LINK_UP_SPC) {
+-				sas_ha = pm8001_ha->sas;
+ 				sas_phy_disconnected(&phy->sas_phy);
+-				sas_ha->notify_phy_event(&phy->sas_phy,
++				sas_notify_phy_event(&phy->sas_phy,
+ 					PHYE_LOSS_OF_SIGNAL);
+ 				phy->phy_attached = 0;
+ 			}
+@@ -250,8 +247,7 @@ int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
+ 		spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+ 		return 0;
+ 	default:
+-		PM8001_DEVIO_DBG(pm8001_ha,
+-			pm8001_printk("func 0x%x\n", func));
++		pm8001_dbg(pm8001_ha, DEVIO, "func 0x%x\n", func);
+ 		rc = -EOPNOTSUPP;
+ 	}
+ 	msleep(300);
+@@ -405,7 +401,7 @@ static int pm8001_task_exec(struct sas_task *task,
+ 		t->task_done(t);
+ 		return 0;
+ 	}
+-	PM8001_IO_DBG(pm8001_ha, pm8001_printk("pm8001_task_exec device \n "));
++	pm8001_dbg(pm8001_ha, IO, "pm8001_task_exec device\n");
+ 	spin_lock_irqsave(&pm8001_ha->lock, flags);
+ 	do {
+ 		dev = t->dev;
+@@ -456,9 +452,11 @@ static int pm8001_task_exec(struct sas_task *task,
+ 		ccb->device = pm8001_dev;
+ 		switch (task_proto) {
+ 		case SAS_PROTOCOL_SMP:
++			atomic_inc(&pm8001_dev->running_req);
+ 			rc = pm8001_task_prep_smp(pm8001_ha, ccb);
+ 			break;
+ 		case SAS_PROTOCOL_SSP:
++			atomic_inc(&pm8001_dev->running_req);
+ 			if (is_tmf)
+ 				rc = pm8001_task_prep_ssp_tm(pm8001_ha,
+ 					ccb, tmf);
+@@ -467,6 +465,7 @@ static int pm8001_task_exec(struct sas_task *task,
+ 			break;
+ 		case SAS_PROTOCOL_SATA:
+ 		case SAS_PROTOCOL_STP:
++			atomic_inc(&pm8001_dev->running_req);
+ 			rc = pm8001_task_prep_ata(pm8001_ha, ccb);
+ 			break;
+ 		default:
+@@ -477,15 +476,14 @@ static int pm8001_task_exec(struct sas_task *task,
+ 		}
+ 
+ 		if (rc) {
+-			PM8001_IO_DBG(pm8001_ha,
+-				pm8001_printk("rc is %x\n", rc));
++			pm8001_dbg(pm8001_ha, IO, "rc is %x\n", rc);
++			atomic_dec(&pm8001_dev->running_req);
+ 			goto err_out_tag;
+ 		}
+ 		/* TODO: select normal or high priority */
+ 		spin_lock(&t->task_state_lock);
+ 		t->task_state_flags |= SAS_TASK_AT_INITIATOR;
+ 		spin_unlock(&t->task_state_lock);
+-		pm8001_dev->running_req++;
+ 	} while (0);
+ 	rc = 0;
+ 	goto out_done;
+@@ -567,9 +565,9 @@ static struct pm8001_device *pm8001_alloc_dev(struct pm8001_hba_info *pm8001_ha)
+ 		}
+ 	}
+ 	if (dev == PM8001_MAX_DEVICES) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("max support %d devices, ignore ..\n",
+-			PM8001_MAX_DEVICES));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "max support %d devices, ignore ..\n",
++			   PM8001_MAX_DEVICES);
+ 	}
+ 	return NULL;
+ }
+@@ -587,8 +585,7 @@ struct pm8001_device *pm8001_find_dev(struct pm8001_hba_info *pm8001_ha,
+ 			return &pm8001_ha->devices[dev];
+ 	}
+ 	if (dev == PM8001_MAX_DEVICES) {
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("NO MATCHING "
+-				"DEVICE FOUND !!!\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "NO MATCHING DEVICE FOUND !!!\n");
+ 	}
+ 	return NULL;
+ }
+@@ -649,10 +646,10 @@ static int pm8001_dev_found_notify(struct domain_device *dev)
+ 			}
+ 		}
+ 		if (phy_id == parent_dev->ex_dev.num_phys) {
+-			PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("Error: no attached dev:%016llx"
+-			" at ex:%016llx.\n", SAS_ADDR(dev->sas_addr),
+-				SAS_ADDR(parent_dev->sas_addr)));
++			pm8001_dbg(pm8001_ha, FAIL,
++				   "Error: no attached dev:%016llx at ex:%016llx.\n",
++				   SAS_ADDR(dev->sas_addr),
++				   SAS_ADDR(parent_dev->sas_addr));
+ 			res = -1;
+ 		}
+ 	} else {
+@@ -662,7 +659,7 @@ static int pm8001_dev_found_notify(struct domain_device *dev)
+ 			flag = 1; /* directly sata */
+ 		}
+ 	} /*register this device to HBA*/
+-	PM8001_DISC_DBG(pm8001_ha, pm8001_printk("Found device\n"));
++	pm8001_dbg(pm8001_ha, DISC, "Found device\n");
+ 	PM8001_CHIP_DISP->reg_dev_req(pm8001_ha, pm8001_device, flag);
+ 	spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+ 	wait_for_completion(&completion);
+@@ -734,9 +731,7 @@ static int pm8001_exec_internal_tmf_task(struct domain_device *dev,
+ 
+ 		if (res) {
+ 			del_timer(&task->slow_task->timer);
+-			PM8001_FAIL_DBG(pm8001_ha,
+-				pm8001_printk("Executing internal task "
+-				"failed\n"));
++			pm8001_dbg(pm8001_ha, FAIL, "Executing internal task failed\n");
+ 			goto ex_err;
+ 		}
+ 		wait_for_completion(&task->slow_task->completion);
+@@ -750,9 +745,9 @@ static int pm8001_exec_internal_tmf_task(struct domain_device *dev,
+ 		/* Even TMF timed out, return direct. */
+ 		if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
+ 			if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
+-				PM8001_FAIL_DBG(pm8001_ha,
+-					pm8001_printk("TMF task[%x]timeout.\n",
+-					tmf->tmf));
++				pm8001_dbg(pm8001_ha, FAIL,
++					   "TMF task[%x]timeout.\n",
++					   tmf->tmf);
+ 				goto ex_err;
+ 			}
+ 		}
+@@ -773,17 +768,15 @@ static int pm8001_exec_internal_tmf_task(struct domain_device *dev,
+ 
+ 		if (task->task_status.resp == SAS_TASK_COMPLETE &&
+ 			task->task_status.stat == SAS_DATA_OVERRUN) {
+-			PM8001_FAIL_DBG(pm8001_ha,
+-				pm8001_printk("Blocked task error.\n"));
++			pm8001_dbg(pm8001_ha, FAIL, "Blocked task error.\n");
+ 			res = -EMSGSIZE;
+ 			break;
+ 		} else {
+-			PM8001_EH_DBG(pm8001_ha,
+-				pm8001_printk(" Task to dev %016llx response:"
+-				"0x%x status 0x%x\n",
+-				SAS_ADDR(dev->sas_addr),
+-				task->task_status.resp,
+-				task->task_status.stat));
++			pm8001_dbg(pm8001_ha, EH,
++				   " Task to dev %016llx response:0x%x status 0x%x\n",
++				   SAS_ADDR(dev->sas_addr),
++				   task->task_status.resp,
++				   task->task_status.stat);
+ 			sas_free_task(task);
+ 			task = NULL;
+ 		}
+@@ -830,9 +823,7 @@ pm8001_exec_internal_task_abort(struct pm8001_hba_info *pm8001_ha,
+ 
+ 		if (res) {
+ 			del_timer(&task->slow_task->timer);
+-			PM8001_FAIL_DBG(pm8001_ha,
+-				pm8001_printk("Executing internal task "
+-				"failed\n"));
++			pm8001_dbg(pm8001_ha, FAIL, "Executing internal task failed\n");
+ 			goto ex_err;
+ 		}
+ 		wait_for_completion(&task->slow_task->completion);
+@@ -840,8 +831,8 @@ pm8001_exec_internal_task_abort(struct pm8001_hba_info *pm8001_ha,
+ 		/* Even TMF timed out, return direct. */
+ 		if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
+ 			if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
+-				PM8001_FAIL_DBG(pm8001_ha,
+-					pm8001_printk("TMF task timeout.\n"));
++				pm8001_dbg(pm8001_ha, FAIL,
++					   "TMF task timeout.\n");
+ 				goto ex_err;
+ 			}
+ 		}
+@@ -852,12 +843,11 @@ pm8001_exec_internal_task_abort(struct pm8001_hba_info *pm8001_ha,
+ 			break;
+ 
+ 		} else {
+-			PM8001_EH_DBG(pm8001_ha,
+-				pm8001_printk(" Task to dev %016llx response: "
+-					"0x%x status 0x%x\n",
+-				SAS_ADDR(dev->sas_addr),
+-				task->task_status.resp,
+-				task->task_status.stat));
++			pm8001_dbg(pm8001_ha, EH,
++				   " Task to dev %016llx response: 0x%x status 0x%x\n",
++				   SAS_ADDR(dev->sas_addr),
++				   task->task_status.resp,
++				   task->task_status.stat);
+ 			sas_free_task(task);
+ 			task = NULL;
+ 		}
+@@ -883,22 +873,20 @@ static void pm8001_dev_gone_notify(struct domain_device *dev)
+ 	if (pm8001_dev) {
+ 		u32 device_id = pm8001_dev->device_id;
+ 
+-		PM8001_DISC_DBG(pm8001_ha,
+-			pm8001_printk("found dev[%d:%x] is gone.\n",
+-			pm8001_dev->device_id, pm8001_dev->dev_type));
+-		if (pm8001_dev->running_req) {
++		pm8001_dbg(pm8001_ha, DISC, "found dev[%d:%x] is gone.\n",
++			   pm8001_dev->device_id, pm8001_dev->dev_type);
++		if (atomic_read(&pm8001_dev->running_req)) {
+ 			spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+ 			pm8001_exec_internal_task_abort(pm8001_ha, pm8001_dev ,
+ 				dev, 1, 0);
+-			while (pm8001_dev->running_req)
++			while (atomic_read(&pm8001_dev->running_req))
+ 				msleep(20);
+ 			spin_lock_irqsave(&pm8001_ha->lock, flags);
+ 		}
+ 		PM8001_CHIP_DISP->dereg_dev_req(pm8001_ha, device_id);
+ 		pm8001_free_dev(pm8001_dev);
+ 	} else {
+-		PM8001_DISC_DBG(pm8001_ha,
+-			pm8001_printk("Found dev has gone.\n"));
++		pm8001_dbg(pm8001_ha, DISC, "Found dev has gone.\n");
+ 	}
+ 	dev->lldd_dev = NULL;
+ 	spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+@@ -968,7 +956,7 @@ void pm8001_open_reject_retry(
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		spin_lock_irqsave(&task->task_state_lock, flags1);
+ 		task->task_state_flags &= ~SAS_TASK_STATE_PENDING;
+ 		task->task_state_flags &= ~SAS_TASK_AT_INITIATOR;
+@@ -1018,9 +1006,9 @@ int pm8001_I_T_nexus_reset(struct domain_device *dev)
+ 		}
+ 		rc = sas_phy_reset(phy, 1);
+ 		if (rc) {
+-			PM8001_EH_DBG(pm8001_ha,
+-			pm8001_printk("phy reset failed for device %x\n"
+-			"with rc %d\n", pm8001_dev->device_id, rc));
++			pm8001_dbg(pm8001_ha, EH,
++				   "phy reset failed for device %x\n"
++				   "with rc %d\n", pm8001_dev->device_id, rc);
+ 			rc = TMF_RESP_FUNC_FAILED;
+ 			goto out;
+ 		}
+@@ -1028,17 +1016,16 @@ int pm8001_I_T_nexus_reset(struct domain_device *dev)
+ 		rc = pm8001_exec_internal_task_abort(pm8001_ha, pm8001_dev ,
+ 			dev, 1, 0);
+ 		if (rc) {
+-			PM8001_EH_DBG(pm8001_ha,
+-			pm8001_printk("task abort failed %x\n"
+-			"with rc %d\n", pm8001_dev->device_id, rc));
++			pm8001_dbg(pm8001_ha, EH, "task abort failed %x\n"
++				   "with rc %d\n", pm8001_dev->device_id, rc);
+ 			rc = TMF_RESP_FUNC_FAILED;
+ 		}
+ 	} else {
+ 		rc = sas_phy_reset(phy, 1);
+ 		msleep(2000);
+ 	}
+-	PM8001_EH_DBG(pm8001_ha, pm8001_printk(" for device[%x]:rc=%d\n",
+-		pm8001_dev->device_id, rc));
++	pm8001_dbg(pm8001_ha, EH, " for device[%x]:rc=%d\n",
++		   pm8001_dev->device_id, rc);
+  out:
+ 	sas_put_local_phy(phy);
+ 	return rc;
+@@ -1061,8 +1048,7 @@ int pm8001_I_T_nexus_event_handler(struct domain_device *dev)
+ 	pm8001_dev = dev->lldd_dev;
+ 	pm8001_ha = pm8001_find_ha_by_dev(dev);
+ 
+-	PM8001_EH_DBG(pm8001_ha,
+-			pm8001_printk("I_T_Nexus handler invoked !!"));
++	pm8001_dbg(pm8001_ha, EH, "I_T_Nexus handler invoked !!\n");
+ 
+ 	phy = sas_get_local_phy(dev);
+ 
+@@ -1101,8 +1087,8 @@ int pm8001_I_T_nexus_event_handler(struct domain_device *dev)
+ 		rc = sas_phy_reset(phy, 1);
+ 		msleep(2000);
+ 	}
+-	PM8001_EH_DBG(pm8001_ha, pm8001_printk(" for device[%x]:rc=%d\n",
+-		pm8001_dev->device_id, rc));
++	pm8001_dbg(pm8001_ha, EH, " for device[%x]:rc=%d\n",
++		   pm8001_dev->device_id, rc);
+ out:
+ 	sas_put_local_phy(phy);
+ 
+@@ -1131,8 +1117,8 @@ int pm8001_lu_reset(struct domain_device *dev, u8 *lun)
+ 		rc = pm8001_issue_ssp_tmf(dev, lun, &tmf_task);
+ 	}
+ 	/* If failed, fall-through I_T_Nexus reset */
+-	PM8001_EH_DBG(pm8001_ha, pm8001_printk("for device[%x]:rc=%d\n",
+-		pm8001_dev->device_id, rc));
++	pm8001_dbg(pm8001_ha, EH, "for device[%x]:rc=%d\n",
++		   pm8001_dev->device_id, rc);
+ 	return rc;
+ }
+ 
+@@ -1140,7 +1126,6 @@ int pm8001_lu_reset(struct domain_device *dev, u8 *lun)
+ int pm8001_query_task(struct sas_task *task)
+ {
+ 	u32 tag = 0xdeadbeef;
+-	int i = 0;
+ 	struct scsi_lun lun;
+ 	struct pm8001_tmf_task tmf_task;
+ 	int rc = TMF_RESP_FUNC_FAILED;
+@@ -1159,10 +1144,7 @@ int pm8001_query_task(struct sas_task *task)
+ 			rc = TMF_RESP_FUNC_FAILED;
+ 			return rc;
+ 		}
+-		PM8001_EH_DBG(pm8001_ha, pm8001_printk("Query:["));
+-		for (i = 0; i < 16; i++)
+-			printk(KERN_INFO "%02x ", cmnd->cmnd[i]);
+-		printk(KERN_INFO "]\n");
++		pm8001_dbg(pm8001_ha, EH, "Query:[%16ph]\n", cmnd->cmnd);
+ 		tmf_task.tmf = 	TMF_QUERY_TASK;
+ 		tmf_task.tag_of_task_to_be_managed = tag;
+ 
+@@ -1170,15 +1152,14 @@ int pm8001_query_task(struct sas_task *task)
+ 		switch (rc) {
+ 		/* The task is still in Lun, release it then */
+ 		case TMF_RESP_FUNC_SUCC:
+-			PM8001_EH_DBG(pm8001_ha,
+-				pm8001_printk("The task is still in Lun\n"));
++			pm8001_dbg(pm8001_ha, EH,
++				   "The task is still in Lun\n");
+ 			break;
+ 		/* The task is not in Lun or failed, reset the phy */
+ 		case TMF_RESP_FUNC_FAILED:
+ 		case TMF_RESP_FUNC_COMPLETE:
+-			PM8001_EH_DBG(pm8001_ha,
+-			pm8001_printk("The task is not in Lun or failed,"
+-			" reset the phy\n"));
++			pm8001_dbg(pm8001_ha, EH,
++				   "The task is not in Lun or failed, reset the phy\n");
+ 			break;
+ 		}
+ 	}
+@@ -1264,8 +1245,8 @@ int pm8001_abort_task(struct sas_task *task)
+ 			 * leaking the task in libsas or losing the race and
+ 			 * getting a double free.
+ 			 */
+-			PM8001_MSG_DBG(pm8001_ha,
+-				pm8001_printk("Waiting for local phy ctl\n"));
++			pm8001_dbg(pm8001_ha, MSG,
++				   "Waiting for local phy ctl\n");
+ 			ret = wait_for_completion_timeout(&completion,
+ 					PM8001_TASK_TIMEOUT * HZ);
+ 			if (!ret || !phy->reset_success) {
+@@ -1275,8 +1256,8 @@ int pm8001_abort_task(struct sas_task *task)
+ 				/* 3. Wait for Port Reset complete or
+ 				 * Port reset TMO
+ 				 */
+-				PM8001_MSG_DBG(pm8001_ha,
+-				pm8001_printk("Waiting for Port reset\n"));
++				pm8001_dbg(pm8001_ha, MSG,
++					   "Waiting for Port reset\n");
+ 				ret = wait_for_completion_timeout(
+ 					&completion_reset,
+ 					PM8001_TASK_TIMEOUT * HZ);
+@@ -1355,9 +1336,8 @@ int pm8001_clear_task_set(struct domain_device *dev, u8 *lun)
+ 	struct pm8001_device *pm8001_dev = dev->lldd_dev;
+ 	struct pm8001_hba_info *pm8001_ha = pm8001_find_ha_by_dev(dev);
+ 
+-	PM8001_EH_DBG(pm8001_ha,
+-		pm8001_printk("I_T_L_Q clear task set[%x]\n",
+-		pm8001_dev->device_id));
++	pm8001_dbg(pm8001_ha, EH, "I_T_L_Q clear task set[%x]\n",
++		   pm8001_dev->device_id);
+ 	tmf_task.tmf = TMF_CLEAR_TASK_SET;
+ 	return pm8001_issue_ssp_tmf(dev, lun, &tmf_task);
+ }
+diff --git a/drivers/scsi/pm8001/pm8001_sas.h b/drivers/scsi/pm8001/pm8001_sas.h
+index 95663e1380833..5cd6fe6a7d2d9 100644
+--- a/drivers/scsi/pm8001/pm8001_sas.h
++++ b/drivers/scsi/pm8001/pm8001_sas.h
+@@ -69,45 +69,16 @@
+ #define PM8001_DEV_LOGGING	0x80 /* development message logging */
+ #define PM8001_DEVIO_LOGGING	0x100 /* development io message logging */
+ #define PM8001_IOERR_LOGGING	0x200 /* development io err message logging */
+-#define pm8001_printk(format, arg...)	pr_info("%s:: %s  %d:" \
+-			format, pm8001_ha->name, __func__, __LINE__, ## arg)
+-#define PM8001_CHECK_LOGGING(HBA, LEVEL, CMD)	\
+-do {						\
+-	if (unlikely(HBA->logging_level & LEVEL))	\
+-		do {					\
+-			CMD;				\
+-		} while (0);				\
+-} while (0);
+ 
+-#define PM8001_EH_DBG(HBA, CMD)			\
+-	PM8001_CHECK_LOGGING(HBA, PM8001_EH_LOGGING, CMD)
++#define pm8001_printk(fmt, ...)						\
++	pr_info("%s:: %s  %d:" fmt,					\
++		pm8001_ha->name, __func__, __LINE__, ##__VA_ARGS__)
+ 
+-#define PM8001_INIT_DBG(HBA, CMD)		\
+-	PM8001_CHECK_LOGGING(HBA, PM8001_INIT_LOGGING, CMD)
+-
+-#define PM8001_DISC_DBG(HBA, CMD)		\
+-	PM8001_CHECK_LOGGING(HBA, PM8001_DISC_LOGGING, CMD)
+-
+-#define PM8001_IO_DBG(HBA, CMD)		\
+-	PM8001_CHECK_LOGGING(HBA, PM8001_IO_LOGGING, CMD)
+-
+-#define PM8001_FAIL_DBG(HBA, CMD)		\
+-	PM8001_CHECK_LOGGING(HBA, PM8001_FAIL_LOGGING, CMD)
+-
+-#define PM8001_IOCTL_DBG(HBA, CMD)		\
+-	PM8001_CHECK_LOGGING(HBA, PM8001_IOCTL_LOGGING, CMD)
+-
+-#define PM8001_MSG_DBG(HBA, CMD)		\
+-	PM8001_CHECK_LOGGING(HBA, PM8001_MSG_LOGGING, CMD)
+-
+-#define PM8001_DEV_DBG(HBA, CMD)		\
+-	PM8001_CHECK_LOGGING(HBA, PM8001_DEV_LOGGING, CMD)
+-
+-#define PM8001_DEVIO_DBG(HBA, CMD)		\
+-	PM8001_CHECK_LOGGING(HBA, PM8001_DEVIO_LOGGING, CMD)
+-
+-#define PM8001_IOERR_DBG(HBA, CMD)		\
+-	PM8001_CHECK_LOGGING(HBA, PM8001_IOERR_LOGGING, CMD)
++#define pm8001_dbg(HBA, level, fmt, ...)				\
++do {									\
++	if (unlikely((HBA)->logging_level & PM8001_##level##_LOGGING))	\
++		pm8001_printk(fmt, ##__VA_ARGS__);			\
++} while (0)
+ 
+ #define PM8001_USE_TASKLET
+ #define PM8001_USE_MSIX
+@@ -293,7 +264,7 @@ struct pm8001_device {
+ 	struct completion	*dcompletion;
+ 	struct completion	*setds_completion;
+ 	u32			device_id;
+-	u32			running_req;
++	atomic_t		running_req;
+ };
+ 
+ struct pm8001_prd_imt {
+diff --git a/drivers/scsi/pm8001/pm80xx_hwi.c b/drivers/scsi/pm8001/pm80xx_hwi.c
+index 155382ce84698..055f7649676ec 100644
+--- a/drivers/scsi/pm8001/pm80xx_hwi.c
++++ b/drivers/scsi/pm8001/pm80xx_hwi.c
+@@ -58,9 +58,8 @@ int pm80xx_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shift_value)
+ 		reg_val = pm8001_cr32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER);
+ 	} while ((reg_val != shift_value) && time_before(jiffies, start));
+ 	if (reg_val != shift_value) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("TIMEOUT:MEMBASE_II_SHIFT_REGISTER"
+-			" = 0x%x\n", reg_val));
++		pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:MEMBASE_II_SHIFT_REGISTER = 0x%x\n",
++			   reg_val);
+ 		return -1;
+ 	}
+ 	return 0;
+@@ -109,8 +108,8 @@ ssize_t pm80xx_get_fatal_dump(struct device *cdev,
+ 	}
+ 	/* initialize variables for very first call from host application */
+ 	if (pm8001_ha->forensic_info.data_buf.direct_offset == 0) {
+-		PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("forensic_info TYPE_NON_FATAL..............\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "forensic_info TYPE_NON_FATAL..............\n");
+ 		direct_data = (u8 *)fatal_error_data;
+ 		pm8001_ha->forensic_info.data_type = TYPE_NON_FATAL;
+ 		pm8001_ha->forensic_info.data_buf.direct_len = SYSFS_OFFSET;
+@@ -123,17 +122,13 @@ ssize_t pm80xx_get_fatal_dump(struct device *cdev,
+ 				MPI_FATAL_EDUMP_TABLE_SIGNATURE, 0x1234abcd);
+ 
+ 		pm8001_ha->forensic_info.data_buf.direct_data = direct_data;
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("ossaHwCB: status1 %d\n", status));
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("ossaHwCB: read_len 0x%x\n",
+-			pm8001_ha->forensic_info.data_buf.read_len));
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("ossaHwCB: direct_len 0x%x\n",
+-			pm8001_ha->forensic_info.data_buf.direct_len));
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("ossaHwCB: direct_offset 0x%x\n",
+-			pm8001_ha->forensic_info.data_buf.direct_offset));
++		pm8001_dbg(pm8001_ha, IO, "ossaHwCB: status1 %d\n", status);
++		pm8001_dbg(pm8001_ha, IO, "ossaHwCB: read_len 0x%x\n",
++			   pm8001_ha->forensic_info.data_buf.read_len);
++		pm8001_dbg(pm8001_ha, IO, "ossaHwCB: direct_len 0x%x\n",
++			   pm8001_ha->forensic_info.data_buf.direct_len);
++		pm8001_dbg(pm8001_ha, IO, "ossaHwCB: direct_offset 0x%x\n",
++			   pm8001_ha->forensic_info.data_buf.direct_offset);
+ 	}
+ 	if (pm8001_ha->forensic_info.data_buf.direct_offset == 0) {
+ 		/* start to get data */
+@@ -153,29 +148,24 @@ ssize_t pm80xx_get_fatal_dump(struct device *cdev,
+ 	 */
+ 	length_to_read =
+ 		accum_len - pm8001_ha->forensic_preserved_accumulated_transfer;
+-	PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("get_fatal_spcv: accum_len 0x%x\n", accum_len));
+-	PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("get_fatal_spcv: length_to_read 0x%x\n",
+-		length_to_read));
+-	PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("get_fatal_spcv: last_offset 0x%x\n",
+-		pm8001_ha->forensic_last_offset));
+-	PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("get_fatal_spcv: read_len 0x%x\n",
+-		pm8001_ha->forensic_info.data_buf.read_len));
+-	PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("get_fatal_spcv:: direct_len 0x%x\n",
+-		pm8001_ha->forensic_info.data_buf.direct_len));
+-	PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("get_fatal_spcv:: direct_offset 0x%x\n",
+-		pm8001_ha->forensic_info.data_buf.direct_offset));
++	pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: accum_len 0x%x\n",
++		   accum_len);
++	pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: length_to_read 0x%x\n",
++		   length_to_read);
++	pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: last_offset 0x%x\n",
++		   pm8001_ha->forensic_last_offset);
++	pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: read_len 0x%x\n",
++		   pm8001_ha->forensic_info.data_buf.read_len);
++	pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv:: direct_len 0x%x\n",
++		   pm8001_ha->forensic_info.data_buf.direct_len);
++	pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv:: direct_offset 0x%x\n",
++		   pm8001_ha->forensic_info.data_buf.direct_offset);
+ 
+ 	/* If accumulated length failed to read correctly fail the attempt.*/
+ 	if (accum_len == 0xFFFFFFFF) {
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("Possible PCI issue 0x%x not expected\n",
+-			accum_len));
++		pm8001_dbg(pm8001_ha, IO,
++			   "Possible PCI issue 0x%x not expected\n",
++			   accum_len);
+ 		return status;
+ 	}
+ 	/* If accumulated length is zero fail the attempt */
+@@ -239,8 +229,8 @@ moreData:
+ 			offset = (int)
+ 			((char *)pm8001_ha->forensic_info.data_buf.direct_data
+ 			- (char *)buf);
+-			PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("get_fatal_spcv:return1 0x%x\n", offset));
++			pm8001_dbg(pm8001_ha, IO,
++				   "get_fatal_spcv:return1 0x%x\n", offset);
+ 			return (char *)pm8001_ha->
+ 				forensic_info.data_buf.direct_data -
+ 				(char *)buf;
+@@ -262,8 +252,8 @@ moreData:
+ 			offset = (int)
+ 			((char *)pm8001_ha->forensic_info.data_buf.direct_data
+ 			- (char *)buf);
+-			PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("get_fatal_spcv:return2 0x%x\n", offset));
++			pm8001_dbg(pm8001_ha, IO,
++				   "get_fatal_spcv:return2 0x%x\n", offset);
+ 			return (char *)pm8001_ha->
+ 				forensic_info.data_buf.direct_data -
+ 				(char *)buf;
+@@ -289,8 +279,8 @@ moreData:
+ 		offset = (int)
+ 			((char *)pm8001_ha->forensic_info.data_buf.direct_data
+ 			- (char *)buf);
+-		PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("get_fatal_spcv: return3 0x%x\n", offset));
++		pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: return3 0x%x\n",
++			   offset);
+ 		return (char *)pm8001_ha->forensic_info.data_buf.direct_data -
+ 			(char *)buf;
+ 	}
+@@ -327,9 +317,9 @@ moreData:
+ 			} while ((reg_val) && time_before(jiffies, start));
+ 
+ 			if (reg_val != 0) {
+-				PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
+-				"TIMEOUT:MPI_FATAL_EDUMP_TABLE_HDSHAKE 0x%x\n",
+-				reg_val));
++				pm8001_dbg(pm8001_ha, FAIL,
++					   "TIMEOUT:MPI_FATAL_EDUMP_TABLE_HDSHAKE 0x%x\n",
++					   reg_val);
+ 			       /* Fail the dump if a timeout occurs */
+ 				pm8001_ha->forensic_info.data_buf.direct_data +=
+ 				sprintf(
+@@ -351,9 +341,9 @@ moreData:
+ 					time_before(jiffies, start));
+ 
+ 			if (reg_val < 2) {
+-				PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
+-				"TIMEOUT:MPI_FATAL_EDUMP_TABLE_STATUS = 0x%x\n",
+-				reg_val));
++				pm8001_dbg(pm8001_ha, FAIL,
++					   "TIMEOUT:MPI_FATAL_EDUMP_TABLE_STATUS = 0x%x\n",
++					   reg_val);
+ 				/* Fail the dump if a timeout occurs */
+ 				pm8001_ha->forensic_info.data_buf.direct_data +=
+ 				sprintf(
+@@ -387,8 +377,7 @@ moreData:
+ 	}
+ 	offset = (int)((char *)pm8001_ha->forensic_info.data_buf.direct_data
+ 			- (char *)buf);
+-	PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("get_fatal_spcv: return4 0x%x\n", offset));
++	pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: return4 0x%x\n", offset);
+ 	return (char *)pm8001_ha->forensic_info.data_buf.direct_data -
+ 		(char *)buf;
+ }
+@@ -419,8 +408,7 @@ ssize_t pm80xx_get_non_fatal_dump(struct device *cdev,
+ 				PAGE_SIZE, "Not supported for SPC controller");
+ 			return 0;
+ 		}
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("forensic_info TYPE_NON_FATAL...\n"));
++		pm8001_dbg(pm8001_ha, IO, "forensic_info TYPE_NON_FATAL...\n");
+ 		/*
+ 		 * Step 1: Write the host buffer parameters in the MPI Fatal and
+ 		 * Non-Fatal Error Dump Capture Table.This is the buffer
+@@ -581,24 +569,24 @@ static void read_main_config_table(struct pm8001_hba_info *pm8001_ha)
+ 	pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version =
+ 		pm8001_mr32(address, MAIN_MPI_INACTIVE_FW_VERSION);
+ 
+-	PM8001_DEV_DBG(pm8001_ha, pm8001_printk(
+-		"Main cfg table: sign:%x interface rev:%x fw_rev:%x\n",
+-		pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature,
+-		pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev,
+-		pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev));
+-
+-	PM8001_DEV_DBG(pm8001_ha, pm8001_printk(
+-		"table offset: gst:%x iq:%x oq:%x int vec:%x phy attr:%x\n",
+-		pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset,
+-		pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset,
+-		pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset,
+-		pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset,
+-		pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset));
+-
+-	PM8001_DEV_DBG(pm8001_ha, pm8001_printk(
+-		"Main cfg table; ila rev:%x Inactive fw rev:%x\n",
+-		pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version,
+-		pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version));
++	pm8001_dbg(pm8001_ha, DEV,
++		   "Main cfg table: sign:%x interface rev:%x fw_rev:%x\n",
++		   pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature,
++		   pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev,
++		   pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev);
++
++	pm8001_dbg(pm8001_ha, DEV,
++		   "table offset: gst:%x iq:%x oq:%x int vec:%x phy attr:%x\n",
++		   pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset,
++		   pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset,
++		   pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset,
++		   pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset,
++		   pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset);
++
++	pm8001_dbg(pm8001_ha, DEV,
++		   "Main cfg table; ila rev:%x Inactive fw rev:%x\n",
++		   pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version,
++		   pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version);
+ }
+ 
+ /**
+@@ -808,10 +796,10 @@ static void init_default_table_values(struct pm8001_hba_info *pm8001_ha)
+ 		pm8001_ha->inbnd_q_tbl[i].producer_idx		= 0;
+ 		pm8001_ha->inbnd_q_tbl[i].consumer_index	= 0;
+ 
+-		PM8001_DEV_DBG(pm8001_ha, pm8001_printk(
+-			"IQ %d pi_bar 0x%x pi_offset 0x%x\n", i,
+-			pm8001_ha->inbnd_q_tbl[i].pi_pci_bar,
+-			pm8001_ha->inbnd_q_tbl[i].pi_offset));
++		pm8001_dbg(pm8001_ha, DEV,
++			   "IQ %d pi_bar 0x%x pi_offset 0x%x\n", i,
++			   pm8001_ha->inbnd_q_tbl[i].pi_pci_bar,
++			   pm8001_ha->inbnd_q_tbl[i].pi_offset);
+ 	}
+ 	for (i = 0; i < pm8001_ha->max_q_num; i++) {
+ 		pm8001_ha->outbnd_q_tbl[i].element_size_cnt	=
+@@ -841,10 +829,10 @@ static void init_default_table_values(struct pm8001_hba_info *pm8001_ha)
+ 		pm8001_ha->outbnd_q_tbl[i].consumer_idx		= 0;
+ 		pm8001_ha->outbnd_q_tbl[i].producer_index	= 0;
+ 
+-		PM8001_DEV_DBG(pm8001_ha, pm8001_printk(
+-			"OQ %d ci_bar 0x%x ci_offset 0x%x\n", i,
+-			pm8001_ha->outbnd_q_tbl[i].ci_pci_bar,
+-			pm8001_ha->outbnd_q_tbl[i].ci_offset));
++		pm8001_dbg(pm8001_ha, DEV,
++			   "OQ %d ci_bar 0x%x ci_offset 0x%x\n", i,
++			   pm8001_ha->outbnd_q_tbl[i].ci_pci_bar,
++			   pm8001_ha->outbnd_q_tbl[i].ci_offset);
+ 	}
+ }
+ 
+@@ -878,9 +866,9 @@ static void update_main_config_table(struct pm8001_hba_info *pm8001_ha)
+ 					((pm8001_ha->max_q_num - 1) << 8);
+ 	pm8001_mw32(address, MAIN_FATAL_ERROR_INTERRUPT,
+ 		pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt);
+-	PM8001_DEV_DBG(pm8001_ha, pm8001_printk(
+-		"Updated Fatal error interrupt vector 0x%x\n",
+-		pm8001_mr32(address, MAIN_FATAL_ERROR_INTERRUPT)));
++	pm8001_dbg(pm8001_ha, DEV,
++		   "Updated Fatal error interrupt vector 0x%x\n",
++		   pm8001_mr32(address, MAIN_FATAL_ERROR_INTERRUPT));
+ 
+ 	pm8001_mw32(address, MAIN_EVENT_CRC_CHECK,
+ 		pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump);
+@@ -891,9 +879,9 @@ static void update_main_config_table(struct pm8001_hba_info *pm8001_ha)
+ 	pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping |= 0x20000000;
+ 	pm8001_mw32(address, MAIN_GPIO_LED_FLAGS_OFFSET,
+ 		pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping);
+-	PM8001_DEV_DBG(pm8001_ha, pm8001_printk(
+-		"Programming DW 0x21 in main cfg table with 0x%x\n",
+-		pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET)));
++	pm8001_dbg(pm8001_ha, DEV,
++		   "Programming DW 0x21 in main cfg table with 0x%x\n",
++		   pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET));
+ 
+ 	pm8001_mw32(address, MAIN_PORT_RECOVERY_TIMER,
+ 		pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer);
+@@ -934,20 +922,20 @@ static void update_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha,
+ 	pm8001_mw32(address, offset + IB_CI_BASE_ADDR_LO_OFFSET,
+ 		pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr);
+ 
+-	PM8001_DEV_DBG(pm8001_ha, pm8001_printk(
+-		"IQ %d: Element pri size 0x%x\n",
+-		number,
+-		pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt));
++	pm8001_dbg(pm8001_ha, DEV,
++		   "IQ %d: Element pri size 0x%x\n",
++		   number,
++		   pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt);
+ 
+-	PM8001_DEV_DBG(pm8001_ha, pm8001_printk(
+-		"IQ upr base addr 0x%x IQ lwr base addr 0x%x\n",
+-		pm8001_ha->inbnd_q_tbl[number].upper_base_addr,
+-		pm8001_ha->inbnd_q_tbl[number].lower_base_addr));
++	pm8001_dbg(pm8001_ha, DEV,
++		   "IQ upr base addr 0x%x IQ lwr base addr 0x%x\n",
++		   pm8001_ha->inbnd_q_tbl[number].upper_base_addr,
++		   pm8001_ha->inbnd_q_tbl[number].lower_base_addr);
+ 
+-	PM8001_DEV_DBG(pm8001_ha, pm8001_printk(
+-		"CI upper base addr 0x%x CI lower base addr 0x%x\n",
+-		pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr,
+-		pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr));
++	pm8001_dbg(pm8001_ha, DEV,
++		   "CI upper base addr 0x%x CI lower base addr 0x%x\n",
++		   pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr,
++		   pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr);
+ }
+ 
+ /**
+@@ -973,20 +961,20 @@ static void update_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha,
+ 	pm8001_mw32(address, offset + OB_INTERRUPT_COALES_OFFSET,
+ 		pm8001_ha->outbnd_q_tbl[number].interrup_vec_cnt_delay);
+ 
+-	PM8001_DEV_DBG(pm8001_ha, pm8001_printk(
+-		"OQ %d: Element pri size 0x%x\n",
+-		number,
+-		pm8001_ha->outbnd_q_tbl[number].element_size_cnt));
++	pm8001_dbg(pm8001_ha, DEV,
++		   "OQ %d: Element pri size 0x%x\n",
++		   number,
++		   pm8001_ha->outbnd_q_tbl[number].element_size_cnt);
+ 
+-	PM8001_DEV_DBG(pm8001_ha, pm8001_printk(
+-		"OQ upr base addr 0x%x OQ lwr base addr 0x%x\n",
+-		pm8001_ha->outbnd_q_tbl[number].upper_base_addr,
+-		pm8001_ha->outbnd_q_tbl[number].lower_base_addr));
++	pm8001_dbg(pm8001_ha, DEV,
++		   "OQ upr base addr 0x%x OQ lwr base addr 0x%x\n",
++		   pm8001_ha->outbnd_q_tbl[number].upper_base_addr,
++		   pm8001_ha->outbnd_q_tbl[number].lower_base_addr);
+ 
+-	PM8001_DEV_DBG(pm8001_ha, pm8001_printk(
+-		"PI upper base addr 0x%x PI lower base addr 0x%x\n",
+-		pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr,
+-		pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr));
++	pm8001_dbg(pm8001_ha, DEV,
++		   "PI upper base addr 0x%x PI lower base addr 0x%x\n",
++		   pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr,
++		   pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr);
+ }
+ 
+ /**
+@@ -1016,8 +1004,9 @@ static int mpi_init_check(struct pm8001_hba_info *pm8001_ha)
+ 
+ 	if (!max_wait_count) {
+ 		/* additional check */
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
+-			"Inb doorbell clear not toggled[value:%x]\n", value));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "Inb doorbell clear not toggled[value:%x]\n",
++			   value);
+ 		return -EBUSY;
+ 	}
+ 	/* check the MPI-State for initialization upto 100ms*/
+@@ -1068,9 +1057,9 @@ static int check_fw_ready(struct pm8001_hba_info *pm8001_ha)
+ 	if (!max_wait_count)
+ 		ret = -1;
+ 	else {
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" ila ready status in %d millisec\n",
+-				(max_wait_time - max_wait_count)));
++		pm8001_dbg(pm8001_ha, MSG,
++			   " ila ready status in %d millisec\n",
++			   (max_wait_time - max_wait_count));
+ 	}
+ 
+ 	/* check RAAE status */
+@@ -1083,9 +1072,9 @@ static int check_fw_ready(struct pm8001_hba_info *pm8001_ha)
+ 	if (!max_wait_count)
+ 		ret = -1;
+ 	else {
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" raae ready status in %d millisec\n",
+-					(max_wait_time - max_wait_count)));
++		pm8001_dbg(pm8001_ha, MSG,
++			   " raae ready status in %d millisec\n",
++			   (max_wait_time - max_wait_count));
+ 	}
+ 
+ 	/* check iop0 status */
+@@ -1098,9 +1087,9 @@ static int check_fw_ready(struct pm8001_hba_info *pm8001_ha)
+ 	if (!max_wait_count)
+ 		ret = -1;
+ 	else {
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" iop0 ready status in %d millisec\n",
+-				(max_wait_time - max_wait_count)));
++		pm8001_dbg(pm8001_ha, MSG,
++			   " iop0 ready status in %d millisec\n",
++			   (max_wait_time - max_wait_count));
+ 	}
+ 
+ 	/* check iop1 status only for 16 port controllers */
+@@ -1116,9 +1105,9 @@ static int check_fw_ready(struct pm8001_hba_info *pm8001_ha)
+ 		if (!max_wait_count)
+ 			ret = -1;
+ 		else {
+-			PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-				"iop1 ready status in %d millisec\n",
+-				(max_wait_time - max_wait_count)));
++			pm8001_dbg(pm8001_ha, MSG,
++				   "iop1 ready status in %d millisec\n",
++				   (max_wait_time - max_wait_count));
+ 		}
+ 	}
+ 
+@@ -1136,13 +1125,11 @@ static void init_pci_device_addresses(struct pm8001_hba_info *pm8001_ha)
+ 	value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0);
+ 	offset = value & 0x03FFFFFF; /* scratch pad 0 TBL address */
+ 
+-	PM8001_DEV_DBG(pm8001_ha,
+-		pm8001_printk("Scratchpad 0 Offset: 0x%x value 0x%x\n",
+-				offset, value));
++	pm8001_dbg(pm8001_ha, DEV, "Scratchpad 0 Offset: 0x%x value 0x%x\n",
++		   offset, value);
+ 	pcilogic = (value & 0xFC000000) >> 26;
+ 	pcibar = get_pci_bar_index(pcilogic);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("Scratchpad 0 PCI BAR: %d\n", pcibar));
++	pm8001_dbg(pm8001_ha, INIT, "Scratchpad 0 PCI BAR: %d\n", pcibar);
+ 	pm8001_ha->main_cfg_tbl_addr = base_addr =
+ 		pm8001_ha->io_mem[pcibar].memvirtaddr + offset;
+ 	pm8001_ha->general_stat_tbl_addr =
+@@ -1164,33 +1151,25 @@ static void init_pci_device_addresses(struct pm8001_hba_info *pm8001_ha)
+ 		base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0xA0) &
+ 					0xFFFFFF);
+ 
+-	PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("GST OFFSET 0x%x\n",
+-			pm8001_cr32(pm8001_ha, pcibar, offset + 0x18)));
+-	PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("INBND OFFSET 0x%x\n",
+-			pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C)));
+-	PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("OBND OFFSET 0x%x\n",
+-			pm8001_cr32(pm8001_ha, pcibar, offset + 0x20)));
+-	PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("IVT OFFSET 0x%x\n",
+-			pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C)));
+-	PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("PSPA OFFSET 0x%x\n",
+-			pm8001_cr32(pm8001_ha, pcibar, offset + 0x90)));
+-	PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("addr - main cfg %p general status %p\n",
+-			pm8001_ha->main_cfg_tbl_addr,
+-			pm8001_ha->general_stat_tbl_addr));
+-	PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("addr - inbnd %p obnd %p\n",
+-			pm8001_ha->inbnd_q_tbl_addr,
+-			pm8001_ha->outbnd_q_tbl_addr));
+-	PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("addr - pspa %p ivt %p\n",
+-			pm8001_ha->pspa_q_tbl_addr,
+-			pm8001_ha->ivt_tbl_addr));
++	pm8001_dbg(pm8001_ha, INIT, "GST OFFSET 0x%x\n",
++		   pm8001_cr32(pm8001_ha, pcibar, offset + 0x18));
++	pm8001_dbg(pm8001_ha, INIT, "INBND OFFSET 0x%x\n",
++		   pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C));
++	pm8001_dbg(pm8001_ha, INIT, "OBND OFFSET 0x%x\n",
++		   pm8001_cr32(pm8001_ha, pcibar, offset + 0x20));
++	pm8001_dbg(pm8001_ha, INIT, "IVT OFFSET 0x%x\n",
++		   pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C));
++	pm8001_dbg(pm8001_ha, INIT, "PSPA OFFSET 0x%x\n",
++		   pm8001_cr32(pm8001_ha, pcibar, offset + 0x90));
++	pm8001_dbg(pm8001_ha, INIT, "addr - main cfg %p general status %p\n",
++		   pm8001_ha->main_cfg_tbl_addr,
++		   pm8001_ha->general_stat_tbl_addr);
++	pm8001_dbg(pm8001_ha, INIT, "addr - inbnd %p obnd %p\n",
++		   pm8001_ha->inbnd_q_tbl_addr,
++		   pm8001_ha->outbnd_q_tbl_addr);
++	pm8001_dbg(pm8001_ha, INIT, "addr - pspa %p ivt %p\n",
++		   pm8001_ha->pspa_q_tbl_addr,
++		   pm8001_ha->ivt_tbl_addr);
+ }
+ 
+ /**
+@@ -1224,9 +1203,9 @@ pm80xx_set_thermal_config(struct pm8001_hba_info *pm8001_ha)
+ 				(THERMAL_ENABLE << 8) | page_code;
+ 	payload.cfg_pg[1] = (LTEMPHIL << 24) | (RTEMPHIL << 8);
+ 
+-	PM8001_DEV_DBG(pm8001_ha, pm8001_printk(
+-		"Setting up thermal config. cfg_pg 0 0x%x cfg_pg 1 0x%x\n",
+-		payload.cfg_pg[0], payload.cfg_pg[1]));
++	pm8001_dbg(pm8001_ha, DEV,
++		   "Setting up thermal config. cfg_pg 0 0x%x cfg_pg 1 0x%x\n",
++		   payload.cfg_pg[0], payload.cfg_pg[1]);
+ 
+ 	rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload,
+ 			sizeof(payload), 0);
+@@ -1281,32 +1260,24 @@ pm80xx_set_sas_protocol_timer_config(struct pm8001_hba_info *pm8001_ha)
+ 						| SAS_COPNRJT_RTRY_THR;
+ 	SASConfigPage.MAX_AIP =  SAS_MAX_AIP;
+ 
+-	PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("SASConfigPage.pageCode "
+-			"0x%08x\n", SASConfigPage.pageCode));
+-	PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("SASConfigPage.MST_MSI "
+-			" 0x%08x\n", SASConfigPage.MST_MSI));
+-	PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("SASConfigPage.STP_SSP_MCT_TMO "
+-			" 0x%08x\n", SASConfigPage.STP_SSP_MCT_TMO));
+-	PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("SASConfigPage.STP_FRM_TMO "
+-			" 0x%08x\n", SASConfigPage.STP_FRM_TMO));
+-	PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("SASConfigPage.STP_IDLE_TMO "
+-			" 0x%08x\n", SASConfigPage.STP_IDLE_TMO));
+-	PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("SASConfigPage.OPNRJT_RTRY_INTVL "
+-			" 0x%08x\n", SASConfigPage.OPNRJT_RTRY_INTVL));
+-	PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO "
+-			" 0x%08x\n", SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO));
+-	PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR "
+-			" 0x%08x\n", SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR));
+-	PM8001_INIT_DBG(pm8001_ha, pm8001_printk("SASConfigPage.MAX_AIP "
+-			" 0x%08x\n", SASConfigPage.MAX_AIP));
++	pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.pageCode 0x%08x\n",
++		   SASConfigPage.pageCode);
++	pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.MST_MSI  0x%08x\n",
++		   SASConfigPage.MST_MSI);
++	pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_SSP_MCT_TMO  0x%08x\n",
++		   SASConfigPage.STP_SSP_MCT_TMO);
++	pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_FRM_TMO  0x%08x\n",
++		   SASConfigPage.STP_FRM_TMO);
++	pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_IDLE_TMO  0x%08x\n",
++		   SASConfigPage.STP_IDLE_TMO);
++	pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.OPNRJT_RTRY_INTVL  0x%08x\n",
++		   SASConfigPage.OPNRJT_RTRY_INTVL);
++	pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO  0x%08x\n",
++		   SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO);
++	pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR  0x%08x\n",
++		   SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR);
++	pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.MAX_AIP  0x%08x\n",
++		   SASConfigPage.MAX_AIP);
+ 
+ 	memcpy(&payload.cfg_pg, &SASConfigPage,
+ 			 sizeof(SASProtocolTimerConfig_t));
+@@ -1346,18 +1317,18 @@ pm80xx_get_encrypt_info(struct pm8001_hba_info *pm8001_ha)
+ 						SCRATCH_PAD3_SMB_ENABLED)
+ 			pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB;
+ 		pm8001_ha->encrypt_info.status = 0;
+-		PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
+-			"Encryption: SCRATCH_PAD3_ENC_READY 0x%08X."
+-			"Cipher mode 0x%x Sec mode 0x%x status 0x%x\n",
+-			scratch3_value, pm8001_ha->encrypt_info.cipher_mode,
+-			pm8001_ha->encrypt_info.sec_mode,
+-			pm8001_ha->encrypt_info.status));
++		pm8001_dbg(pm8001_ha, INIT,
++			   "Encryption: SCRATCH_PAD3_ENC_READY 0x%08X.Cipher mode 0x%x Sec mode 0x%x status 0x%x\n",
++			   scratch3_value,
++			   pm8001_ha->encrypt_info.cipher_mode,
++			   pm8001_ha->encrypt_info.sec_mode,
++			   pm8001_ha->encrypt_info.status);
+ 		ret = 0;
+ 	} else if ((scratch3_value & SCRATCH_PAD3_ENC_READY) ==
+ 					SCRATCH_PAD3_ENC_DISABLED) {
+-		PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
+-			"Encryption: SCRATCH_PAD3_ENC_DISABLED 0x%08X\n",
+-			scratch3_value));
++		pm8001_dbg(pm8001_ha, INIT,
++			   "Encryption: SCRATCH_PAD3_ENC_DISABLED 0x%08X\n",
++			   scratch3_value);
+ 		pm8001_ha->encrypt_info.status = 0xFFFFFFFF;
+ 		pm8001_ha->encrypt_info.cipher_mode = 0;
+ 		pm8001_ha->encrypt_info.sec_mode = 0;
+@@ -1377,12 +1348,12 @@ pm80xx_get_encrypt_info(struct pm8001_hba_info *pm8001_ha)
+ 		if ((scratch3_value & SCRATCH_PAD3_SM_MASK) ==
+ 					SCRATCH_PAD3_SMB_ENABLED)
+ 			pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB;
+-		PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
+-			"Encryption: SCRATCH_PAD3_DIS_ERR 0x%08X."
+-			"Cipher mode 0x%x sec mode 0x%x status 0x%x\n",
+-			scratch3_value, pm8001_ha->encrypt_info.cipher_mode,
+-			pm8001_ha->encrypt_info.sec_mode,
+-			pm8001_ha->encrypt_info.status));
++		pm8001_dbg(pm8001_ha, INIT,
++			   "Encryption: SCRATCH_PAD3_DIS_ERR 0x%08X.Cipher mode 0x%x sec mode 0x%x status 0x%x\n",
++			   scratch3_value,
++			   pm8001_ha->encrypt_info.cipher_mode,
++			   pm8001_ha->encrypt_info.sec_mode,
++			   pm8001_ha->encrypt_info.status);
+ 	} else if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) ==
+ 				 SCRATCH_PAD3_ENC_ENA_ERR) {
+ 
+@@ -1400,12 +1371,12 @@ pm80xx_get_encrypt_info(struct pm8001_hba_info *pm8001_ha)
+ 					SCRATCH_PAD3_SMB_ENABLED)
+ 			pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB;
+ 
+-		PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
+-			"Encryption: SCRATCH_PAD3_ENA_ERR 0x%08X."
+-			"Cipher mode 0x%x sec mode 0x%x status 0x%x\n",
+-			scratch3_value, pm8001_ha->encrypt_info.cipher_mode,
+-			pm8001_ha->encrypt_info.sec_mode,
+-			pm8001_ha->encrypt_info.status));
++		pm8001_dbg(pm8001_ha, INIT,
++			   "Encryption: SCRATCH_PAD3_ENA_ERR 0x%08X.Cipher mode 0x%x sec mode 0x%x status 0x%x\n",
++			   scratch3_value,
++			   pm8001_ha->encrypt_info.cipher_mode,
++			   pm8001_ha->encrypt_info.sec_mode,
++			   pm8001_ha->encrypt_info.status);
+ 	}
+ 	return ret;
+ }
+@@ -1435,9 +1406,9 @@ static int pm80xx_encrypt_update(struct pm8001_hba_info *pm8001_ha)
+ 	payload.new_curidx_ksop = ((1 << 24) | (1 << 16) | (1 << 8) |
+ 					KEK_MGMT_SUBOP_KEYCARDUPDATE);
+ 
+-	PM8001_DEV_DBG(pm8001_ha, pm8001_printk(
+-		"Saving Encryption info to flash. payload 0x%x\n",
+-		payload.new_curidx_ksop));
++	pm8001_dbg(pm8001_ha, DEV,
++		   "Saving Encryption info to flash. payload 0x%x\n",
++		   payload.new_curidx_ksop);
+ 
+ 	rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload,
+ 			sizeof(payload), 0);
+@@ -1458,8 +1429,7 @@ static int pm80xx_chip_init(struct pm8001_hba_info *pm8001_ha)
+ 
+ 	/* check the firmware status */
+ 	if (-1 == check_fw_ready(pm8001_ha)) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("Firmware is not ready!\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "Firmware is not ready!\n");
+ 		return -EBUSY;
+ 	}
+ 
+@@ -1483,8 +1453,7 @@ static int pm80xx_chip_init(struct pm8001_hba_info *pm8001_ha)
+ 	}
+ 	/* notify firmware update finished and check initialization status */
+ 	if (0 == mpi_init_check(pm8001_ha)) {
+-		PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("MPI initialize successful!\n"));
++		pm8001_dbg(pm8001_ha, INIT, "MPI initialize successful!\n");
+ 	} else
+ 		return -EBUSY;
+ 
+@@ -1493,16 +1462,13 @@ static int pm80xx_chip_init(struct pm8001_hba_info *pm8001_ha)
+ 
+ 	/* Check for encryption */
+ 	if (pm8001_ha->chip->encrypt) {
+-		PM8001_INIT_DBG(pm8001_ha,
+-			pm8001_printk("Checking for encryption\n"));
++		pm8001_dbg(pm8001_ha, INIT, "Checking for encryption\n");
+ 		ret = pm80xx_get_encrypt_info(pm8001_ha);
+ 		if (ret == -1) {
+-			PM8001_INIT_DBG(pm8001_ha,
+-				pm8001_printk("Encryption error !!\n"));
++			pm8001_dbg(pm8001_ha, INIT, "Encryption error !!\n");
+ 			if (pm8001_ha->encrypt_info.status == 0x81) {
+-				PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
+-					"Encryption enabled with error."
+-					"Saving encryption key to flash\n"));
++				pm8001_dbg(pm8001_ha, INIT,
++					   "Encryption enabled with error.Saving encryption key to flash\n");
+ 				pm80xx_encrypt_update(pm8001_ha);
+ 			}
+ 		}
+@@ -1533,8 +1499,7 @@ static int mpi_uninit_check(struct pm8001_hba_info *pm8001_ha)
+ 	} while ((value != 0) && (--max_wait_count));
+ 
+ 	if (!max_wait_count) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("TIMEOUT:IBDB value/=%x\n", value));
++		pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:IBDB value/=%x\n", value);
+ 		return -1;
+ 	}
+ 
+@@ -1551,9 +1516,8 @@ static int mpi_uninit_check(struct pm8001_hba_info *pm8001_ha)
+ 			break;
+ 	} while (--max_wait_count);
+ 	if (!max_wait_count) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk(" TIME OUT MPI State = 0x%x\n",
+-				gst_len_mpistate & GST_MPI_STATE_MASK));
++		pm8001_dbg(pm8001_ha, FAIL, " TIME OUT MPI State = 0x%x\n",
++			   gst_len_mpistate & GST_MPI_STATE_MASK);
+ 		return -1;
+ 	}
+ 
+@@ -1581,9 +1545,9 @@ pm80xx_chip_soft_rst(struct pm8001_hba_info *pm8001_ha)
+ 			u32 r1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
+ 			u32 r2 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2);
+ 			u32 r3 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3);
+-			PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
+-				"MPI state is not ready scratch: %x:%x:%x:%x\n",
+-				r0, r1, r2, r3));
++			pm8001_dbg(pm8001_ha, FAIL,
++				   "MPI state is not ready scratch: %x:%x:%x:%x\n",
++				   r0, r1, r2, r3);
+ 			/* if things aren't ready but the bootloader is ok then
+ 			 * try the reset anyway.
+ 			 */
+@@ -1593,25 +1557,25 @@ pm80xx_chip_soft_rst(struct pm8001_hba_info *pm8001_ha)
+ 	}
+ 	/* checked for reset register normal state; 0x0 */
+ 	regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("reset register before write : 0x%x\n", regval));
++	pm8001_dbg(pm8001_ha, INIT, "reset register before write : 0x%x\n",
++		   regval);
+ 
+ 	pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, SPCv_NORMAL_RESET_VALUE);
+ 	msleep(500);
+ 
+ 	regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET);
+-	PM8001_INIT_DBG(pm8001_ha,
+-	pm8001_printk("reset register after write 0x%x\n", regval));
++	pm8001_dbg(pm8001_ha, INIT, "reset register after write 0x%x\n",
++		   regval);
+ 
+ 	if ((regval & SPCv_SOFT_RESET_READ_MASK) ==
+ 			SPCv_SOFT_RESET_NORMAL_RESET_OCCURED) {
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" soft reset successful [regval: 0x%x]\n",
+-					regval));
++		pm8001_dbg(pm8001_ha, MSG,
++			   " soft reset successful [regval: 0x%x]\n",
++			   regval);
+ 	} else {
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" soft reset failed [regval: 0x%x]\n",
+-					regval));
++		pm8001_dbg(pm8001_ha, MSG,
++			   " soft reset failed [regval: 0x%x]\n",
++			   regval);
+ 
+ 		/* check bootloader is successfully executed or in HDA mode */
+ 		bootloader_state =
+@@ -1619,28 +1583,27 @@ pm80xx_chip_soft_rst(struct pm8001_hba_info *pm8001_ha)
+ 			SCRATCH_PAD1_BOOTSTATE_MASK;
+ 
+ 		if (bootloader_state == SCRATCH_PAD1_BOOTSTATE_HDA_SEEPROM) {
+-			PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-				"Bootloader state - HDA mode SEEPROM\n"));
++			pm8001_dbg(pm8001_ha, MSG,
++				   "Bootloader state - HDA mode SEEPROM\n");
+ 		} else if (bootloader_state ==
+ 				SCRATCH_PAD1_BOOTSTATE_HDA_BOOTSTRAP) {
+-			PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-				"Bootloader state - HDA mode Bootstrap Pin\n"));
++			pm8001_dbg(pm8001_ha, MSG,
++				   "Bootloader state - HDA mode Bootstrap Pin\n");
+ 		} else if (bootloader_state ==
+ 				SCRATCH_PAD1_BOOTSTATE_HDA_SOFTRESET) {
+-			PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-				"Bootloader state - HDA mode soft reset\n"));
++			pm8001_dbg(pm8001_ha, MSG,
++				   "Bootloader state - HDA mode soft reset\n");
+ 		} else if (bootloader_state ==
+ 					SCRATCH_PAD1_BOOTSTATE_CRIT_ERROR) {
+-			PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-				"Bootloader state-HDA mode critical error\n"));
++			pm8001_dbg(pm8001_ha, MSG,
++				   "Bootloader state-HDA mode critical error\n");
+ 		}
+ 		return -EBUSY;
+ 	}
+ 
+ 	/* check the firmware status after reset */
+ 	if (-1 == check_fw_ready(pm8001_ha)) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("Firmware is not ready!\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "Firmware is not ready!\n");
+ 		/* check iButton feature support for motherboard controller */
+ 		if (pm8001_ha->pdev->subsystem_vendor !=
+ 			PCI_VENDOR_ID_ADAPTEC2 &&
+@@ -1652,21 +1615,18 @@ pm80xx_chip_soft_rst(struct pm8001_hba_info *pm8001_ha)
+ 			ibutton1 = pm8001_cr32(pm8001_ha, 0,
+ 					MSGU_HOST_SCRATCH_PAD_7);
+ 			if (!ibutton0 && !ibutton1) {
+-				PM8001_FAIL_DBG(pm8001_ha,
+-					pm8001_printk("iButton Feature is"
+-					" not Available!!!\n"));
++				pm8001_dbg(pm8001_ha, FAIL,
++					   "iButton Feature is not Available!!!\n");
+ 				return -EBUSY;
+ 			}
+ 			if (ibutton0 == 0xdeadbeef && ibutton1 == 0xdeadbeef) {
+-				PM8001_FAIL_DBG(pm8001_ha,
+-					pm8001_printk("CRC Check for iButton"
+-					" Feature Failed!!!\n"));
++				pm8001_dbg(pm8001_ha, FAIL,
++					   "CRC Check for iButton Feature Failed!!!\n");
+ 				return -EBUSY;
+ 			}
+ 		}
+ 	}
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("SPCv soft reset Complete\n"));
++	pm8001_dbg(pm8001_ha, INIT, "SPCv soft reset Complete\n");
+ 	return 0;
+ }
+ 
+@@ -1674,13 +1634,11 @@ static void pm80xx_hw_chip_rst(struct pm8001_hba_info *pm8001_ha)
+ {
+ 	u32 i;
+ 
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("chip reset start\n"));
++	pm8001_dbg(pm8001_ha, INIT, "chip reset start\n");
+ 
+ 	/* do SPCv chip reset. */
+ 	pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, 0x11);
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("SPC soft reset Complete\n"));
++	pm8001_dbg(pm8001_ha, INIT, "SPC soft reset Complete\n");
+ 
+ 	/* Check this ..whether delay is required or no */
+ 	/* delay 10 usec */
+@@ -1692,8 +1650,7 @@ static void pm80xx_hw_chip_rst(struct pm8001_hba_info *pm8001_ha)
+ 		mdelay(1);
+ 	} while ((--i) != 0);
+ 
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("chip reset finished\n"));
++	pm8001_dbg(pm8001_ha, INIT, "chip reset finished\n");
+ }
+ 
+ /**
+@@ -1769,15 +1726,14 @@ static void pm80xx_send_abort_all(struct pm8001_hba_info *pm8001_ha,
+ 	int ret;
+ 
+ 	if (!pm8001_ha_dev) {
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("dev is null\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "dev is null\n");
+ 		return;
+ 	}
+ 
+ 	task = sas_alloc_slow_task(GFP_ATOMIC);
+ 
+ 	if (!task) {
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("cannot "
+-						"allocate task\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "cannot allocate task\n");
+ 		return;
+ 	}
+ 
+@@ -1803,8 +1759,7 @@ static void pm80xx_send_abort_all(struct pm8001_hba_info *pm8001_ha,
+ 
+ 	ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &task_abort,
+ 			sizeof(task_abort), 0);
+-	PM8001_FAIL_DBG(pm8001_ha,
+-		pm8001_printk("Executing abort task end\n"));
++	pm8001_dbg(pm8001_ha, FAIL, "Executing abort task end\n");
+ 	if (ret) {
+ 		sas_free_task(task);
+ 		pm8001_tag_free(pm8001_ha, ccb_tag);
+@@ -1827,8 +1782,7 @@ static void pm80xx_send_read_log(struct pm8001_hba_info *pm8001_ha,
+ 	task = sas_alloc_slow_task(GFP_ATOMIC);
+ 
+ 	if (!task) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("cannot allocate task !!!\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "cannot allocate task !!!\n");
+ 		return;
+ 	}
+ 	task->task_done = pm8001_task_done;
+@@ -1836,8 +1790,7 @@ static void pm80xx_send_read_log(struct pm8001_hba_info *pm8001_ha,
+ 	res = pm8001_tag_alloc(pm8001_ha, &ccb_tag);
+ 	if (res) {
+ 		sas_free_task(task);
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("cannot allocate tag !!!\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "cannot allocate tag !!!\n");
+ 		return;
+ 	}
+ 
+@@ -1848,8 +1801,8 @@ static void pm80xx_send_read_log(struct pm8001_hba_info *pm8001_ha,
+ 	if (!dev) {
+ 		sas_free_task(task);
+ 		pm8001_tag_free(pm8001_ha, ccb_tag);
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("Domain device cannot be allocated\n"));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "Domain device cannot be allocated\n");
+ 		return;
+ 	}
+ 
+@@ -1882,7 +1835,7 @@ static void pm80xx_send_read_log(struct pm8001_hba_info *pm8001_ha,
+ 
+ 	res = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &sata_cmd,
+ 			sizeof(sata_cmd), 0);
+-	PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("Executing read log end\n"));
++	pm8001_dbg(pm8001_ha, FAIL, "Executing read log end\n");
+ 	if (res) {
+ 		sas_free_task(task);
+ 		pm8001_tag_free(pm8001_ha, ccb_tag);
+@@ -1928,27 +1881,24 @@ mpi_ssp_completion(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 	t = ccb->task;
+ 
+ 	if (status && status != IO_UNDERFLOW)
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("sas IO status 0x%x\n", status));
++		pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", status);
+ 	if (unlikely(!t || !t->lldd_task || !t->dev))
+ 		return;
+ 	ts = &t->task_status;
+ 
+-	PM8001_DEV_DBG(pm8001_ha, pm8001_printk(
+-		"tag::0x%x, status::0x%x task::0x%p\n", tag, status, t));
++	pm8001_dbg(pm8001_ha, DEV,
++		   "tag::0x%x, status::0x%x task::0x%p\n", tag, status, t);
+ 
+ 	/* Print sas address of IO failed device */
+ 	if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) &&
+ 		(status != IO_UNDERFLOW))
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("SAS Address of IO Failure Drive"
+-			":%016llx", SAS_ADDR(t->dev->sas_addr)));
++		pm8001_dbg(pm8001_ha, FAIL, "SAS Address of IO Failure Drive:%016llx\n",
++			   SAS_ADDR(t->dev->sas_addr));
+ 
+ 	switch (status) {
+ 	case IO_SUCCESS:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_SUCCESS ,param = 0x%x\n",
+-				param));
++		pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS ,param = 0x%x\n",
++			   param);
+ 		if (param == 0) {
+ 			ts->resp = SAS_TASK_COMPLETE;
+ 			ts->stat = SAM_STAT_GOOD;
+@@ -1960,73 +1910,83 @@ mpi_ssp_completion(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 			sas_ssp_task_response(pm8001_ha->dev, t, iu);
+ 		}
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_ABORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_ABORTED IOMB Tag\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_ABORTED_TASK;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_UNDERFLOW:
+ 		/* SSP Completion with error */
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_UNDERFLOW ,param = 0x%x\n",
+-				param));
++		pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW ,param = 0x%x\n",
++			   param);
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_UNDERRUN;
+ 		ts->residual = param;
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_NO_DEVICE:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_NO_DEVICE\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n");
+ 		ts->resp = SAS_TASK_UNDELIVERED;
+ 		ts->stat = SAS_PHY_DOWN;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		/* Force the midlayer to retry */
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_PHY_NOT_READY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_INVALID_SSP_RSP_FRAME:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_INVALID_SSP_RSP_FRAME\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_XFER_ERROR_INVALID_SSP_RSP_FRAME\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_EPROTO;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_UNKNOWN;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS:
+ 	case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED:
+@@ -2034,8 +1994,7 @@ mpi_ssp_completion(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST:
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE:
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_UNKNOWN;
+@@ -2045,67 +2004,78 @@ mpi_ssp_completion(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 				IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_BAD_DEST;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-			"IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_CONN_RATE;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
+ 		ts->resp = SAS_TASK_UNDELIVERED;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_NAK_RECEIVED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_ACK_NAK_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_NAK_R_ERR;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_DMA:
+-		PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("IO_XFER_ERROR_DMA\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_OPEN_RETRY_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_OFFSET_MISMATCH:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_PORT_IN_RESET:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_PORT_IN_RESET\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_DS_NON_OPERATIONAL:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_DS_NON_OPERATIONAL\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		if (!t->uldd_task)
+@@ -2114,51 +2084,55 @@ mpi_ssp_completion(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 				IO_DS_NON_OPERATIONAL);
+ 		break;
+ 	case IO_DS_IN_RECOVERY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_DS_IN_RECOVERY\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_TM_TAG_NOT_FOUND:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_TM_TAG_NOT_FOUND\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_TM_TAG_NOT_FOUND\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_SSP_EXT_IU_ZERO_LEN_ERROR:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_SSP_EXT_IU_ZERO_LEN_ERROR\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_SSP_EXT_IU_ZERO_LEN_ERROR\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	default:
+-		PM8001_DEVIO_DBG(pm8001_ha,
+-			pm8001_printk("Unknown status 0x%x\n", status));
++		pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status);
+ 		/* not allowed case. Therefore, return failed status */
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	}
+-	PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("scsi_status = 0x%x\n ",
+-		psspPayload->ssp_resp_iu.status));
++	pm8001_dbg(pm8001_ha, IO, "scsi_status = 0x%x\n ",
++		   psspPayload->ssp_resp_iu.status);
+ 	spin_lock_irqsave(&t->task_state_lock, flags);
+ 	t->task_state_flags &= ~SAS_TASK_STATE_PENDING;
+ 	t->task_state_flags &= ~SAS_TASK_AT_INITIATOR;
+ 	t->task_state_flags |= SAS_TASK_STATE_DONE;
+ 	if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
+ 		spin_unlock_irqrestore(&t->task_state_lock, flags);
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
+-			"task 0x%p done with io_status 0x%x resp 0x%x "
+-			"stat 0x%x but aborted by upper layer!\n",
+-			t, status, ts->resp, ts->stat));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
++			   t, status, ts->resp, ts->stat);
+ 		if (t->slow_task)
+ 			complete(&t->slow_task->completion);
+ 		pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
+@@ -2188,52 +2162,47 @@ static void mpi_ssp_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 	t = ccb->task;
+ 	pm8001_dev = ccb->device;
+ 	if (event)
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("sas IO status 0x%x\n", event));
++		pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", event);
+ 	if (unlikely(!t || !t->lldd_task || !t->dev))
+ 		return;
+ 	ts = &t->task_status;
+-	PM8001_IOERR_DBG(pm8001_ha,
+-		pm8001_printk("port_id:0x%x, tag:0x%x, event:0x%x\n",
+-				port_id, tag, event));
++	pm8001_dbg(pm8001_ha, IOERR, "port_id:0x%x, tag:0x%x, event:0x%x\n",
++		   port_id, tag, event);
+ 	switch (event) {
+ 	case IO_OVERFLOW:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n");)
++		pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		ts->residual = 0;
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
+ 		pm8001_handle_event(pm8001_ha, t, IO_XFER_ERROR_BREAK);
+ 		return;
+ 	case IO_XFER_ERROR_PHY_NOT_READY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-			"IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_EPROTO;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_UNKNOWN;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+@@ -2244,8 +2213,7 @@ static void mpi_ssp_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST:
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE:
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_UNKNOWN;
+@@ -2255,94 +2223,86 @@ static void mpi_ssp_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 				IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_BAD_DEST;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-			"IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_CONN_RATE;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
+ 		break;
+ 	case IO_XFER_ERROR_NAK_RECEIVED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	case IO_XFER_ERROR_ACK_NAK_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_NAK_R_ERR;
+ 		break;
+ 	case IO_XFER_OPEN_RETRY_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
+ 		pm8001_handle_event(pm8001_ha, t, IO_XFER_OPEN_RETRY_TIMEOUT);
+ 		return;
+ 	case IO_XFER_ERROR_UNEXPECTED_PHASE:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_UNEXPECTED_PHASE\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		break;
+ 	case IO_XFER_ERROR_XFER_RDY_OVERRUN:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_XFER_RDY_OVERRUN\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		break;
+ 	case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		break;
+ 	case IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		break;
+ 	case IO_XFER_ERROR_OFFSET_MISMATCH:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		break;
+ 	case IO_XFER_ERROR_XFER_ZERO_DATA_LEN:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		break;
+ 	case IO_XFER_ERROR_INTERNAL_CRC_ERROR:
+-		PM8001_IOERR_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFR_ERROR_INTERNAL_CRC_ERROR\n"));
++		pm8001_dbg(pm8001_ha, IOERR,
++			   "IO_XFR_ERROR_INTERNAL_CRC_ERROR\n");
+ 		/* TBC: used default set values */
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		break;
+ 	case IO_XFER_CMD_FRAME_ISSUED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_CMD_FRAME_ISSUED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n");
+ 		return;
+ 	default:
+-		PM8001_DEVIO_DBG(pm8001_ha,
+-			pm8001_printk("Unknown status 0x%x\n", event));
++		pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", event);
+ 		/* not allowed case. Therefore, return failed status */
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+@@ -2354,10 +2314,9 @@ static void mpi_ssp_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 	t->task_state_flags |= SAS_TASK_STATE_DONE;
+ 	if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
+ 		spin_unlock_irqrestore(&t->task_state_lock, flags);
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
+-			"task 0x%p done with event 0x%x resp 0x%x "
+-			"stat 0x%x but aborted by upper layer!\n",
+-			t, event, ts->resp, ts->stat));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "task 0x%p done with event 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
++			   t, event, ts->resp, ts->stat);
+ 		pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
+ 	} else {
+ 		spin_unlock_irqrestore(&t->task_state_lock, flags);
+@@ -2392,8 +2351,7 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	tag = le32_to_cpu(psataPayload->tag);
+ 
+ 	if (!tag) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("tag null\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "tag null\n");
+ 		return;
+ 	}
+ 	ccb = &pm8001_ha->ccb_info[tag];
+@@ -2402,8 +2360,7 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		t = ccb->task;
+ 		pm8001_dev = ccb->device;
+ 	} else {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("ccb null\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "ccb null\n");
+ 		return;
+ 	}
+ 
+@@ -2411,29 +2368,26 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		if (t->dev && (t->dev->lldd_dev))
+ 			pm8001_dev = t->dev->lldd_dev;
+ 	} else {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("task null\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "task null\n");
+ 		return;
+ 	}
+ 
+ 	if ((pm8001_dev && !(pm8001_dev->id & NCQ_READ_LOG_FLAG))
+ 		&& unlikely(!t || !t->lldd_task || !t->dev)) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("task or dev null\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "task or dev null\n");
+ 		return;
+ 	}
+ 
+ 	ts = &t->task_status;
+ 	if (!ts) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("ts null\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "ts null\n");
+ 		return;
+ 	}
+ 
+ 	if (unlikely(status))
+-		PM8001_IOERR_DBG(pm8001_ha, pm8001_printk(
+-			"status:0x%x, tag:0x%x, task::0x%p\n",
+-			status, tag, t));
++		pm8001_dbg(pm8001_ha, IOERR,
++			   "status:0x%x, tag:0x%x, task::0x%p\n",
++			   status, tag, t);
+ 
+ 	/* Print sas address of IO failed device */
+ 	if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) &&
+@@ -2465,20 +2419,20 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 						& 0xff000000)) +
+ 						pm8001_dev->attached_phy +
+ 						0x10);
+-			PM8001_FAIL_DBG(pm8001_ha,
+-				pm8001_printk("SAS Address of IO Failure Drive:"
+-				"%08x%08x", temp_sata_addr_hi,
+-					temp_sata_addr_low));
++			pm8001_dbg(pm8001_ha, FAIL,
++				   "SAS Address of IO Failure Drive:%08x%08x\n",
++				   temp_sata_addr_hi,
++				   temp_sata_addr_low);
+ 
+ 		} else {
+-			PM8001_FAIL_DBG(pm8001_ha,
+-				pm8001_printk("SAS Address of IO Failure Drive:"
+-				"%016llx", SAS_ADDR(t->dev->sas_addr)));
++			pm8001_dbg(pm8001_ha, FAIL,
++				   "SAS Address of IO Failure Drive:%016llx\n",
++				   SAS_ADDR(t->dev->sas_addr));
+ 		}
+ 	}
+ 	switch (status) {
+ 	case IO_SUCCESS:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_SUCCESS\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n");
+ 		if (param == 0) {
+ 			ts->resp = SAS_TASK_COMPLETE;
+ 			ts->stat = SAM_STAT_GOOD;
+@@ -2500,94 +2454,100 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 			ts->resp = SAS_TASK_COMPLETE;
+ 			ts->stat = SAS_PROTO_RESPONSE;
+ 			ts->residual = param;
+-			PM8001_IO_DBG(pm8001_ha,
+-				pm8001_printk("SAS_PROTO_RESPONSE len = %d\n",
+-				param));
++			pm8001_dbg(pm8001_ha, IO,
++				   "SAS_PROTO_RESPONSE len = %d\n",
++				   param);
+ 			sata_resp = &psataPayload->sata_resp[0];
+ 			resp = (struct ata_task_resp *)ts->buf;
+ 			if (t->ata_task.dma_xfer == 0 &&
+ 			    t->data_dir == DMA_FROM_DEVICE) {
+ 				len = sizeof(struct pio_setup_fis);
+-				PM8001_IO_DBG(pm8001_ha,
+-				pm8001_printk("PIO read len = %d\n", len));
++				pm8001_dbg(pm8001_ha, IO,
++					   "PIO read len = %d\n", len);
+ 			} else if (t->ata_task.use_ncq) {
+ 				len = sizeof(struct set_dev_bits_fis);
+-				PM8001_IO_DBG(pm8001_ha,
+-					pm8001_printk("FPDMA len = %d\n", len));
++				pm8001_dbg(pm8001_ha, IO, "FPDMA len = %d\n",
++					   len);
+ 			} else {
+ 				len = sizeof(struct dev_to_host_fis);
+-				PM8001_IO_DBG(pm8001_ha,
+-				pm8001_printk("other len = %d\n", len));
++				pm8001_dbg(pm8001_ha, IO, "other len = %d\n",
++					   len);
+ 			}
+ 			if (SAS_STATUS_BUF_SIZE >= sizeof(*resp)) {
+ 				resp->frame_len = len;
+ 				memcpy(&resp->ending_fis[0], sata_resp, len);
+ 				ts->buf_valid_size = sizeof(*resp);
+ 			} else
+-				PM8001_IO_DBG(pm8001_ha,
+-					pm8001_printk("response too large\n"));
++				pm8001_dbg(pm8001_ha, IO,
++					   "response too large\n");
+ 		}
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_ABORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_ABORTED IOMB Tag\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_ABORTED_TASK;
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 		/* following cases are to do cases */
+ 	case IO_UNDERFLOW:
+ 		/* SATA Completion with error */
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_UNDERFLOW param = %d\n", param));
++		pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW param = %d\n", param);
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_UNDERRUN;
+ 		ts->residual = param;
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_NO_DEVICE:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_NO_DEVICE\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n");
+ 		ts->resp = SAS_TASK_UNDELIVERED;
+ 		ts->stat = SAS_PHY_DOWN;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_INTERRUPTED;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_PHY_NOT_READY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-			"IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_EPROTO;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_UNKNOWN;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_CONT0;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS:
+ 	case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED:
+@@ -2595,8 +2555,7 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST:
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE:
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
+ 		if (!t->uldd_task) {
+@@ -2610,8 +2569,8 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		}
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
+ 		ts->resp = SAS_TASK_UNDELIVERED;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_BAD_DEST;
+@@ -2626,15 +2585,17 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		}
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-			"IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_CONN_RATE;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-			"IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
+ 		if (!t->uldd_task) {
+@@ -2648,57 +2609,65 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		}
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_NAK_RECEIVED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_NAK_R_ERR;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_ACK_NAK_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_NAK_R_ERR;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_DMA:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_DMA\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_ABORTED_TASK;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_SATA_LINK_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_SATA_LINK_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_SATA_LINK_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_UNDELIVERED;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_REJECTED_NCQ_MODE:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_REJECTED_NCQ_MODE\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_UNDERRUN;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_OPEN_RETRY_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_PORT_IN_RESET:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_PORT_IN_RESET\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_DS_NON_OPERATIONAL:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_DS_NON_OPERATIONAL\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
+ 		if (!t->uldd_task) {
+@@ -2711,14 +2680,14 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		}
+ 		break;
+ 	case IO_DS_IN_RECOVERY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_DS_IN_RECOVERY\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_DS_IN_ERROR:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_DS_IN_ERROR\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_ERROR\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
+ 		if (!t->uldd_task) {
+@@ -2731,18 +2700,21 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		}
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	default:
+-		PM8001_DEVIO_DBG(pm8001_ha,
+-			pm8001_printk("Unknown status 0x%x\n", status));
++		pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status);
+ 		/* not allowed case. Therefore, return failed status */
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
++		if (pm8001_dev)
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	}
+ 	spin_lock_irqsave(&t->task_state_lock, flags);
+@@ -2751,10 +2723,9 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	t->task_state_flags |= SAS_TASK_STATE_DONE;
+ 	if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
+ 		spin_unlock_irqrestore(&t->task_state_lock, flags);
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("task 0x%p done with io_status 0x%x"
+-			" resp 0x%x stat 0x%x but aborted by upper layer!\n",
+-			t, status, ts->resp, ts->stat));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
++			   t, status, ts->resp, ts->stat);
+ 		if (t->slow_task)
+ 			complete(&t->slow_task->completion);
+ 		pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
+@@ -2785,13 +2756,11 @@ static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 		t = ccb->task;
+ 		pm8001_dev = ccb->device;
+ 	} else {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("No CCB !!!. returning\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "No CCB !!!. returning\n");
+ 		return;
+ 	}
+ 	if (event)
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("SATA EVENT 0x%x\n", event));
++		pm8001_dbg(pm8001_ha, FAIL, "SATA EVENT 0x%x\n", event);
+ 
+ 	/* Check if this is NCQ error */
+ 	if (event == IO_XFER_ERROR_ABORTED_NCQ_MODE) {
+@@ -2804,54 +2773,49 @@ static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 	}
+ 
+ 	if (unlikely(!t || !t->lldd_task || !t->dev)) {
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("task or dev null\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "task or dev null\n");
+ 		return;
+ 	}
+ 
+ 	ts = &t->task_status;
+-	PM8001_IOERR_DBG(pm8001_ha,
+-		pm8001_printk("port_id:0x%x, tag:0x%x, event:0x%x\n",
+-				port_id, tag, event));
++	pm8001_dbg(pm8001_ha, IOERR, "port_id:0x%x, tag:0x%x, event:0x%x\n",
++		   port_id, tag, event);
+ 	switch (event) {
+ 	case IO_OVERFLOW:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		ts->residual = 0;
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_XFER_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_INTERRUPTED;
+ 		break;
+ 	case IO_XFER_ERROR_PHY_NOT_READY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-			"IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_EPROTO;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_UNKNOWN;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_CONT0;
+@@ -2862,8 +2826,8 @@ static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST:
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE:
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED:
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
+ 		ts->resp = SAS_TASK_UNDELIVERED;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
+ 		if (!t->uldd_task) {
+@@ -2877,107 +2841,96 @@ static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 		}
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
+ 		ts->resp = SAS_TASK_UNDELIVERED;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_BAD_DEST;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-			"IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_CONN_RATE;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
+ 		break;
+ 	case IO_XFER_ERROR_NAK_RECEIVED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_NAK_R_ERR;
+ 		break;
+ 	case IO_XFER_ERROR_PEER_ABORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_PEER_ABORTED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PEER_ABORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_NAK_R_ERR;
+ 		break;
+ 	case IO_XFER_ERROR_REJECTED_NCQ_MODE:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_REJECTED_NCQ_MODE\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_UNDERRUN;
+ 		break;
+ 	case IO_XFER_OPEN_RETRY_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
+ 		break;
+ 	case IO_XFER_ERROR_UNEXPECTED_PHASE:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_UNEXPECTED_PHASE\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
+ 		break;
+ 	case IO_XFER_ERROR_XFER_RDY_OVERRUN:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_XFER_RDY_OVERRUN\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
+ 		break;
+ 	case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
+ 		break;
+ 	case IO_XFER_ERROR_OFFSET_MISMATCH:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
+ 		break;
+ 	case IO_XFER_ERROR_XFER_ZERO_DATA_LEN:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
+ 		break;
+ 	case IO_XFER_CMD_FRAME_ISSUED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_CMD_FRAME_ISSUED\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n");
+ 		break;
+ 	case IO_XFER_PIO_SETUP_ERROR:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_PIO_SETUP_ERROR\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_PIO_SETUP_ERROR\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
+ 		break;
+ 	case IO_XFER_ERROR_INTERNAL_CRC_ERROR:
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFR_ERROR_INTERNAL_CRC_ERROR\n"));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "IO_XFR_ERROR_INTERNAL_CRC_ERROR\n");
+ 		/* TBC: used default set values */
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
+ 		break;
+ 	case IO_XFER_DMA_ACTIVATE_TIMEOUT:
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFR_DMA_ACTIVATE_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "IO_XFR_DMA_ACTIVATE_TIMEOUT\n");
+ 		/* TBC: used default set values */
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
+ 		break;
+ 	default:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("Unknown status 0x%x\n", event));
++		pm8001_dbg(pm8001_ha, IO, "Unknown status 0x%x\n", event);
+ 		/* not allowed case. Therefore, return failed status */
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_TO;
+@@ -2989,10 +2942,9 @@ static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
+ 	t->task_state_flags |= SAS_TASK_STATE_DONE;
+ 	if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
+ 		spin_unlock_irqrestore(&t->task_state_lock, flags);
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("task 0x%p done with io_status 0x%x"
+-			" resp 0x%x stat 0x%x but aborted by upper layer!\n",
+-			t, event, ts->resp, ts->stat));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
++			   t, event, ts->resp, ts->stat);
+ 		pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
+ 	} else {
+ 		spin_unlock_irqrestore(&t->task_state_lock, flags);
+@@ -3025,94 +2977,87 @@ mpi_smp_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	ts = &t->task_status;
+ 	pm8001_dev = ccb->device;
+ 	if (status)
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("smp IO status 0x%x\n", status));
++		pm8001_dbg(pm8001_ha, FAIL, "smp IO status 0x%x\n", status);
+ 	if (unlikely(!t || !t->lldd_task || !t->dev))
+ 		return;
+ 
+-	PM8001_DEV_DBG(pm8001_ha,
+-		pm8001_printk("tag::0x%x status::0x%x\n", tag, status));
++	pm8001_dbg(pm8001_ha, DEV, "tag::0x%x status::0x%x\n", tag, status);
+ 
+ 	switch (status) {
+ 
+ 	case IO_SUCCESS:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_SUCCESS\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAM_STAT_GOOD;
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		if (pm8001_ha->smp_exp_mode == SMP_DIRECT) {
+-			PM8001_IO_DBG(pm8001_ha,
+-				pm8001_printk("DIRECT RESPONSE Length:%d\n",
+-						param));
++			pm8001_dbg(pm8001_ha, IO,
++				   "DIRECT RESPONSE Length:%d\n",
++				   param);
+ 			pdma_respaddr = (char *)(phys_to_virt(cpu_to_le64
+ 						((u64)sg_dma_address
+ 						(&t->smp_task.smp_resp))));
+ 			for (i = 0; i < param; i++) {
+ 				*(pdma_respaddr+i) = psmpPayload->_r_a[i];
+-				PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-					"SMP Byte%d DMA data 0x%x psmp 0x%x\n",
+-					i, *(pdma_respaddr+i),
+-					psmpPayload->_r_a[i]));
++				pm8001_dbg(pm8001_ha, IO,
++					   "SMP Byte%d DMA data 0x%x psmp 0x%x\n",
++					   i, *(pdma_respaddr + i),
++					   psmpPayload->_r_a[i]);
+ 			}
+ 		}
+ 		break;
+ 	case IO_ABORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_ABORTED IOMB\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_ABORTED_TASK;
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_OVERFLOW:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DATA_OVERRUN;
+ 		ts->residual = 0;
+ 		if (pm8001_dev)
+-			pm8001_dev->running_req--;
++			atomic_dec(&pm8001_dev->running_req);
+ 		break;
+ 	case IO_NO_DEVICE:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_NO_DEVICE\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_PHY_DOWN;
+ 		break;
+ 	case IO_ERROR_HW_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_ERROR_HW_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_ERROR_HW_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAM_STAT_BUSY;
+ 		break;
+ 	case IO_XFER_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAM_STAT_BUSY;
+ 		break;
+ 	case IO_XFER_ERROR_PHY_NOT_READY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAM_STAT_BUSY;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_UNKNOWN;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_UNKNOWN;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BREAK:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_CONT0;
+@@ -3123,8 +3068,7 @@ mpi_smp_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST:
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE:
+ 	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_UNKNOWN;
+@@ -3133,75 +3077,68 @@ mpi_smp_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 				IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS);
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_BAD_DEST;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk(\
+-			"IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_CONN_RATE;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
+ 		break;
+ 	case IO_XFER_ERROR_RX_FRAME:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_ERROR_RX_FRAME\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_RX_FRAME\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
+ 		break;
+ 	case IO_XFER_OPEN_RETRY_TIMEOUT:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	case IO_ERROR_INTERNAL_SMP_RESOURCE:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_ERROR_INTERNAL_SMP_RESOURCE\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_ERROR_INTERNAL_SMP_RESOURCE\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_QUEUE_FULL;
+ 		break;
+ 	case IO_PORT_IN_RESET:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_PORT_IN_RESET\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	case IO_DS_NON_OPERATIONAL:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_DS_NON_OPERATIONAL\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
+ 		break;
+ 	case IO_DS_IN_RECOVERY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_DS_IN_RECOVERY\n"));
++		pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY:
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"));
++		pm8001_dbg(pm8001_ha, IO,
++			   "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n");
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_OPEN_REJECT;
+ 		ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
+ 		break;
+ 	default:
+-		PM8001_DEVIO_DBG(pm8001_ha,
+-			pm8001_printk("Unknown status 0x%x\n", status));
++		pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status);
+ 		ts->resp = SAS_TASK_COMPLETE;
+ 		ts->stat = SAS_DEV_NO_RESPONSE;
+ 		/* not allowed case. Therefore, return failed status */
+@@ -3213,10 +3150,9 @@ mpi_smp_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	t->task_state_flags |= SAS_TASK_STATE_DONE;
+ 	if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
+ 		spin_unlock_irqrestore(&t->task_state_lock, flags);
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
+-			"task 0x%p done with io_status 0x%x resp 0x%x"
+-			"stat 0x%x but aborted by upper layer!\n",
+-			t, status, ts->resp, ts->stat));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "task 0x%p done with io_status 0x%x resp 0x%xstat 0x%x but aborted by upper layer!\n",
++			   t, status, ts->resp, ts->stat);
+ 		pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
+ 	} else {
+ 		spin_unlock_irqrestore(&t->task_state_lock, flags);
+@@ -3306,45 +3242,40 @@ hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F);
+ 
+ 	struct pm8001_port *port = &pm8001_ha->port[port_id];
+-	struct sas_ha_struct *sas_ha = pm8001_ha->sas;
+ 	struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
+ 	unsigned long flags;
+ 	u8 deviceType = pPayload->sas_identify.dev_type;
+ 	port->port_state = portstate;
+ 	port->wide_port_phymap |= (1U << phy_id);
+ 	phy->phy_state = PHY_STATE_LINK_UP_SPCV;
+-	PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-		"portid:%d; phyid:%d; linkrate:%d; "
+-		"portstate:%x; devicetype:%x\n",
+-		port_id, phy_id, link_rate, portstate, deviceType));
++	pm8001_dbg(pm8001_ha, MSG,
++		   "portid:%d; phyid:%d; linkrate:%d; portstate:%x; devicetype:%x\n",
++		   port_id, phy_id, link_rate, portstate, deviceType);
+ 
+ 	switch (deviceType) {
+ 	case SAS_PHY_UNUSED:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("device type no device.\n"));
++		pm8001_dbg(pm8001_ha, MSG, "device type no device.\n");
+ 		break;
+ 	case SAS_END_DEVICE:
+-		PM8001_MSG_DBG(pm8001_ha, pm8001_printk("end device.\n"));
++		pm8001_dbg(pm8001_ha, MSG, "end device.\n");
+ 		pm80xx_chip_phy_ctl_req(pm8001_ha, phy_id,
+ 			PHY_NOTIFY_ENABLE_SPINUP);
+ 		port->port_attached = 1;
+ 		pm8001_get_lrate_mode(phy, link_rate);
+ 		break;
+ 	case SAS_EDGE_EXPANDER_DEVICE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("expander device.\n"));
++		pm8001_dbg(pm8001_ha, MSG, "expander device.\n");
+ 		port->port_attached = 1;
+ 		pm8001_get_lrate_mode(phy, link_rate);
+ 		break;
+ 	case SAS_FANOUT_EXPANDER_DEVICE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("fanout expander device.\n"));
++		pm8001_dbg(pm8001_ha, MSG, "fanout expander device.\n");
+ 		port->port_attached = 1;
+ 		pm8001_get_lrate_mode(phy, link_rate);
+ 		break;
+ 	default:
+-		PM8001_DEVIO_DBG(pm8001_ha,
+-			pm8001_printk("unknown device type(%x)\n", deviceType));
++		pm8001_dbg(pm8001_ha, DEVIO, "unknown device type(%x)\n",
++			   deviceType);
+ 		break;
+ 	}
+ 	phy->phy_type |= PORT_TYPE_SAS;
+@@ -3355,7 +3286,7 @@ hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	else if (phy->identify.device_type != SAS_PHY_UNUSED)
+ 		phy->identify.target_port_protocols = SAS_PROTOCOL_SMP;
+ 	phy->sas_phy.oob_mode = SAS_OOB_MODE;
+-	sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE);
++	sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE);
+ 	spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags);
+ 	memcpy(phy->frame_rcvd, &pPayload->sas_identify,
+ 		sizeof(struct sas_identify_frame)-4);
+@@ -3389,12 +3320,11 @@ hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F);
+ 
+ 	struct pm8001_port *port = &pm8001_ha->port[port_id];
+-	struct sas_ha_struct *sas_ha = pm8001_ha->sas;
+ 	struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
+ 	unsigned long flags;
+-	PM8001_DEVIO_DBG(pm8001_ha, pm8001_printk(
+-		"port id %d, phy id %d link_rate %d portstate 0x%x\n",
+-				port_id, phy_id, link_rate, portstate));
++	pm8001_dbg(pm8001_ha, DEVIO,
++		   "port id %d, phy id %d link_rate %d portstate 0x%x\n",
++		   port_id, phy_id, link_rate, portstate);
+ 
+ 	port->port_state = portstate;
+ 	phy->phy_state = PHY_STATE_LINK_UP_SPCV;
+@@ -3403,7 +3333,7 @@ hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	phy->phy_type |= PORT_TYPE_SATA;
+ 	phy->phy_attached = 1;
+ 	phy->sas_phy.oob_mode = SATA_OOB_MODE;
+-	sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE);
++	sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE);
+ 	spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags);
+ 	memcpy(phy->frame_rcvd, ((u8 *)&pPayload->sata_fis - 4),
+ 		sizeof(struct dev_to_host_fis));
+@@ -3444,10 +3374,10 @@ hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	case PORT_VALID:
+ 		break;
+ 	case PORT_INVALID:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" PortInvalid portID %d\n", port_id));
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" Last phy Down and port invalid\n"));
++		pm8001_dbg(pm8001_ha, MSG, " PortInvalid portID %d\n",
++			   port_id);
++		pm8001_dbg(pm8001_ha, MSG,
++			   " Last phy Down and port invalid\n");
+ 		if (port_sata) {
+ 			phy->phy_type = 0;
+ 			port->port_attached = 0;
+@@ -3457,19 +3387,18 @@ hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		sas_phy_disconnected(&phy->sas_phy);
+ 		break;
+ 	case PORT_IN_RESET:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" Port In Reset portID %d\n", port_id));
++		pm8001_dbg(pm8001_ha, MSG, " Port In Reset portID %d\n",
++			   port_id);
+ 		break;
+ 	case PORT_NOT_ESTABLISHED:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" Phy Down and PORT_NOT_ESTABLISHED\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   " Phy Down and PORT_NOT_ESTABLISHED\n");
+ 		port->port_attached = 0;
+ 		break;
+ 	case PORT_LOSTCOMM:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" Phy Down and PORT_LOSTCOMM\n"));
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" Last phy Down and port invalid\n"));
++		pm8001_dbg(pm8001_ha, MSG, " Phy Down and PORT_LOSTCOMM\n");
++		pm8001_dbg(pm8001_ha, MSG,
++			   " Last phy Down and port invalid\n");
+ 		if (port_sata) {
+ 			port->port_attached = 0;
+ 			phy->phy_type = 0;
+@@ -3480,17 +3409,14 @@ hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		break;
+ 	default:
+ 		port->port_attached = 0;
+-		PM8001_DEVIO_DBG(pm8001_ha,
+-			pm8001_printk(" Phy Down and(default) = 0x%x\n",
+-			portstate));
++		pm8001_dbg(pm8001_ha, DEVIO,
++			   " Phy Down and(default) = 0x%x\n",
++			   portstate);
+ 		break;
+ 
+ 	}
+-	if (port_sata && (portstate != PORT_IN_RESET)) {
+-		struct sas_ha_struct *sas_ha = pm8001_ha->sas;
+-
+-		sas_ha->notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL);
+-	}
++	if (port_sata && (portstate != PORT_IN_RESET))
++		sas_notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL);
+ }
+ 
+ static int mpi_phy_start_resp(struct pm8001_hba_info *pm8001_ha, void *piomb)
+@@ -3503,9 +3429,9 @@ static int mpi_phy_start_resp(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		le32_to_cpu(pPayload->phyid);
+ 	struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
+ 
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("phy start resp status:0x%x, phyid:0x%x\n",
+-				status, phy_id));
++	pm8001_dbg(pm8001_ha, INIT,
++		   "phy start resp status:0x%x, phyid:0x%x\n",
++		   status, phy_id);
+ 	if (status == 0) {
+ 		phy->phy_state = PHY_LINK_DOWN;
+ 		if (pm8001_ha->flags == PM8001F_RUN_TIME &&
+@@ -3532,18 +3458,18 @@ static int mpi_thermal_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	u32 rht_lht = le32_to_cpu(pPayload->rht_lht);
+ 
+ 	if (thermal_event & 0x40) {
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-			"Thermal Event: Local high temperature violated!\n"));
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-			"Thermal Event: Measured local high temperature %d\n",
+-				((rht_lht & 0xFF00) >> 8)));
++		pm8001_dbg(pm8001_ha, IO,
++			   "Thermal Event: Local high temperature violated!\n");
++		pm8001_dbg(pm8001_ha, IO,
++			   "Thermal Event: Measured local high temperature %d\n",
++			   ((rht_lht & 0xFF00) >> 8));
+ 	}
+ 	if (thermal_event & 0x10) {
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-			"Thermal Event: Remote high temperature violated!\n"));
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-			"Thermal Event: Measured remote high temperature %d\n",
+-				((rht_lht & 0xFF000000) >> 24)));
++		pm8001_dbg(pm8001_ha, IO,
++			   "Thermal Event: Remote high temperature violated!\n");
++		pm8001_dbg(pm8001_ha, IO,
++			   "Thermal Event: Measured remote high temperature %d\n",
++			   ((rht_lht & 0xFF000000) >> 24));
+ 	}
+ 	return 0;
+ }
+@@ -3572,149 +3498,134 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
+ 	struct pm8001_port *port = &pm8001_ha->port[port_id];
+ 	struct asd_sas_phy *sas_phy = sas_ha->sas_phy[phy_id];
+-	PM8001_DEV_DBG(pm8001_ha,
+-		pm8001_printk("portid:%d phyid:%d event:0x%x status:0x%x\n",
+-				port_id, phy_id, eventType, status));
++	pm8001_dbg(pm8001_ha, DEV,
++		   "portid:%d phyid:%d event:0x%x status:0x%x\n",
++		   port_id, phy_id, eventType, status);
+ 
+ 	switch (eventType) {
+ 
+ 	case HW_EVENT_SAS_PHY_UP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_PHY_START_STATUS\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_START_STATUS\n");
+ 		hw_event_sas_phy_up(pm8001_ha, piomb);
+ 		break;
+ 	case HW_EVENT_SATA_PHY_UP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_SATA_PHY_UP\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_PHY_UP\n");
+ 		hw_event_sata_phy_up(pm8001_ha, piomb);
+ 		break;
+ 	case HW_EVENT_SATA_SPINUP_HOLD:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_SATA_SPINUP_HOLD\n"));
+-		sas_ha->notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD);
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_SPINUP_HOLD\n");
++		sas_notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD);
+ 		break;
+ 	case HW_EVENT_PHY_DOWN:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_PHY_DOWN\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_DOWN\n");
+ 		hw_event_phy_down(pm8001_ha, piomb);
+ 		if (pm8001_ha->reset_in_progress) {
+-			PM8001_MSG_DBG(pm8001_ha,
+-				pm8001_printk("Reset in progress\n"));
++			pm8001_dbg(pm8001_ha, MSG, "Reset in progress\n");
+ 			return 0;
+ 		}
+ 		phy->phy_attached = 0;
+ 		phy->phy_state = PHY_LINK_DISABLE;
+ 		break;
+ 	case HW_EVENT_PORT_INVALID:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_PORT_INVALID\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_INVALID\n");
+ 		sas_phy_disconnected(sas_phy);
+ 		phy->phy_attached = 0;
+-		sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
++		sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
+ 		break;
+ 	/* the broadcast change primitive received, tell the LIBSAS this event
+ 	to revalidate the sas domain*/
+ 	case HW_EVENT_BROADCAST_CHANGE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_BROADCAST_CHANGE\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_CHANGE\n");
+ 		pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_BROADCAST_CHANGE,
+ 			port_id, phy_id, 1, 0);
+ 		spin_lock_irqsave(&sas_phy->sas_prim_lock, flags);
+ 		sas_phy->sas_prim = HW_EVENT_BROADCAST_CHANGE;
+ 		spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags);
+-		sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
++		sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
+ 		break;
+ 	case HW_EVENT_PHY_ERROR:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_PHY_ERROR\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_ERROR\n");
+ 		sas_phy_disconnected(&phy->sas_phy);
+ 		phy->phy_attached = 0;
+-		sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR);
++		sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR);
+ 		break;
+ 	case HW_EVENT_BROADCAST_EXP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_BROADCAST_EXP\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_EXP\n");
+ 		spin_lock_irqsave(&sas_phy->sas_prim_lock, flags);
+ 		sas_phy->sas_prim = HW_EVENT_BROADCAST_EXP;
+ 		spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags);
+-		sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
++		sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
+ 		break;
+ 	case HW_EVENT_LINK_ERR_INVALID_DWORD:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_LINK_ERR_INVALID_DWORD\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "HW_EVENT_LINK_ERR_INVALID_DWORD\n");
+ 		pm80xx_hw_event_ack_req(pm8001_ha, 0,
+ 			HW_EVENT_LINK_ERR_INVALID_DWORD, port_id, phy_id, 0, 0);
+ 		break;
+ 	case HW_EVENT_LINK_ERR_DISPARITY_ERROR:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_LINK_ERR_DISPARITY_ERROR\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "HW_EVENT_LINK_ERR_DISPARITY_ERROR\n");
+ 		pm80xx_hw_event_ack_req(pm8001_ha, 0,
+ 			HW_EVENT_LINK_ERR_DISPARITY_ERROR,
+ 			port_id, phy_id, 0, 0);
+ 		break;
+ 	case HW_EVENT_LINK_ERR_CODE_VIOLATION:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_LINK_ERR_CODE_VIOLATION\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "HW_EVENT_LINK_ERR_CODE_VIOLATION\n");
+ 		pm80xx_hw_event_ack_req(pm8001_ha, 0,
+ 			HW_EVENT_LINK_ERR_CODE_VIOLATION,
+ 			port_id, phy_id, 0, 0);
+ 		break;
+ 	case HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH:
+-		PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-				"HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH\n");
+ 		pm80xx_hw_event_ack_req(pm8001_ha, 0,
+ 			HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH,
+ 			port_id, phy_id, 0, 0);
+ 		break;
+ 	case HW_EVENT_MALFUNCTION:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_MALFUNCTION\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_MALFUNCTION\n");
+ 		break;
+ 	case HW_EVENT_BROADCAST_SES:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_BROADCAST_SES\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_SES\n");
+ 		spin_lock_irqsave(&sas_phy->sas_prim_lock, flags);
+ 		sas_phy->sas_prim = HW_EVENT_BROADCAST_SES;
+ 		spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags);
+-		sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
++		sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
+ 		break;
+ 	case HW_EVENT_INBOUND_CRC_ERROR:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_INBOUND_CRC_ERROR\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_INBOUND_CRC_ERROR\n");
+ 		pm80xx_hw_event_ack_req(pm8001_ha, 0,
+ 			HW_EVENT_INBOUND_CRC_ERROR,
+ 			port_id, phy_id, 0, 0);
+ 		break;
+ 	case HW_EVENT_HARD_RESET_RECEIVED:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_HARD_RESET_RECEIVED\n"));
+-		sas_ha->notify_port_event(sas_phy, PORTE_HARD_RESET);
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_HARD_RESET_RECEIVED\n");
++		sas_notify_port_event(sas_phy, PORTE_HARD_RESET);
+ 		break;
+ 	case HW_EVENT_ID_FRAME_TIMEOUT:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_ID_FRAME_TIMEOUT\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_ID_FRAME_TIMEOUT\n");
+ 		sas_phy_disconnected(sas_phy);
+ 		phy->phy_attached = 0;
+-		sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
++		sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
+ 		break;
+ 	case HW_EVENT_LINK_ERR_PHY_RESET_FAILED:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_LINK_ERR_PHY_RESET_FAILED\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "HW_EVENT_LINK_ERR_PHY_RESET_FAILED\n");
+ 		pm80xx_hw_event_ack_req(pm8001_ha, 0,
+ 			HW_EVENT_LINK_ERR_PHY_RESET_FAILED,
+ 			port_id, phy_id, 0, 0);
+ 		sas_phy_disconnected(sas_phy);
+ 		phy->phy_attached = 0;
+-		sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
++		sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
+ 		break;
+ 	case HW_EVENT_PORT_RESET_TIMER_TMO:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_PORT_RESET_TIMER_TMO\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_TIMER_TMO\n");
+ 		pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN,
+ 			port_id, phy_id, 0, 0);
+ 		sas_phy_disconnected(sas_phy);
+ 		phy->phy_attached = 0;
+-		sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
++		sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
+ 		if (pm8001_ha->phy[phy_id].reset_completion) {
+ 			pm8001_ha->phy[phy_id].port_reset_status =
+ 					PORT_RESET_TMO;
+@@ -3723,28 +3634,26 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		}
+ 		break;
+ 	case HW_EVENT_PORT_RECOVERY_TIMER_TMO:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_PORT_RECOVERY_TIMER_TMO\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "HW_EVENT_PORT_RECOVERY_TIMER_TMO\n");
+ 		pm80xx_hw_event_ack_req(pm8001_ha, 0,
+ 			HW_EVENT_PORT_RECOVERY_TIMER_TMO,
+ 			port_id, phy_id, 0, 0);
+ 		for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
+ 			if (port->wide_port_phymap & (1 << i)) {
+ 				phy = &pm8001_ha->phy[i];
+-				sas_ha->notify_phy_event(&phy->sas_phy,
++				sas_notify_phy_event(&phy->sas_phy,
+ 						PHYE_LOSS_OF_SIGNAL);
+ 				port->wide_port_phymap &= ~(1 << i);
+ 			}
+ 		}
+ 		break;
+ 	case HW_EVENT_PORT_RECOVER:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_PORT_RECOVER\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RECOVER\n");
+ 		hw_event_port_recover(pm8001_ha, piomb);
+ 		break;
+ 	case HW_EVENT_PORT_RESET_COMPLETE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("HW_EVENT_PORT_RESET_COMPLETE\n"));
++		pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_COMPLETE\n");
+ 		if (pm8001_ha->phy[phy_id].reset_completion) {
+ 			pm8001_ha->phy[phy_id].port_reset_status =
+ 					PORT_RESET_SUCCESS;
+@@ -3753,12 +3662,11 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 		}
+ 		break;
+ 	case EVENT_BROADCAST_ASYNCH_EVENT:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("EVENT_BROADCAST_ASYNCH_EVENT\n"));
++		pm8001_dbg(pm8001_ha, MSG, "EVENT_BROADCAST_ASYNCH_EVENT\n");
+ 		break;
+ 	default:
+-		PM8001_DEVIO_DBG(pm8001_ha,
+-			pm8001_printk("Unknown event type 0x%x\n", eventType));
++		pm8001_dbg(pm8001_ha, DEVIO, "Unknown event type 0x%x\n",
++			   eventType);
+ 		break;
+ 	}
+ 	return 0;
+@@ -3778,9 +3686,8 @@ static int mpi_phy_stop_resp(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 	u32 phyid =
+ 		le32_to_cpu(pPayload->phyid) & 0xFF;
+ 	struct pm8001_phy *phy = &pm8001_ha->phy[phyid];
+-	PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("phy:0x%x status:0x%x\n",
+-					phyid, status));
++	pm8001_dbg(pm8001_ha, MSG, "phy:0x%x status:0x%x\n",
++		   phyid, status);
+ 	if (status == PHY_STOP_SUCCESS ||
+ 		status == PHY_STOP_ERR_DEVICE_ATTACHED)
+ 		phy->phy_state = PHY_LINK_DISABLE;
+@@ -3800,9 +3707,9 @@ static int mpi_set_controller_config_resp(struct pm8001_hba_info *pm8001_ha,
+ 	u32 status = le32_to_cpu(pPayload->status);
+ 	u32 err_qlfr_pgcd = le32_to_cpu(pPayload->err_qlfr_pgcd);
+ 
+-	PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-			"SET CONTROLLER RESP: status 0x%x qlfr_pgcd 0x%x\n",
+-			status, err_qlfr_pgcd));
++	pm8001_dbg(pm8001_ha, MSG,
++		   "SET CONTROLLER RESP: status 0x%x qlfr_pgcd 0x%x\n",
++		   status, err_qlfr_pgcd);
+ 
+ 	return 0;
+ }
+@@ -3815,8 +3722,7 @@ static int mpi_set_controller_config_resp(struct pm8001_hba_info *pm8001_ha,
+ static int mpi_get_controller_config_resp(struct pm8001_hba_info *pm8001_ha,
+ 			void *piomb)
+ {
+-	PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" pm80xx_addition_functionality\n"));
++	pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n");
+ 
+ 	return 0;
+ }
+@@ -3829,8 +3735,7 @@ static int mpi_get_controller_config_resp(struct pm8001_hba_info *pm8001_ha,
+ static int mpi_get_phy_profile_resp(struct pm8001_hba_info *pm8001_ha,
+ 			void *piomb)
+ {
+-	PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" pm80xx_addition_functionality\n"));
++	pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n");
+ 
+ 	return 0;
+ }
+@@ -3842,8 +3747,7 @@ static int mpi_get_phy_profile_resp(struct pm8001_hba_info *pm8001_ha,
+  */
+ static int mpi_flash_op_ext_resp(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ {
+-	PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" pm80xx_addition_functionality\n"));
++	pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n");
+ 
+ 	return 0;
+ }
+@@ -3868,15 +3772,14 @@ static int mpi_set_phy_profile_resp(struct pm8001_hba_info *pm8001_ha,
+ 	page_code = (u8)((ppc_phyid & 0xFF00) >> 8);
+ 	if (status) {
+ 		/* status is FAILED */
+-		PM8001_FAIL_DBG(pm8001_ha,
+-			pm8001_printk("PhyProfile command failed  with status "
+-			"0x%08X \n", status));
++		pm8001_dbg(pm8001_ha, FAIL,
++			   "PhyProfile command failed  with status 0x%08X\n",
++			   status);
+ 		rc = -1;
+ 	} else {
+ 		if (page_code != SAS_PHY_ANALOG_SETTINGS_PAGE) {
+-			PM8001_FAIL_DBG(pm8001_ha,
+-				pm8001_printk("Invalid page code 0x%X\n",
+-					page_code));
++			pm8001_dbg(pm8001_ha, FAIL, "Invalid page code 0x%X\n",
++				   page_code);
+ 			rc = -1;
+ 		}
+ 	}
+@@ -3898,9 +3801,9 @@ static int mpi_kek_management_resp(struct pm8001_hba_info *pm8001_ha,
+ 	u32 kidx_new_curr_ksop = le32_to_cpu(pPayload->kidx_new_curr_ksop);
+ 	u32 err_qlfr = le32_to_cpu(pPayload->err_qlfr);
+ 
+-	PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-		"KEK MGMT RESP. Status 0x%x idx_ksop 0x%x err_qlfr 0x%x\n",
+-		status, kidx_new_curr_ksop, err_qlfr));
++	pm8001_dbg(pm8001_ha, MSG,
++		   "KEK MGMT RESP. Status 0x%x idx_ksop 0x%x err_qlfr 0x%x\n",
++		   status, kidx_new_curr_ksop, err_qlfr);
+ 
+ 	return 0;
+ }
+@@ -3913,8 +3816,7 @@ static int mpi_kek_management_resp(struct pm8001_hba_info *pm8001_ha,
+ static int mpi_dek_management_resp(struct pm8001_hba_info *pm8001_ha,
+ 			void *piomb)
+ {
+-	PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" pm80xx_addition_functionality\n"));
++	pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n");
+ 
+ 	return 0;
+ }
+@@ -3927,8 +3829,7 @@ static int mpi_dek_management_resp(struct pm8001_hba_info *pm8001_ha,
+ static int ssp_coalesced_comp_resp(struct pm8001_hba_info *pm8001_ha,
+ 			void *piomb)
+ {
+-	PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk(" pm80xx_addition_functionality\n"));
++	pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n");
+ 
+ 	return 0;
+ }
+@@ -3945,248 +3846,206 @@ static void process_one_iomb(struct pm8001_hba_info *pm8001_ha, void *piomb)
+ 
+ 	switch (opc) {
+ 	case OPC_OUB_ECHO:
+-		PM8001_MSG_DBG(pm8001_ha, pm8001_printk("OPC_OUB_ECHO\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_ECHO\n");
+ 		break;
+ 	case OPC_OUB_HW_EVENT:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_HW_EVENT\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_HW_EVENT\n");
+ 		mpi_hw_event(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_THERM_HW_EVENT:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_THERMAL_EVENT\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_THERMAL_EVENT\n");
+ 		mpi_thermal_hw_event(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SSP_COMP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SSP_COMP\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_COMP\n");
+ 		mpi_ssp_completion(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SMP_COMP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SMP_COMP\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_COMP\n");
+ 		mpi_smp_completion(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_LOCAL_PHY_CNTRL:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_LOCAL_PHY_CNTRL\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_LOCAL_PHY_CNTRL\n");
+ 		pm8001_mpi_local_phy_ctl(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_DEV_REGIST:
+-		PM8001_MSG_DBG(pm8001_ha,
+-		pm8001_printk("OPC_OUB_DEV_REGIST\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_REGIST\n");
+ 		pm8001_mpi_reg_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_DEREG_DEV:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("unregister the device\n"));
++		pm8001_dbg(pm8001_ha, MSG, "unregister the device\n");
+ 		pm8001_mpi_dereg_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_GET_DEV_HANDLE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_GET_DEV_HANDLE\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEV_HANDLE\n");
+ 		break;
+ 	case OPC_OUB_SATA_COMP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SATA_COMP\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_COMP\n");
+ 		mpi_sata_completion(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SATA_EVENT:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SATA_EVENT\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_EVENT\n");
+ 		mpi_sata_event(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SSP_EVENT:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SSP_EVENT\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_EVENT\n");
+ 		mpi_ssp_event(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_DEV_HANDLE_ARRIV:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_DEV_HANDLE_ARRIV\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_HANDLE_ARRIV\n");
+ 		/*This is for target*/
+ 		break;
+ 	case OPC_OUB_SSP_RECV_EVENT:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SSP_RECV_EVENT\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_RECV_EVENT\n");
+ 		/*This is for target*/
+ 		break;
+ 	case OPC_OUB_FW_FLASH_UPDATE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_FW_FLASH_UPDATE\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_FW_FLASH_UPDATE\n");
+ 		pm8001_mpi_fw_flash_update_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_GPIO_RESPONSE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_GPIO_RESPONSE\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_RESPONSE\n");
+ 		break;
+ 	case OPC_OUB_GPIO_EVENT:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_GPIO_EVENT\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_EVENT\n");
+ 		break;
+ 	case OPC_OUB_GENERAL_EVENT:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_GENERAL_EVENT\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GENERAL_EVENT\n");
+ 		pm8001_mpi_general_event(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SSP_ABORT_RSP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SSP_ABORT_RSP\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_ABORT_RSP\n");
+ 		pm8001_mpi_task_abort_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SATA_ABORT_RSP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SATA_ABORT_RSP\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_ABORT_RSP\n");
+ 		pm8001_mpi_task_abort_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SAS_DIAG_MODE_START_END:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SAS_DIAG_MODE_START_END\n"));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "OPC_OUB_SAS_DIAG_MODE_START_END\n");
+ 		break;
+ 	case OPC_OUB_SAS_DIAG_EXECUTE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SAS_DIAG_EXECUTE\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_DIAG_EXECUTE\n");
+ 		break;
+ 	case OPC_OUB_GET_TIME_STAMP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_GET_TIME_STAMP\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_TIME_STAMP\n");
+ 		break;
+ 	case OPC_OUB_SAS_HW_EVENT_ACK:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SAS_HW_EVENT_ACK\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_HW_EVENT_ACK\n");
+ 		break;
+ 	case OPC_OUB_PORT_CONTROL:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_PORT_CONTROL\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_PORT_CONTROL\n");
+ 		break;
+ 	case OPC_OUB_SMP_ABORT_RSP:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SMP_ABORT_RSP\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_ABORT_RSP\n");
+ 		pm8001_mpi_task_abort_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_GET_NVMD_DATA:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_GET_NVMD_DATA\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_NVMD_DATA\n");
+ 		pm8001_mpi_get_nvmd_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SET_NVMD_DATA:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SET_NVMD_DATA\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_NVMD_DATA\n");
+ 		pm8001_mpi_set_nvmd_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_DEVICE_HANDLE_REMOVAL:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_DEVICE_HANDLE_REMOVAL\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEVICE_HANDLE_REMOVAL\n");
+ 		break;
+ 	case OPC_OUB_SET_DEVICE_STATE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SET_DEVICE_STATE\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEVICE_STATE\n");
+ 		pm8001_mpi_set_dev_state_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_GET_DEVICE_STATE:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_GET_DEVICE_STATE\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEVICE_STATE\n");
+ 		break;
+ 	case OPC_OUB_SET_DEV_INFO:
+-		PM8001_MSG_DBG(pm8001_ha,
+-			pm8001_printk("OPC_OUB_SET_DEV_INFO\n"));
++		pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEV_INFO\n");
+ 		break;
+ 	/* spcv specifc commands */
+ 	case OPC_OUB_PHY_START_RESP:
+-		PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-			"OPC_OUB_PHY_START_RESP opcode:%x\n", opc));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "OPC_OUB_PHY_START_RESP opcode:%x\n", opc);
+ 		mpi_phy_start_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_PHY_STOP_RESP:
+-		PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-			"OPC_OUB_PHY_STOP_RESP opcode:%x\n", opc));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "OPC_OUB_PHY_STOP_RESP opcode:%x\n", opc);
+ 		mpi_phy_stop_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SET_CONTROLLER_CONFIG:
+-		PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-			"OPC_OUB_SET_CONTROLLER_CONFIG opcode:%x\n", opc));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "OPC_OUB_SET_CONTROLLER_CONFIG opcode:%x\n", opc);
+ 		mpi_set_controller_config_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_GET_CONTROLLER_CONFIG:
+-		PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-			"OPC_OUB_GET_CONTROLLER_CONFIG opcode:%x\n", opc));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "OPC_OUB_GET_CONTROLLER_CONFIG opcode:%x\n", opc);
+ 		mpi_get_controller_config_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_GET_PHY_PROFILE:
+-		PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-			"OPC_OUB_GET_PHY_PROFILE opcode:%x\n", opc));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "OPC_OUB_GET_PHY_PROFILE opcode:%x\n", opc);
+ 		mpi_get_phy_profile_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_FLASH_OP_EXT:
+-		PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-			"OPC_OUB_FLASH_OP_EXT opcode:%x\n", opc));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "OPC_OUB_FLASH_OP_EXT opcode:%x\n", opc);
+ 		mpi_flash_op_ext_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SET_PHY_PROFILE:
+-		PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-			"OPC_OUB_SET_PHY_PROFILE opcode:%x\n", opc));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "OPC_OUB_SET_PHY_PROFILE opcode:%x\n", opc);
+ 		mpi_set_phy_profile_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_KEK_MANAGEMENT_RESP:
+-		PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-			"OPC_OUB_KEK_MANAGEMENT_RESP opcode:%x\n", opc));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "OPC_OUB_KEK_MANAGEMENT_RESP opcode:%x\n", opc);
+ 		mpi_kek_management_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_DEK_MANAGEMENT_RESP:
+-		PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-			"OPC_OUB_DEK_MANAGEMENT_RESP opcode:%x\n", opc));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "OPC_OUB_DEK_MANAGEMENT_RESP opcode:%x\n", opc);
+ 		mpi_dek_management_resp(pm8001_ha, piomb);
+ 		break;
+ 	case OPC_OUB_SSP_COALESCED_COMP_RESP:
+-		PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
+-			"OPC_OUB_SSP_COALESCED_COMP_RESP opcode:%x\n", opc));
++		pm8001_dbg(pm8001_ha, MSG,
++			   "OPC_OUB_SSP_COALESCED_COMP_RESP opcode:%x\n", opc);
+ 		ssp_coalesced_comp_resp(pm8001_ha, piomb);
+ 		break;
+ 	default:
+-		PM8001_DEVIO_DBG(pm8001_ha, pm8001_printk(
+-			"Unknown outbound Queue IOMB OPC = 0x%x\n", opc));
++		pm8001_dbg(pm8001_ha, DEVIO,
++			   "Unknown outbound Queue IOMB OPC = 0x%x\n", opc);
+ 		break;
+ 	}
+ }
+ 
+ static void print_scratchpad_registers(struct pm8001_hba_info *pm8001_ha)
+ {
+-	PM8001_FAIL_DBG(pm8001_ha,
+-		pm8001_printk("MSGU_SCRATCH_PAD_0: 0x%x\n",
+-			pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0)));
+-	PM8001_FAIL_DBG(pm8001_ha,
+-		pm8001_printk("MSGU_SCRATCH_PAD_1:0x%x\n",
+-			pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1)));
+-	PM8001_FAIL_DBG(pm8001_ha,
+-		pm8001_printk("MSGU_SCRATCH_PAD_2: 0x%x\n",
+-			pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2)));
+-	PM8001_FAIL_DBG(pm8001_ha,
+-		pm8001_printk("MSGU_SCRATCH_PAD_3: 0x%x\n",
+-			pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3)));
+-	PM8001_FAIL_DBG(pm8001_ha,
+-		pm8001_printk("MSGU_HOST_SCRATCH_PAD_0: 0x%x\n",
+-			pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_0)));
+-	PM8001_FAIL_DBG(pm8001_ha,
+-		pm8001_printk("MSGU_HOST_SCRATCH_PAD_1: 0x%x\n",
+-			pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_1)));
+-	PM8001_FAIL_DBG(pm8001_ha,
+-		pm8001_printk("MSGU_HOST_SCRATCH_PAD_2: 0x%x\n",
+-			pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_2)));
+-	PM8001_FAIL_DBG(pm8001_ha,
+-		pm8001_printk("MSGU_HOST_SCRATCH_PAD_3: 0x%x\n",
+-			pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_3)));
+-	PM8001_FAIL_DBG(pm8001_ha,
+-		pm8001_printk("MSGU_HOST_SCRATCH_PAD_4: 0x%x\n",
+-			pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_4)));
+-	PM8001_FAIL_DBG(pm8001_ha,
+-		pm8001_printk("MSGU_HOST_SCRATCH_PAD_5: 0x%x\n",
+-			pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_5)));
+-	PM8001_FAIL_DBG(pm8001_ha,
+-		pm8001_printk("MSGU_RSVD_SCRATCH_PAD_0: 0x%x\n",
+-			pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_6)));
+-	PM8001_FAIL_DBG(pm8001_ha,
+-		pm8001_printk("MSGU_RSVD_SCRATCH_PAD_1: 0x%x\n",
+-			pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_7)));
++	pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_0: 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0));
++	pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_1:0x%x\n",
++		   pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1));
++	pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_2: 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2));
++	pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_3: 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3));
++	pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_0: 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_0));
++	pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_1: 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_1));
++	pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_2: 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_2));
++	pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_3: 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_3));
++	pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_4: 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_4));
++	pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_5: 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_5));
++	pm8001_dbg(pm8001_ha, FAIL, "MSGU_RSVD_SCRATCH_PAD_0: 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_6));
++	pm8001_dbg(pm8001_ha, FAIL, "MSGU_RSVD_SCRATCH_PAD_1: 0x%x\n",
++		   pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_7));
+ }
+ 
+ static int process_oq(struct pm8001_hba_info *pm8001_ha, u8 vec)
+@@ -4203,8 +4062,9 @@ static int process_oq(struct pm8001_hba_info *pm8001_ha, u8 vec)
+ 		if ((regval & SCRATCH_PAD_MIPSALL_READY) !=
+ 					SCRATCH_PAD_MIPSALL_READY) {
+ 			pm8001_ha->controller_fatal_error = true;
+-			PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
+-				"Firmware Fatal error! Regval:0x%x\n", regval));
++			pm8001_dbg(pm8001_ha, FAIL,
++				   "Firmware Fatal error! Regval:0x%x\n",
++				   regval);
+ 			print_scratchpad_registers(pm8001_ha);
+ 			return ret;
+ 		}
+@@ -4281,7 +4141,6 @@ static int pm80xx_chip_smp_req(struct pm8001_hba_info *pm8001_ha,
+ 	char *preq_dma_addr = NULL;
+ 	__le64 tmp_addr;
+ 	u32 i, length;
+-	unsigned long flags;
+ 
+ 	memset(&smp_cmd, 0, sizeof(smp_cmd));
+ 	/*
+@@ -4311,8 +4170,7 @@ static int pm80xx_chip_smp_req(struct pm8001_hba_info *pm8001_ha,
+ 	smp_cmd.tag = cpu_to_le32(ccb->ccb_tag);
+ 
+ 	length = sg_req->length;
+-	PM8001_IO_DBG(pm8001_ha,
+-		pm8001_printk("SMP Frame Length %d\n", sg_req->length));
++	pm8001_dbg(pm8001_ha, IO, "SMP Frame Length %d\n", sg_req->length);
+ 	if (!(length - 8))
+ 		pm8001_ha->smp_exp_mode = SMP_DIRECT;
+ 	else
+@@ -4324,8 +4182,7 @@ static int pm80xx_chip_smp_req(struct pm8001_hba_info *pm8001_ha,
+ 
+ 	/* INDIRECT MODE command settings. Use DMA */
+ 	if (pm8001_ha->smp_exp_mode == SMP_INDIRECT) {
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("SMP REQUEST INDIRECT MODE\n"));
++		pm8001_dbg(pm8001_ha, IO, "SMP REQUEST INDIRECT MODE\n");
+ 		/* for SPCv indirect mode. Place the top 4 bytes of
+ 		 * SMP Request header here. */
+ 		for (i = 0; i < 4; i++)
+@@ -4357,30 +4214,27 @@ static int pm80xx_chip_smp_req(struct pm8001_hba_info *pm8001_ha,
+ 			((u32)sg_dma_len(&task->smp_task.smp_resp)-4);
+ 	}
+ 	if (pm8001_ha->smp_exp_mode == SMP_DIRECT) {
+-		PM8001_IO_DBG(pm8001_ha,
+-			pm8001_printk("SMP REQUEST DIRECT MODE\n"));
++		pm8001_dbg(pm8001_ha, IO, "SMP REQUEST DIRECT MODE\n");
+ 		for (i = 0; i < length; i++)
+ 			if (i < 16) {
+ 				smp_cmd.smp_req16[i] = *(preq_dma_addr+i);
+-				PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-					"Byte[%d]:%x (DMA data:%x)\n",
+-					i, smp_cmd.smp_req16[i],
+-					*(preq_dma_addr)));
++				pm8001_dbg(pm8001_ha, IO,
++					   "Byte[%d]:%x (DMA data:%x)\n",
++					   i, smp_cmd.smp_req16[i],
++					   *(preq_dma_addr));
+ 			} else {
+ 				smp_cmd.smp_req[i] = *(preq_dma_addr+i);
+-				PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-					"Byte[%d]:%x (DMA data:%x)\n",
+-					i, smp_cmd.smp_req[i],
+-					*(preq_dma_addr)));
++				pm8001_dbg(pm8001_ha, IO,
++					   "Byte[%d]:%x (DMA data:%x)\n",
++					   i, smp_cmd.smp_req[i],
++					   *(preq_dma_addr));
+ 			}
+ 	}
+ 
+ 	build_smp_cmd(pm8001_dev->device_id, smp_cmd.tag,
+ 				&smp_cmd, pm8001_ha->smp_exp_mode, length);
+-	spin_lock_irqsave(&circularQ->iq_lock, flags);
+ 	rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &smp_cmd,
+ 			sizeof(smp_cmd), 0);
+-	spin_unlock_irqrestore(&circularQ->iq_lock, flags);
+ 	if (rc)
+ 		goto err_out_2;
+ 	return 0;
+@@ -4444,7 +4298,6 @@ static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha,
+ 	u64 phys_addr, start_addr, end_addr;
+ 	u32 end_addr_high, end_addr_low;
+ 	struct inbound_queue_table *circularQ;
+-	unsigned long flags;
+ 	u32 q_index, cpu_id;
+ 	u32 opc = OPC_INB_SSPINIIOSTART;
+ 	memset(&ssp_cmd, 0, sizeof(ssp_cmd));
+@@ -4471,9 +4324,9 @@ static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha,
+ 	/* Check if encryption is set */
+ 	if (pm8001_ha->chip->encrypt &&
+ 		!(pm8001_ha->encrypt_info.status) && check_enc_sas_cmd(task)) {
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-			"Encryption enabled.Sending Encrypt SAS command 0x%x\n",
+-			task->ssp_task.cmd->cmnd[0]));
++		pm8001_dbg(pm8001_ha, IO,
++			   "Encryption enabled.Sending Encrypt SAS command 0x%x\n",
++			   task->ssp_task.cmd->cmnd[0]);
+ 		opc = OPC_INB_SSP_INI_DIF_ENC_IO;
+ 		/* enable encryption. 0 for SAS 1.1 and SAS 2.0 compatible TLR*/
+ 		ssp_cmd.dad_dir_m_tlr =	cpu_to_le32
+@@ -4503,13 +4356,10 @@ static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha,
+ 			end_addr_low = cpu_to_le32(lower_32_bits(end_addr));
+ 			end_addr_high = cpu_to_le32(upper_32_bits(end_addr));
+ 			if (end_addr_high != ssp_cmd.enc_addr_high) {
+-				PM8001_FAIL_DBG(pm8001_ha,
+-					pm8001_printk("The sg list address "
+-					"start_addr=0x%016llx data_len=0x%x "
+-					"end_addr_high=0x%08x end_addr_low="
+-					"0x%08x has crossed 4G boundary\n",
+-						start_addr, ssp_cmd.enc_len,
+-						end_addr_high, end_addr_low));
++				pm8001_dbg(pm8001_ha, FAIL,
++					   "The sg list address start_addr=0x%016llx data_len=0x%x end_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n",
++					   start_addr, ssp_cmd.enc_len,
++					   end_addr_high, end_addr_low);
+ 				pm8001_chip_make_sg(task->scatter, 1,
+ 					ccb->buf_prd);
+ 				phys_addr = ccb->ccb_dma_handle;
+@@ -4533,9 +4383,9 @@ static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha,
+ 						(task->ssp_task.cmd->cmnd[4] << 8) |
+ 						(task->ssp_task.cmd->cmnd[5]));
+ 	} else {
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-			"Sending Normal SAS command 0x%x inb q %x\n",
+-			task->ssp_task.cmd->cmnd[0], q_index));
++		pm8001_dbg(pm8001_ha, IO,
++			   "Sending Normal SAS command 0x%x inb q %x\n",
++			   task->ssp_task.cmd->cmnd[0], q_index);
+ 		/* fill in PRD (scatter/gather) table, if any */
+ 		if (task->num_scatter > 1) {
+ 			pm8001_chip_make_sg(task->scatter, ccb->n_elem,
+@@ -4559,13 +4409,10 @@ static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha,
+ 			end_addr_low = cpu_to_le32(lower_32_bits(end_addr));
+ 			end_addr_high = cpu_to_le32(upper_32_bits(end_addr));
+ 			if (end_addr_high != ssp_cmd.addr_high) {
+-				PM8001_FAIL_DBG(pm8001_ha,
+-					pm8001_printk("The sg list address "
+-					"start_addr=0x%016llx data_len=0x%x "
+-					"end_addr_high=0x%08x end_addr_low="
+-					"0x%08x has crossed 4G boundary\n",
+-						 start_addr, ssp_cmd.len,
+-						 end_addr_high, end_addr_low));
++				pm8001_dbg(pm8001_ha, FAIL,
++					   "The sg list address start_addr=0x%016llx data_len=0x%x end_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n",
++					   start_addr, ssp_cmd.len,
++					   end_addr_high, end_addr_low);
+ 				pm8001_chip_make_sg(task->scatter, 1,
+ 					ccb->buf_prd);
+ 				phys_addr = ccb->ccb_dma_handle;
+@@ -4582,10 +4429,8 @@ static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha,
+ 			ssp_cmd.esgl = 0;
+ 		}
+ 	}
+-	spin_lock_irqsave(&circularQ->iq_lock, flags);
+ 	ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc,
+ 			&ssp_cmd, sizeof(ssp_cmd), q_index);
+-	spin_unlock_irqrestore(&circularQ->iq_lock, flags);
+ 	return ret;
+ }
+ 
+@@ -4614,19 +4459,19 @@ static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha,
+ 
+ 	if (task->data_dir == DMA_NONE) {
+ 		ATAP = 0x04; /* no data*/
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk("no data\n"));
++		pm8001_dbg(pm8001_ha, IO, "no data\n");
+ 	} else if (likely(!task->ata_task.device_control_reg_update)) {
+ 		if (task->ata_task.dma_xfer) {
+ 			ATAP = 0x06; /* DMA */
+-			PM8001_IO_DBG(pm8001_ha, pm8001_printk("DMA\n"));
++			pm8001_dbg(pm8001_ha, IO, "DMA\n");
+ 		} else {
+ 			ATAP = 0x05; /* PIO*/
+-			PM8001_IO_DBG(pm8001_ha, pm8001_printk("PIO\n"));
++			pm8001_dbg(pm8001_ha, IO, "PIO\n");
+ 		}
+ 		if (task->ata_task.use_ncq &&
+ 		    dev->sata_dev.class != ATA_DEV_ATAPI) {
+ 			ATAP = 0x07; /* FPDMA */
+-			PM8001_IO_DBG(pm8001_ha, pm8001_printk("FPDMA\n"));
++			pm8001_dbg(pm8001_ha, IO, "FPDMA\n");
+ 		}
+ 	}
+ 	if (task->ata_task.use_ncq && pm8001_get_ncq_tag(task, &hdr_tag)) {
+@@ -4646,9 +4491,9 @@ static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha,
+ 	/* Check if encryption is set */
+ 	if (pm8001_ha->chip->encrypt &&
+ 		!(pm8001_ha->encrypt_info.status) && check_enc_sat_cmd(task)) {
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-			"Encryption enabled.Sending Encrypt SATA cmd 0x%x\n",
+-			sata_cmd.sata_fis.command));
++		pm8001_dbg(pm8001_ha, IO,
++			   "Encryption enabled.Sending Encrypt SATA cmd 0x%x\n",
++			   sata_cmd.sata_fis.command);
+ 		opc = OPC_INB_SATA_DIF_ENC_IO;
+ 
+ 		/* set encryption bit */
+@@ -4676,13 +4521,10 @@ static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha,
+ 			end_addr_low = cpu_to_le32(lower_32_bits(end_addr));
+ 			end_addr_high = cpu_to_le32(upper_32_bits(end_addr));
+ 			if (end_addr_high != sata_cmd.enc_addr_high) {
+-				PM8001_FAIL_DBG(pm8001_ha,
+-					pm8001_printk("The sg list address "
+-					"start_addr=0x%016llx data_len=0x%x "
+-					"end_addr_high=0x%08x end_addr_low"
+-					"=0x%08x has crossed 4G boundary\n",
+-						start_addr, sata_cmd.enc_len,
+-						end_addr_high, end_addr_low));
++				pm8001_dbg(pm8001_ha, FAIL,
++					   "The sg list address start_addr=0x%016llx data_len=0x%x end_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n",
++					   start_addr, sata_cmd.enc_len,
++					   end_addr_high, end_addr_low);
+ 				pm8001_chip_make_sg(task->scatter, 1,
+ 					ccb->buf_prd);
+ 				phys_addr = ccb->ccb_dma_handle;
+@@ -4711,9 +4553,9 @@ static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha,
+ 			cpu_to_le32((sata_cmd.sata_fis.lbah_exp << 8) |
+ 					 (sata_cmd.sata_fis.lbam_exp));
+ 	} else {
+-		PM8001_IO_DBG(pm8001_ha, pm8001_printk(
+-			"Sending Normal SATA command 0x%x inb %x\n",
+-			sata_cmd.sata_fis.command, q_index));
++		pm8001_dbg(pm8001_ha, IO,
++			   "Sending Normal SATA command 0x%x inb %x\n",
++			   sata_cmd.sata_fis.command, q_index);
+ 		/* dad (bit 0-1) is 0 */
+ 		sata_cmd.ncqtag_atap_dir_m_dad =
+ 			cpu_to_le32(((ncg_tag & 0xff)<<16) |
+@@ -4739,13 +4581,10 @@ static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha,
+ 			end_addr_low = cpu_to_le32(lower_32_bits(end_addr));
+ 			end_addr_high = cpu_to_le32(upper_32_bits(end_addr));
+ 			if (end_addr_high != sata_cmd.addr_high) {
+-				PM8001_FAIL_DBG(pm8001_ha,
+-					pm8001_printk("The sg list address "
+-					"start_addr=0x%016llx data_len=0x%x"
+-					"end_addr_high=0x%08x end_addr_low="
+-					"0x%08x has crossed 4G boundary\n",
+-						start_addr, sata_cmd.len,
+-						end_addr_high, end_addr_low));
++				pm8001_dbg(pm8001_ha, FAIL,
++					   "The sg list address start_addr=0x%016llx data_len=0x%xend_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n",
++					   start_addr, sata_cmd.len,
++					   end_addr_high, end_addr_low);
+ 				pm8001_chip_make_sg(task->scatter, 1,
+ 					ccb->buf_prd);
+ 				phys_addr = ccb->ccb_dma_handle;
+@@ -4804,10 +4643,10 @@ static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha,
+ 					SAS_TASK_STATE_ABORTED))) {
+ 				spin_unlock_irqrestore(&task->task_state_lock,
+ 							flags);
+-				PM8001_FAIL_DBG(pm8001_ha,
+-					pm8001_printk("task 0x%p resp 0x%x "
+-					" stat 0x%x but aborted by upper layer "
+-					"\n", task, ts->resp, ts->stat));
++				pm8001_dbg(pm8001_ha, FAIL,
++					   "task 0x%p resp 0x%x  stat 0x%x but aborted by upper layer\n",
++					   task, ts->resp,
++					   ts->stat);
+ 				pm8001_ccb_task_free(pm8001_ha, task, ccb, tag);
+ 				return 0;
+ 			} else {
+@@ -4815,14 +4654,13 @@ static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha,
+ 							flags);
+ 				pm8001_ccb_task_free_done(pm8001_ha, task,
+ 								ccb, tag);
++				atomic_dec(&pm8001_ha_dev->running_req);
+ 				return 0;
+ 			}
+ 		}
+ 	}
+-	spin_lock_irqsave(&circularQ->iq_lock, flags);
+ 	ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc,
+ 			&sata_cmd, sizeof(sata_cmd), q_index);
+-	spin_unlock_irqrestore(&circularQ->iq_lock, flags);
+ 	return ret;
+ }
+ 
+@@ -4843,8 +4681,7 @@ pm80xx_chip_phy_start_req(struct pm8001_hba_info *pm8001_ha, u8 phy_id)
+ 	memset(&payload, 0, sizeof(payload));
+ 	payload.tag = cpu_to_le32(tag);
+ 
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("PHY START REQ for phy_id %d\n", phy_id));
++	pm8001_dbg(pm8001_ha, INIT, "PHY START REQ for phy_id %d\n", phy_id);
+ 
+ 	payload.ase_sh_lm_slr_phyid = cpu_to_le32(SPINHOLD_DISABLE |
+ 			LINKMODE_AUTO | pm8001_ha->link_rate | phy_id);
+@@ -5008,9 +4845,9 @@ static irqreturn_t
+ pm80xx_chip_isr(struct pm8001_hba_info *pm8001_ha, u8 vec)
+ {
+ 	pm80xx_chip_interrupt_disable(pm8001_ha, vec);
+-	PM8001_DEVIO_DBG(pm8001_ha, pm8001_printk(
+-		"irq vec %d, ODMR:0x%x\n",
+-		vec, pm8001_cr32(pm8001_ha, 0, 0x30)));
++	pm8001_dbg(pm8001_ha, DEVIO,
++		   "irq vec %d, ODMR:0x%x\n",
++		   vec, pm8001_cr32(pm8001_ha, 0, 0x30));
+ 	process_oq(pm8001_ha, vec);
+ 	pm80xx_chip_interrupt_enable(pm8001_ha, vec);
+ 	return IRQ_HANDLED;
+@@ -5029,13 +4866,13 @@ static void mpi_set_phy_profile_req(struct pm8001_hba_info *pm8001_ha,
+ 	memset(&payload, 0, sizeof(payload));
+ 	rc = pm8001_tag_alloc(pm8001_ha, &tag);
+ 	if (rc)
+-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("Invalid tag\n"));
++		pm8001_dbg(pm8001_ha, FAIL, "Invalid tag\n");
+ 	circularQ = &pm8001_ha->inbnd_q_tbl[0];
+ 	payload.tag = cpu_to_le32(tag);
+ 	payload.ppc_phyid = (((operation & 0xF) << 8) | (phyid  & 0xFF));
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk(" phy profile command for phy %x ,length is %d\n",
+-			payload.ppc_phyid, length));
++	pm8001_dbg(pm8001_ha, INIT,
++		   " phy profile command for phy %x ,length is %d\n",
++		   payload.ppc_phyid, length);
+ 	for (i = length; i < (length + PHY_DWORD_LENGTH - 1); i++) {
+ 		payload.reserved[j] =  cpu_to_le32(*((u32 *)buf + i));
+ 		j++;
+@@ -5056,7 +4893,7 @@ void pm8001_set_phy_profile(struct pm8001_hba_info *pm8001_ha,
+ 			SAS_PHY_ANALOG_SETTINGS_PAGE, i, length, (u32 *)buf);
+ 		length = length + PHY_DWORD_LENGTH;
+ 	}
+-	PM8001_INIT_DBG(pm8001_ha, pm8001_printk("phy settings completed\n"));
++	pm8001_dbg(pm8001_ha, INIT, "phy settings completed\n");
+ }
+ 
+ void pm8001_set_phy_profile_single(struct pm8001_hba_info *pm8001_ha,
+@@ -5071,7 +4908,7 @@ void pm8001_set_phy_profile_single(struct pm8001_hba_info *pm8001_ha,
+ 
+ 	rc = pm8001_tag_alloc(pm8001_ha, &tag);
+ 	if (rc)
+-		PM8001_INIT_DBG(pm8001_ha, pm8001_printk("Invalid tag"));
++		pm8001_dbg(pm8001_ha, INIT, "Invalid tag\n");
+ 
+ 	circularQ = &pm8001_ha->inbnd_q_tbl[0];
+ 	opc = OPC_INB_SET_PHY_PROFILE;
+@@ -5088,8 +4925,7 @@ void pm8001_set_phy_profile_single(struct pm8001_hba_info *pm8001_ha,
+ 	if (rc)
+ 		pm8001_tag_free(pm8001_ha, tag);
+ 
+-	PM8001_INIT_DBG(pm8001_ha,
+-		pm8001_printk("PHY %d settings applied", phy));
++	pm8001_dbg(pm8001_ha, INIT, "PHY %d settings applied\n", phy);
+ }
+ const struct pm8001_dispatch pm8001_80xx_dispatch = {
+ 	.name			= "pmc80xx",
+diff --git a/drivers/scsi/ufs/ufs-mediatek.c b/drivers/scsi/ufs/ufs-mediatek.c
+index 934713472ebce..09d2ac20508b5 100644
+--- a/drivers/scsi/ufs/ufs-mediatek.c
++++ b/drivers/scsi/ufs/ufs-mediatek.c
+@@ -813,7 +813,7 @@ static void ufs_mtk_vreg_set_lpm(struct ufs_hba *hba, bool lpm)
+ 	if (!hba->vreg_info.vccq2 || !hba->vreg_info.vcc)
+ 		return;
+ 
+-	if (lpm & !hba->vreg_info.vcc->enabled)
++	if (lpm && !hba->vreg_info.vcc->enabled)
+ 		regulator_set_mode(hba->vreg_info.vccq2->reg,
+ 				   REGULATOR_MODE_IDLE);
+ 	else if (!lpm)
+diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
+index 826b01f346246..2e1255bf1b429 100644
+--- a/drivers/spi/spi-cadence-quadspi.c
++++ b/drivers/spi/spi-cadence-quadspi.c
+@@ -1198,6 +1198,7 @@ static int cqspi_probe(struct platform_device *pdev)
+ 	cqspi = spi_master_get_devdata(master);
+ 
+ 	cqspi->pdev = pdev;
++	platform_set_drvdata(pdev, cqspi);
+ 
+ 	/* Obtain configuration from OF. */
+ 	ret = cqspi_of_get_pdata(cqspi);
+diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c
+index e0e35502e34a3..1dd833757c4ee 100644
+--- a/drivers/staging/media/sunxi/cedrus/cedrus.c
++++ b/drivers/staging/media/sunxi/cedrus/cedrus.c
+@@ -103,6 +103,25 @@ static const struct cedrus_control cedrus_controls[] = {
+ 		.codec		= CEDRUS_CODEC_H264,
+ 		.required	= false,
+ 	},
++	/*
++	 * We only expose supported profiles information,
++	 * and not levels as it's not clear what is supported
++	 * for each hardware/core version.
++	 * In any case, TRY/S_FMT will clamp the format resolution
++	 * to the maximum supported.
++	 */
++	{
++		.cfg = {
++			.id	= V4L2_CID_MPEG_VIDEO_H264_PROFILE,
++			.min	= V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE,
++			.def	= V4L2_MPEG_VIDEO_H264_PROFILE_MAIN,
++			.max	= V4L2_MPEG_VIDEO_H264_PROFILE_HIGH,
++			.menu_skip_mask =
++				BIT(V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED),
++		},
++		.codec		= CEDRUS_CODEC_H264,
++		.required	= false,
++	},
+ 	{
+ 		.cfg = {
+ 			.id	= V4L2_CID_MPEG_VIDEO_HEVC_SPS,
+diff --git a/drivers/thunderbolt/switch.c b/drivers/thunderbolt/switch.c
+index c73bbfe69ba16..9a272a516b2d7 100644
+--- a/drivers/thunderbolt/switch.c
++++ b/drivers/thunderbolt/switch.c
+@@ -761,12 +761,6 @@ static int tb_init_port(struct tb_port *port)
+ 
+ 	tb_dump_port(port->sw->tb, &port->config);
+ 
+-	/* Control port does not need HopID allocation */
+-	if (port->port) {
+-		ida_init(&port->in_hopids);
+-		ida_init(&port->out_hopids);
+-	}
+-
+ 	INIT_LIST_HEAD(&port->list);
+ 	return 0;
+ 
+@@ -1764,10 +1758,8 @@ static void tb_switch_release(struct device *dev)
+ 	dma_port_free(sw->dma_port);
+ 
+ 	tb_switch_for_each_port(sw, port) {
+-		if (!port->disabled) {
+-			ida_destroy(&port->in_hopids);
+-			ida_destroy(&port->out_hopids);
+-		}
++		ida_destroy(&port->in_hopids);
++		ida_destroy(&port->out_hopids);
+ 	}
+ 
+ 	kfree(sw->uuid);
+@@ -1947,6 +1939,12 @@ struct tb_switch *tb_switch_alloc(struct tb *tb, struct device *parent,
+ 		/* minimum setup for tb_find_cap and tb_drom_read to work */
+ 		sw->ports[i].sw = sw;
+ 		sw->ports[i].port = i;
++
++		/* Control port does not need HopID allocation */
++		if (i) {
++			ida_init(&sw->ports[i].in_hopids);
++			ida_init(&sw->ports[i].out_hopids);
++		}
+ 	}
+ 
+ 	ret = tb_switch_find_vse_cap(sw, TB_VSE_CAP_PLUG_EVENTS);
+diff --git a/drivers/thunderbolt/tb.c b/drivers/thunderbolt/tb.c
+index 214fbc92c1b7d..a56ea540af00b 100644
+--- a/drivers/thunderbolt/tb.c
++++ b/drivers/thunderbolt/tb.c
+@@ -138,6 +138,10 @@ static void tb_discover_tunnels(struct tb_switch *sw)
+ 				parent->boot = true;
+ 				parent = tb_switch_parent(parent);
+ 			}
++		} else if (tb_tunnel_is_dp(tunnel)) {
++			/* Keep the domain from powering down */
++			pm_runtime_get_sync(&tunnel->src_port->sw->dev);
++			pm_runtime_get_sync(&tunnel->dst_port->sw->dev);
+ 		}
+ 
+ 		list_add_tail(&tunnel->list, &tcm->tunnel_list);
+diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
+index ee6c7762d3559..6248304a001f4 100644
+--- a/drivers/tty/serial/stm32-usart.c
++++ b/drivers/tty/serial/stm32-usart.c
+@@ -350,7 +350,6 @@ static void stm32_transmit_chars_dma(struct uart_port *port)
+ 	struct stm32_usart_offsets *ofs = &stm32port->info->ofs;
+ 	struct circ_buf *xmit = &port->state->xmit;
+ 	struct dma_async_tx_descriptor *desc = NULL;
+-	dma_cookie_t cookie;
+ 	unsigned int count, i;
+ 
+ 	if (stm32port->tx_dma_busy)
+@@ -384,17 +383,18 @@ static void stm32_transmit_chars_dma(struct uart_port *port)
+ 					   DMA_MEM_TO_DEV,
+ 					   DMA_PREP_INTERRUPT);
+ 
+-	if (!desc) {
+-		for (i = count; i > 0; i--)
+-			stm32_transmit_chars_pio(port);
+-		return;
+-	}
++	if (!desc)
++		goto fallback_err;
+ 
+ 	desc->callback = stm32_tx_dma_complete;
+ 	desc->callback_param = port;
+ 
+ 	/* Push current DMA TX transaction in the pending queue */
+-	cookie = dmaengine_submit(desc);
++	if (dma_submit_error(dmaengine_submit(desc))) {
++		/* dma no yet started, safe to free resources */
++		dmaengine_terminate_async(stm32port->tx_ch);
++		goto fallback_err;
++	}
+ 
+ 	/* Issue pending DMA TX requests */
+ 	dma_async_issue_pending(stm32port->tx_ch);
+@@ -403,6 +403,11 @@ static void stm32_transmit_chars_dma(struct uart_port *port)
+ 
+ 	xmit->tail = (xmit->tail + count) & (UART_XMIT_SIZE - 1);
+ 	port->icount.tx += count;
++	return;
++
++fallback_err:
++	for (i = count; i > 0; i--)
++		stm32_transmit_chars_pio(port);
+ }
+ 
+ static void stm32_transmit_chars(struct uart_port *port)
+@@ -1087,7 +1092,6 @@ static int stm32_of_dma_rx_probe(struct stm32_port *stm32port,
+ 	struct device *dev = &pdev->dev;
+ 	struct dma_slave_config config;
+ 	struct dma_async_tx_descriptor *desc = NULL;
+-	dma_cookie_t cookie;
+ 	int ret;
+ 
+ 	/* Request DMA RX channel */
+@@ -1132,7 +1136,11 @@ static int stm32_of_dma_rx_probe(struct stm32_port *stm32port,
+ 	desc->callback_param = NULL;
+ 
+ 	/* Push current DMA transaction in the pending queue */
+-	cookie = dmaengine_submit(desc);
++	ret = dma_submit_error(dmaengine_submit(desc));
++	if (ret) {
++		dmaengine_terminate_sync(stm32port->rx_ch);
++		goto config_err;
++	}
+ 
+ 	/* Issue pending DMA requests */
+ 	dma_async_issue_pending(stm32port->rx_ch);
+diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
+index 56f7235bc068c..2a86ad4b12b34 100644
+--- a/drivers/usb/dwc3/gadget.c
++++ b/drivers/usb/dwc3/gadget.c
+@@ -783,8 +783,6 @@ static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep)
+ 
+ 	trace_dwc3_gadget_ep_disable(dep);
+ 
+-	dwc3_remove_requests(dwc, dep);
+-
+ 	/* make sure HW endpoint isn't stalled */
+ 	if (dep->flags & DWC3_EP_STALL)
+ 		__dwc3_gadget_ep_set_halt(dep, 0, false);
+@@ -803,6 +801,8 @@ static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep)
+ 		dep->endpoint.desc = NULL;
+ 	}
+ 
++	dwc3_remove_requests(dwc, dep);
++
+ 	return 0;
+ }
+ 
+@@ -1617,7 +1617,7 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
+ {
+ 	struct dwc3		*dwc = dep->dwc;
+ 
+-	if (!dep->endpoint.desc || !dwc->pullups_connected) {
++	if (!dep->endpoint.desc || !dwc->pullups_connected || !dwc->connected) {
+ 		dev_err(dwc->dev, "%s: can't queue to disabled endpoint\n",
+ 				dep->name);
+ 		return -ESHUTDOWN;
+@@ -2125,6 +2125,17 @@ static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on)
+ 		}
+ 	}
+ 
++	/*
++	 * Check the return value for successful resume, or error.  For a
++	 * successful resume, the DWC3 runtime PM resume routine will handle
++	 * the run stop sequence, so avoid duplicate operations here.
++	 */
++	ret = pm_runtime_get_sync(dwc->dev);
++	if (!ret || ret < 0) {
++		pm_runtime_put(dwc->dev);
++		return 0;
++	}
++
+ 	/*
+ 	 * Synchronize any pending event handling before executing the controller
+ 	 * halt routine.
+@@ -2139,6 +2150,7 @@ static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on)
+ 	if (!is_on) {
+ 		u32 count;
+ 
++		dwc->connected = false;
+ 		/*
+ 		 * In the Synopsis DesignWare Cores USB3 Databook Rev. 3.30a
+ 		 * Section 4.1.8 Table 4-7, it states that for a device-initiated
+@@ -2169,6 +2181,7 @@ static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on)
+ 
+ 	ret = dwc3_gadget_run_stop(dwc, is_on, false);
+ 	spin_unlock_irqrestore(&dwc->lock, flags);
++	pm_runtime_put(dwc->dev);
+ 
+ 	return ret;
+ }
+@@ -3254,8 +3267,6 @@ static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc)
+ {
+ 	u32			reg;
+ 
+-	dwc->connected = true;
+-
+ 	/*
+ 	 * WORKAROUND: DWC3 revisions <1.88a have an issue which
+ 	 * would cause a missing Disconnect Event if there's a
+@@ -3295,6 +3306,7 @@ static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc)
+ 	 * transfers."
+ 	 */
+ 	dwc3_stop_active_transfers(dwc);
++	dwc->connected = true;
+ 
+ 	reg = dwc3_readl(dwc->regs, DWC3_DCTL);
+ 	reg &= ~DWC3_DCTL_TSTCTRL_MASK;
+diff --git a/drivers/usb/gadget/configfs.c b/drivers/usb/gadget/configfs.c
+index 36ffb43f9c1a0..9b7fa53d6642b 100644
+--- a/drivers/usb/gadget/configfs.c
++++ b/drivers/usb/gadget/configfs.c
+@@ -97,6 +97,8 @@ struct gadget_config_name {
+ 	struct list_head list;
+ };
+ 
++#define USB_MAX_STRING_WITH_NULL_LEN	(USB_MAX_STRING_LEN+1)
++
+ static int usb_string_copy(const char *s, char **s_copy)
+ {
+ 	int ret;
+@@ -106,12 +108,16 @@ static int usb_string_copy(const char *s, char **s_copy)
+ 	if (ret > USB_MAX_STRING_LEN)
+ 		return -EOVERFLOW;
+ 
+-	str = kstrdup(s, GFP_KERNEL);
+-	if (!str)
+-		return -ENOMEM;
++	if (copy) {
++		str = copy;
++	} else {
++		str = kmalloc(USB_MAX_STRING_WITH_NULL_LEN, GFP_KERNEL);
++		if (!str)
++			return -ENOMEM;
++	}
++	strcpy(str, s);
+ 	if (str[ret - 1] == '\n')
+ 		str[ret - 1] = '\0';
+-	kfree(copy);
+ 	*s_copy = str;
+ 	return 0;
+ }
+diff --git a/drivers/usb/storage/transport.c b/drivers/usb/storage/transport.c
+index 238a8088e17f6..7cc8813f5d8cb 100644
+--- a/drivers/usb/storage/transport.c
++++ b/drivers/usb/storage/transport.c
+@@ -651,6 +651,13 @@ void usb_stor_invoke_transport(struct scsi_cmnd *srb, struct us_data *us)
+ 		need_auto_sense = 1;
+ 	}
+ 
++	/* Some devices (Kindle) require another command after SYNC CACHE */
++	if ((us->fflags & US_FL_SENSE_AFTER_SYNC) &&
++			srb->cmnd[0] == SYNCHRONIZE_CACHE) {
++		usb_stor_dbg(us, "-- sense after SYNC CACHE\n");
++		need_auto_sense = 1;
++	}
++
+ 	/*
+ 	 * If we have a failure, we're going to do a REQUEST_SENSE 
+ 	 * automatically.  Note that we differentiate between a command
+diff --git a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h
+index 5732e9691f08f..efa972be2ee34 100644
+--- a/drivers/usb/storage/unusual_devs.h
++++ b/drivers/usb/storage/unusual_devs.h
+@@ -2211,6 +2211,18 @@ UNUSUAL_DEV( 0x1908, 0x3335, 0x0200, 0x0200,
+ 		USB_SC_DEVICE, USB_PR_DEVICE, NULL,
+ 		US_FL_NO_READ_DISC_INFO ),
+ 
++/*
++ * Reported by Matthias Schwarzott <zzam@gentoo.org>
++ * The Amazon Kindle treats SYNCHRONIZE CACHE as an indication that
++ * the host may be finished with it, and automatically ejects its
++ * emulated media unless it receives another command within one second.
++ */
++UNUSUAL_DEV( 0x1949, 0x0004, 0x0000, 0x9999,
++		"Amazon",
++		"Kindle",
++		USB_SC_DEVICE, USB_PR_DEVICE, NULL,
++		US_FL_SENSE_AFTER_SYNC ),
++
+ /*
+  * Reported by Oliver Neukum <oneukum@suse.com>
+  * This device morphes spontaneously into another device if the access
+diff --git a/drivers/usb/typec/tcpm/tcpm.c b/drivers/usb/typec/tcpm/tcpm.c
+index a6fae1f865051..563658096b675 100644
+--- a/drivers/usb/typec/tcpm/tcpm.c
++++ b/drivers/usb/typec/tcpm/tcpm.c
+@@ -785,6 +785,7 @@ static int tcpm_set_current_limit(struct tcpm_port *port, u32 max_ma, u32 mv)
+ 
+ 	port->supply_voltage = mv;
+ 	port->current_limit = max_ma;
++	power_supply_changed(port->psy);
+ 
+ 	if (port->tcpc->set_current_limit)
+ 		ret = port->tcpc->set_current_limit(port->tcpc, max_ma, mv);
+@@ -2300,6 +2301,7 @@ static int tcpm_pd_select_pdo(struct tcpm_port *port, int *sink_pdo,
+ 
+ 	port->pps_data.supported = false;
+ 	port->usb_type = POWER_SUPPLY_USB_TYPE_PD;
++	power_supply_changed(port->psy);
+ 
+ 	/*
+ 	 * Select the source PDO providing the most power which has a
+@@ -2324,6 +2326,7 @@ static int tcpm_pd_select_pdo(struct tcpm_port *port, int *sink_pdo,
+ 				port->pps_data.supported = true;
+ 				port->usb_type =
+ 					POWER_SUPPLY_USB_TYPE_PD_PPS;
++				power_supply_changed(port->psy);
+ 			}
+ 			continue;
+ 		default:
+@@ -2481,6 +2484,7 @@ static unsigned int tcpm_pd_select_pps_apdo(struct tcpm_port *port)
+ 						  port->pps_data.out_volt));
+ 		port->pps_data.op_curr = min(port->pps_data.max_curr,
+ 					     port->pps_data.op_curr);
++		power_supply_changed(port->psy);
+ 	}
+ 
+ 	return src_pdo;
+@@ -2716,6 +2720,7 @@ static int tcpm_set_charge(struct tcpm_port *port, bool charge)
+ 			return ret;
+ 	}
+ 	port->vbus_charge = charge;
++	power_supply_changed(port->psy);
+ 	return 0;
+ }
+ 
+@@ -2880,6 +2885,7 @@ static void tcpm_reset_port(struct tcpm_port *port)
+ 	port->try_src_count = 0;
+ 	port->try_snk_count = 0;
+ 	port->usb_type = POWER_SUPPLY_USB_TYPE_C;
++	power_supply_changed(port->psy);
+ 	port->nr_sink_caps = 0;
+ 	port->sink_cap_done = false;
+ 	if (port->tcpc->enable_frs)
+@@ -4982,7 +4988,7 @@ static int tcpm_psy_set_prop(struct power_supply *psy,
+ 		ret = -EINVAL;
+ 		break;
+ 	}
+-
++	power_supply_changed(port->psy);
+ 	return ret;
+ }
+ 
+@@ -5134,6 +5140,7 @@ struct tcpm_port *tcpm_register_port(struct device *dev, struct tcpc_dev *tcpc)
+ 	err = devm_tcpm_psy_register(port);
+ 	if (err)
+ 		goto out_role_sw_put;
++	power_supply_changed(port->psy);
+ 
+ 	port->typec_port = typec_register_port(port->dev, &port->typec_caps);
+ 	if (IS_ERR(port->typec_port)) {
+diff --git a/drivers/usb/typec/tps6598x.c b/drivers/usb/typec/tps6598x.c
+index 3db33bb622c38..d8e4594fe0090 100644
+--- a/drivers/usb/typec/tps6598x.c
++++ b/drivers/usb/typec/tps6598x.c
+@@ -62,7 +62,6 @@ enum {
+ struct tps6598x_rx_identity_reg {
+ 	u8 status;
+ 	struct usb_pd_identity identity;
+-	u32 vdo[3];
+ } __packed;
+ 
+ /* Standard Task return codes */
+diff --git a/drivers/usb/usbip/vudc_sysfs.c b/drivers/usb/usbip/vudc_sysfs.c
+index a3ec39fc61778..7383a543c6d12 100644
+--- a/drivers/usb/usbip/vudc_sysfs.c
++++ b/drivers/usb/usbip/vudc_sysfs.c
+@@ -174,7 +174,7 @@ static ssize_t usbip_sockfd_store(struct device *dev,
+ 
+ 		udc->ud.tcp_socket = socket;
+ 		udc->ud.tcp_rx = tcp_rx;
+-		udc->ud.tcp_rx = tcp_tx;
++		udc->ud.tcp_tx = tcp_tx;
+ 		udc->ud.status = SDEV_ST_USED;
+ 
+ 		spin_unlock_irq(&udc->ud.lock);
+diff --git a/drivers/vfio/Kconfig b/drivers/vfio/Kconfig
+index 5533df91b257d..90c0525b1e0cf 100644
+--- a/drivers/vfio/Kconfig
++++ b/drivers/vfio/Kconfig
+@@ -21,7 +21,7 @@ config VFIO_VIRQFD
+ 
+ menuconfig VFIO
+ 	tristate "VFIO Non-Privileged userspace driver framework"
+-	depends on IOMMU_API
++	select IOMMU_API
+ 	select VFIO_IOMMU_TYPE1 if (X86 || S390 || ARM || ARM64)
+ 	help
+ 	  VFIO provides a framework for secure userspace device drivers.
+diff --git a/drivers/vhost/vdpa.c b/drivers/vhost/vdpa.c
+index 29ed4173f04e6..fc5707ada024e 100644
+--- a/drivers/vhost/vdpa.c
++++ b/drivers/vhost/vdpa.c
+@@ -312,8 +312,10 @@ static long vhost_vdpa_get_vring_num(struct vhost_vdpa *v, u16 __user *argp)
+ 
+ static void vhost_vdpa_config_put(struct vhost_vdpa *v)
+ {
+-	if (v->config_ctx)
++	if (v->config_ctx) {
+ 		eventfd_ctx_put(v->config_ctx);
++		v->config_ctx = NULL;
++	}
+ }
+ 
+ static long vhost_vdpa_set_config_call(struct vhost_vdpa *v, u32 __user *argp)
+@@ -333,8 +335,12 @@ static long vhost_vdpa_set_config_call(struct vhost_vdpa *v, u32 __user *argp)
+ 	if (!IS_ERR_OR_NULL(ctx))
+ 		eventfd_ctx_put(ctx);
+ 
+-	if (IS_ERR(v->config_ctx))
+-		return PTR_ERR(v->config_ctx);
++	if (IS_ERR(v->config_ctx)) {
++		long ret = PTR_ERR(v->config_ctx);
++
++		v->config_ctx = NULL;
++		return ret;
++	}
+ 
+ 	v->vdpa->config->set_config_cb(v->vdpa, &cb);
+ 
+@@ -904,14 +910,10 @@ err:
+ 
+ static void vhost_vdpa_clean_irq(struct vhost_vdpa *v)
+ {
+-	struct vhost_virtqueue *vq;
+ 	int i;
+ 
+-	for (i = 0; i < v->nvqs; i++) {
+-		vq = &v->vqs[i];
+-		if (vq->call_ctx.producer.irq)
+-			irq_bypass_unregister_producer(&vq->call_ctx.producer);
+-	}
++	for (i = 0; i < v->nvqs; i++)
++		vhost_vdpa_unsetup_vq_irq(v, i);
+ }
+ 
+ static int vhost_vdpa_release(struct inode *inode, struct file *filep)
+diff --git a/fs/afs/dir.c b/fs/afs/dir.c
+index 9068d5578a26f..9dc6f4b1c4177 100644
+--- a/fs/afs/dir.c
++++ b/fs/afs/dir.c
+@@ -69,7 +69,6 @@ const struct inode_operations afs_dir_inode_operations = {
+ 	.permission	= afs_permission,
+ 	.getattr	= afs_getattr,
+ 	.setattr	= afs_setattr,
+-	.listxattr	= afs_listxattr,
+ };
+ 
+ const struct address_space_operations afs_dir_aops = {
+diff --git a/fs/afs/file.c b/fs/afs/file.c
+index 85f5adf21aa08..960b64268623e 100644
+--- a/fs/afs/file.c
++++ b/fs/afs/file.c
+@@ -43,7 +43,6 @@ const struct inode_operations afs_file_inode_operations = {
+ 	.getattr	= afs_getattr,
+ 	.setattr	= afs_setattr,
+ 	.permission	= afs_permission,
+-	.listxattr	= afs_listxattr,
+ };
+ 
+ const struct address_space_operations afs_fs_aops = {
+diff --git a/fs/afs/fs_operation.c b/fs/afs/fs_operation.c
+index 97cab12b0a6c2..71c58723763d2 100644
+--- a/fs/afs/fs_operation.c
++++ b/fs/afs/fs_operation.c
+@@ -181,10 +181,13 @@ void afs_wait_for_operation(struct afs_operation *op)
+ 		if (test_bit(AFS_SERVER_FL_IS_YFS, &op->server->flags) &&
+ 		    op->ops->issue_yfs_rpc)
+ 			op->ops->issue_yfs_rpc(op);
+-		else
++		else if (op->ops->issue_afs_rpc)
+ 			op->ops->issue_afs_rpc(op);
++		else
++			op->ac.error = -ENOTSUPP;
+ 
+-		op->error = afs_wait_for_call_to_complete(op->call, &op->ac);
++		if (op->call)
++			op->error = afs_wait_for_call_to_complete(op->call, &op->ac);
+ 	}
+ 
+ 	switch (op->error) {
+diff --git a/fs/afs/inode.c b/fs/afs/inode.c
+index b0d7b892090da..1d03eb1920ec0 100644
+--- a/fs/afs/inode.c
++++ b/fs/afs/inode.c
+@@ -27,7 +27,6 @@
+ 
+ static const struct inode_operations afs_symlink_inode_operations = {
+ 	.get_link	= page_get_link,
+-	.listxattr	= afs_listxattr,
+ };
+ 
+ static noinline void dump_vnode(struct afs_vnode *vnode, struct afs_vnode *parent_vnode)
+diff --git a/fs/afs/internal.h b/fs/afs/internal.h
+index 0d150a29e39ec..525ef075fcd90 100644
+--- a/fs/afs/internal.h
++++ b/fs/afs/internal.h
+@@ -1508,7 +1508,6 @@ extern int afs_launder_page(struct page *);
+  * xattr.c
+  */
+ extern const struct xattr_handler *afs_xattr_handlers[];
+-extern ssize_t afs_listxattr(struct dentry *, char *, size_t);
+ 
+ /*
+  * yfsclient.c
+diff --git a/fs/afs/mntpt.c b/fs/afs/mntpt.c
+index 052dab2f5c03a..bbb2c210d139d 100644
+--- a/fs/afs/mntpt.c
++++ b/fs/afs/mntpt.c
+@@ -32,7 +32,6 @@ const struct inode_operations afs_mntpt_inode_operations = {
+ 	.lookup		= afs_mntpt_lookup,
+ 	.readlink	= page_readlink,
+ 	.getattr	= afs_getattr,
+-	.listxattr	= afs_listxattr,
+ };
+ 
+ const struct inode_operations afs_autocell_inode_operations = {
+diff --git a/fs/afs/xattr.c b/fs/afs/xattr.c
+index 95c573dcda116..6a29337bd562f 100644
+--- a/fs/afs/xattr.c
++++ b/fs/afs/xattr.c
+@@ -11,29 +11,6 @@
+ #include <linux/xattr.h>
+ #include "internal.h"
+ 
+-static const char afs_xattr_list[] =
+-	"afs.acl\0"
+-	"afs.cell\0"
+-	"afs.fid\0"
+-	"afs.volume\0"
+-	"afs.yfs.acl\0"
+-	"afs.yfs.acl_inherited\0"
+-	"afs.yfs.acl_num_cleaned\0"
+-	"afs.yfs.vol_acl";
+-
+-/*
+- * Retrieve a list of the supported xattrs.
+- */
+-ssize_t afs_listxattr(struct dentry *dentry, char *buffer, size_t size)
+-{
+-	if (size == 0)
+-		return sizeof(afs_xattr_list);
+-	if (size < sizeof(afs_xattr_list))
+-		return -ERANGE;
+-	memcpy(buffer, afs_xattr_list, sizeof(afs_xattr_list));
+-	return sizeof(afs_xattr_list);
+-}
+-
+ /*
+  * Deal with the result of a successful fetch ACL operation.
+  */
+@@ -230,6 +207,8 @@ static int afs_xattr_get_yfs(const struct xattr_handler *handler,
+ 			else
+ 				ret = -ERANGE;
+ 		}
++	} else if (ret == -ENOTSUPP) {
++		ret = -ENODATA;
+ 	}
+ 
+ error_yacl:
+@@ -254,6 +233,7 @@ static int afs_xattr_set_yfs(const struct xattr_handler *handler,
+ {
+ 	struct afs_operation *op;
+ 	struct afs_vnode *vnode = AFS_FS_I(inode);
++	int ret;
+ 
+ 	if (flags == XATTR_CREATE ||
+ 	    strcmp(name, "acl") != 0)
+@@ -268,7 +248,10 @@ static int afs_xattr_set_yfs(const struct xattr_handler *handler,
+ 		return afs_put_operation(op);
+ 
+ 	op->ops = &yfs_store_opaque_acl2_operation;
+-	return afs_do_sync_operation(op);
++	ret = afs_do_sync_operation(op);
++	if (ret == -ENOTSUPP)
++		ret = -ENODATA;
++	return ret;
+ }
+ 
+ static const struct xattr_handler afs_xattr_yfs_handler = {
+diff --git a/fs/btrfs/ctree.c b/fs/btrfs/ctree.c
+index f2f6f65038923..9faf15bd5a548 100644
+--- a/fs/btrfs/ctree.c
++++ b/fs/btrfs/ctree.c
+@@ -1367,7 +1367,9 @@ get_old_root(struct btrfs_root *root, u64 time_seq)
+ 				   "failed to read tree block %llu from get_old_root",
+ 				   logical);
+ 		} else {
++			btrfs_tree_read_lock(old);
+ 			eb = btrfs_clone_extent_buffer(old);
++			btrfs_tree_read_unlock(old);
+ 			free_extent_buffer(old);
+ 		}
+ 	} else if (old_root) {
+diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c
+index cbeb0cdaca7af..4162ef602a024 100644
+--- a/fs/btrfs/inode.c
++++ b/fs/btrfs/inode.c
+@@ -8811,7 +8811,7 @@ int __init btrfs_init_cachep(void)
+ 
+ 	btrfs_free_space_bitmap_cachep = kmem_cache_create("btrfs_free_space_bitmap",
+ 							PAGE_SIZE, PAGE_SIZE,
+-							SLAB_RED_ZONE, NULL);
++							SLAB_MEM_SPREAD, NULL);
+ 	if (!btrfs_free_space_bitmap_cachep)
+ 		goto fail;
+ 
+diff --git a/fs/cifs/inode.c b/fs/cifs/inode.c
+index 9ee5f304592f1..b1f0c05d6eaf8 100644
+--- a/fs/cifs/inode.c
++++ b/fs/cifs/inode.c
+@@ -2375,7 +2375,7 @@ int cifs_getattr(const struct path *path, struct kstat *stat,
+ 	 * We need to be sure that all dirty pages are written and the server
+ 	 * has actual ctime, mtime and file length.
+ 	 */
+-	if ((request_mask & (STATX_CTIME | STATX_MTIME | STATX_SIZE)) &&
++	if ((request_mask & (STATX_CTIME | STATX_MTIME | STATX_SIZE | STATX_BLOCKS)) &&
+ 	    !CIFS_CACHE_READ(CIFS_I(inode)) &&
+ 	    inode->i_mapping && inode->i_mapping->nrpages != 0) {
+ 		rc = filemap_fdatawait(inode->i_mapping);
+@@ -2565,6 +2565,14 @@ set_size_out:
+ 	if (rc == 0) {
+ 		cifsInode->server_eof = attrs->ia_size;
+ 		cifs_setsize(inode, attrs->ia_size);
++		/*
++		 * i_blocks is not related to (i_size / i_blksize), but instead
++		 * 512 byte (2**9) size is required for calculating num blocks.
++		 * Until we can query the server for actual allocation size,
++		 * this is best estimate we have for blocks allocated for a file
++		 * Number of blocks must be rounded up so size 1 is not 0 blocks
++		 */
++		inode->i_blocks = (512 - 1 + attrs->ia_size) >> 9;
+ 
+ 		/*
+ 		 * The man page of truncate says if the size changed,
+diff --git a/fs/cifs/transport.c b/fs/cifs/transport.c
+index 0b9f1a0cba1a3..7b45b3b79df56 100644
+--- a/fs/cifs/transport.c
++++ b/fs/cifs/transport.c
+@@ -1156,9 +1156,12 @@ compound_send_recv(const unsigned int xid, struct cifs_ses *ses,
+ 	/*
+ 	 * Compounding is never used during session establish.
+ 	 */
+-	if ((ses->status == CifsNew) || (optype & CIFS_NEG_OP))
++	if ((ses->status == CifsNew) || (optype & CIFS_NEG_OP)) {
++		mutex_lock(&server->srv_mutex);
+ 		smb311_update_preauth_hash(ses, rqst[0].rq_iov,
+ 					   rqst[0].rq_nvec);
++		mutex_unlock(&server->srv_mutex);
++	}
+ 
+ 	for (i = 0; i < num_rqst; i++) {
+ 		rc = wait_for_response(server, midQ[i]);
+@@ -1226,7 +1229,9 @@ compound_send_recv(const unsigned int xid, struct cifs_ses *ses,
+ 			.iov_base = resp_iov[0].iov_base,
+ 			.iov_len = resp_iov[0].iov_len
+ 		};
++		mutex_lock(&server->srv_mutex);
+ 		smb311_update_preauth_hash(ses, &iov, 1);
++		mutex_unlock(&server->srv_mutex);
+ 	}
+ 
+ out:
+diff --git a/fs/ext4/ext4.h b/fs/ext4/ext4.h
+index 65ecaf96d0a4d..b92acb6603139 100644
+--- a/fs/ext4/ext4.h
++++ b/fs/ext4/ext4.h
+@@ -2762,6 +2762,8 @@ void __ext4_fc_track_link(handle_t *handle, struct inode *inode,
+ 	struct dentry *dentry);
+ void ext4_fc_track_unlink(handle_t *handle, struct dentry *dentry);
+ void ext4_fc_track_link(handle_t *handle, struct dentry *dentry);
++void __ext4_fc_track_create(handle_t *handle, struct inode *inode,
++			    struct dentry *dentry);
+ void ext4_fc_track_create(handle_t *handle, struct dentry *dentry);
+ void ext4_fc_track_inode(handle_t *handle, struct inode *inode);
+ void ext4_fc_mark_ineligible(struct super_block *sb, int reason);
+diff --git a/fs/ext4/fast_commit.c b/fs/ext4/fast_commit.c
+index a1dd7ca962c3f..4008a674250cf 100644
+--- a/fs/ext4/fast_commit.c
++++ b/fs/ext4/fast_commit.c
+@@ -452,10 +452,10 @@ void ext4_fc_track_link(handle_t *handle, struct dentry *dentry)
+ 	__ext4_fc_track_link(handle, d_inode(dentry), dentry);
+ }
+ 
+-void ext4_fc_track_create(handle_t *handle, struct dentry *dentry)
++void __ext4_fc_track_create(handle_t *handle, struct inode *inode,
++			  struct dentry *dentry)
+ {
+ 	struct __track_dentry_update_args args;
+-	struct inode *inode = d_inode(dentry);
+ 	int ret;
+ 
+ 	args.dentry = dentry;
+@@ -466,6 +466,11 @@ void ext4_fc_track_create(handle_t *handle, struct dentry *dentry)
+ 	trace_ext4_fc_track_create(inode, dentry, ret);
+ }
+ 
++void ext4_fc_track_create(handle_t *handle, struct dentry *dentry)
++{
++	__ext4_fc_track_create(handle, d_inode(dentry), dentry);
++}
++
+ /* __track_fn for inode tracking */
+ static int __track_inode(struct inode *inode, void *arg, bool update)
+ {
+diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c
+index 0afab6d5c65bd..c2b8ba343bb4b 100644
+--- a/fs/ext4/inode.c
++++ b/fs/ext4/inode.c
+@@ -5029,7 +5029,7 @@ static int ext4_do_update_inode(handle_t *handle,
+ 	struct ext4_inode_info *ei = EXT4_I(inode);
+ 	struct buffer_head *bh = iloc->bh;
+ 	struct super_block *sb = inode->i_sb;
+-	int err = 0, rc, block;
++	int err = 0, block;
+ 	int need_datasync = 0, set_large_file = 0;
+ 	uid_t i_uid;
+ 	gid_t i_gid;
+@@ -5141,9 +5141,9 @@ static int ext4_do_update_inode(handle_t *handle,
+ 					      bh->b_data);
+ 
+ 	BUFFER_TRACE(bh, "call ext4_handle_dirty_metadata");
+-	rc = ext4_handle_dirty_metadata(handle, NULL, bh);
+-	if (!err)
+-		err = rc;
++	err = ext4_handle_dirty_metadata(handle, NULL, bh);
++	if (err)
++		goto out_brelse;
+ 	ext4_clear_inode_state(inode, EXT4_STATE_NEW);
+ 	if (set_large_file) {
+ 		BUFFER_TRACE(EXT4_SB(sb)->s_sbh, "get write access");
+@@ -5385,8 +5385,10 @@ int ext4_setattr(struct dentry *dentry, struct iattr *attr)
+ 			inode->i_gid = attr->ia_gid;
+ 		error = ext4_mark_inode_dirty(handle, inode);
+ 		ext4_journal_stop(handle);
+-		if (unlikely(error))
++		if (unlikely(error)) {
++			ext4_fc_stop_update(inode);
+ 			return error;
++		}
+ 	}
+ 
+ 	if (attr->ia_valid & ATTR_SIZE) {
+diff --git a/fs/ext4/namei.c b/fs/ext4/namei.c
+index 14783f7dcbe98..6c7eba426a678 100644
+--- a/fs/ext4/namei.c
++++ b/fs/ext4/namei.c
+@@ -3604,6 +3604,31 @@ static int ext4_setent(handle_t *handle, struct ext4_renament *ent,
+ 	return retval;
+ }
+ 
++static void ext4_resetent(handle_t *handle, struct ext4_renament *ent,
++			  unsigned ino, unsigned file_type)
++{
++	struct ext4_renament old = *ent;
++	int retval = 0;
++
++	/*
++	 * old->de could have moved from under us during make indexed dir,
++	 * so the old->de may no longer valid and need to find it again
++	 * before reset old inode info.
++	 */
++	old.bh = ext4_find_entry(old.dir, &old.dentry->d_name, &old.de, NULL);
++	if (IS_ERR(old.bh))
++		retval = PTR_ERR(old.bh);
++	if (!old.bh)
++		retval = -ENOENT;
++	if (retval) {
++		ext4_std_error(old.dir->i_sb, retval);
++		return;
++	}
++
++	ext4_setent(handle, &old, ino, file_type);
++	brelse(old.bh);
++}
++
+ static int ext4_find_delete_entry(handle_t *handle, struct inode *dir,
+ 				  const struct qstr *d_name)
+ {
+@@ -3839,6 +3864,7 @@ static int ext4_rename(struct inode *old_dir, struct dentry *old_dentry,
+ 		retval = ext4_mark_inode_dirty(handle, whiteout);
+ 		if (unlikely(retval))
+ 			goto end_rename;
++
+ 	}
+ 	if (!new.bh) {
+ 		retval = ext4_add_entry(handle, new.dentry, old.inode);
+@@ -3912,6 +3938,8 @@ static int ext4_rename(struct inode *old_dir, struct dentry *old_dentry,
+ 			ext4_fc_track_unlink(handle, new.dentry);
+ 		__ext4_fc_track_link(handle, old.inode, new.dentry);
+ 		__ext4_fc_track_unlink(handle, old.inode, old.dentry);
++		if (whiteout)
++			__ext4_fc_track_create(handle, whiteout, old.dentry);
+ 	}
+ 
+ 	if (new.inode) {
+@@ -3926,8 +3954,8 @@ static int ext4_rename(struct inode *old_dir, struct dentry *old_dentry,
+ end_rename:
+ 	if (whiteout) {
+ 		if (retval) {
+-			ext4_setent(handle, &old,
+-				old.inode->i_ino, old_file_type);
++			ext4_resetent(handle, &old,
++				      old.inode->i_ino, old_file_type);
+ 			drop_nlink(whiteout);
+ 		}
+ 		unlock_new_inode(whiteout);
+diff --git a/fs/ext4/verity.c b/fs/ext4/verity.c
+index 5b7ba8f711538..00e3cbde472e4 100644
+--- a/fs/ext4/verity.c
++++ b/fs/ext4/verity.c
+@@ -201,55 +201,76 @@ static int ext4_end_enable_verity(struct file *filp, const void *desc,
+ 	struct inode *inode = file_inode(filp);
+ 	const int credits = 2; /* superblock and inode for ext4_orphan_del() */
+ 	handle_t *handle;
++	struct ext4_iloc iloc;
+ 	int err = 0;
+-	int err2;
+ 
+-	if (desc != NULL) {
+-		/* Succeeded; write the verity descriptor. */
+-		err = ext4_write_verity_descriptor(inode, desc, desc_size,
+-						   merkle_tree_size);
+-
+-		/* Write all pages before clearing VERITY_IN_PROGRESS. */
+-		if (!err)
+-			err = filemap_write_and_wait(inode->i_mapping);
+-	}
++	/*
++	 * If an error already occurred (which fs/verity/ signals by passing
++	 * desc == NULL), then only clean-up is needed.
++	 */
++	if (desc == NULL)
++		goto cleanup;
+ 
+-	/* If we failed, truncate anything we wrote past i_size. */
+-	if (desc == NULL || err)
+-		ext4_truncate(inode);
++	/* Append the verity descriptor. */
++	err = ext4_write_verity_descriptor(inode, desc, desc_size,
++					   merkle_tree_size);
++	if (err)
++		goto cleanup;
+ 
+ 	/*
+-	 * We must always clean up by clearing EXT4_STATE_VERITY_IN_PROGRESS and
+-	 * deleting the inode from the orphan list, even if something failed.
+-	 * If everything succeeded, we'll also set the verity bit in the same
+-	 * transaction.
++	 * Write all pages (both data and verity metadata).  Note that this must
++	 * happen before clearing EXT4_STATE_VERITY_IN_PROGRESS; otherwise pages
++	 * beyond i_size won't be written properly.  For crash consistency, this
++	 * also must happen before the verity inode flag gets persisted.
+ 	 */
++	err = filemap_write_and_wait(inode->i_mapping);
++	if (err)
++		goto cleanup;
+ 
+-	ext4_clear_inode_state(inode, EXT4_STATE_VERITY_IN_PROGRESS);
++	/*
++	 * Finally, set the verity inode flag and remove the inode from the
++	 * orphan list (in a single transaction).
++	 */
+ 
+ 	handle = ext4_journal_start(inode, EXT4_HT_INODE, credits);
+ 	if (IS_ERR(handle)) {
+-		ext4_orphan_del(NULL, inode);
+-		return PTR_ERR(handle);
++		err = PTR_ERR(handle);
++		goto cleanup;
+ 	}
+ 
+-	err2 = ext4_orphan_del(handle, inode);
+-	if (err2)
+-		goto out_stop;
++	err = ext4_orphan_del(handle, inode);
++	if (err)
++		goto stop_and_cleanup;
+ 
+-	if (desc != NULL && !err) {
+-		struct ext4_iloc iloc;
++	err = ext4_reserve_inode_write(handle, inode, &iloc);
++	if (err)
++		goto stop_and_cleanup;
+ 
+-		err = ext4_reserve_inode_write(handle, inode, &iloc);
+-		if (err)
+-			goto out_stop;
+-		ext4_set_inode_flag(inode, EXT4_INODE_VERITY);
+-		ext4_set_inode_flags(inode, false);
+-		err = ext4_mark_iloc_dirty(handle, inode, &iloc);
+-	}
+-out_stop:
++	ext4_set_inode_flag(inode, EXT4_INODE_VERITY);
++	ext4_set_inode_flags(inode, false);
++	err = ext4_mark_iloc_dirty(handle, inode, &iloc);
++	if (err)
++		goto stop_and_cleanup;
++
++	ext4_journal_stop(handle);
++
++	ext4_clear_inode_state(inode, EXT4_STATE_VERITY_IN_PROGRESS);
++	return 0;
++
++stop_and_cleanup:
+ 	ext4_journal_stop(handle);
+-	return err ?: err2;
++cleanup:
++	/*
++	 * Verity failed to be enabled, so clean up by truncating any verity
++	 * metadata that was written beyond i_size (both from cache and from
++	 * disk), removing the inode from the orphan list (if it wasn't done
++	 * already), and clearing EXT4_STATE_VERITY_IN_PROGRESS.
++	 */
++	truncate_inode_pages(inode->i_mapping, inode->i_size);
++	ext4_truncate(inode);
++	ext4_orphan_del(NULL, inode);
++	ext4_clear_inode_state(inode, EXT4_STATE_VERITY_IN_PROGRESS);
++	return err;
+ }
+ 
+ static int ext4_get_verity_descriptor_location(struct inode *inode,
+diff --git a/fs/ext4/xattr.c b/fs/ext4/xattr.c
+index 6127e94ea4f5d..4698471795732 100644
+--- a/fs/ext4/xattr.c
++++ b/fs/ext4/xattr.c
+@@ -2398,7 +2398,7 @@ retry_inode:
+ 				 * external inode if possible.
+ 				 */
+ 				if (ext4_has_feature_ea_inode(inode->i_sb) &&
+-				    !i.in_inode) {
++				    i.value_len && !i.in_inode) {
+ 					i.in_inode = 1;
+ 					goto retry_inode;
+ 				}
+diff --git a/fs/gfs2/ops_fstype.c b/fs/gfs2/ops_fstype.c
+index 61fce59cb4d38..f2c6bbe5cdb81 100644
+--- a/fs/gfs2/ops_fstype.c
++++ b/fs/gfs2/ops_fstype.c
+@@ -1084,6 +1084,7 @@ static int gfs2_fill_super(struct super_block *sb, struct fs_context *fc)
+ 	int silent = fc->sb_flags & SB_SILENT;
+ 	struct gfs2_sbd *sdp;
+ 	struct gfs2_holder mount_gh;
++	struct gfs2_holder freeze_gh;
+ 	int error;
+ 
+ 	sdp = init_sbd(sb);
+@@ -1195,25 +1196,18 @@ static int gfs2_fill_super(struct super_block *sb, struct fs_context *fc)
+ 		goto fail_per_node;
+ 	}
+ 
+-	if (sb_rdonly(sb)) {
+-		struct gfs2_holder freeze_gh;
++	error = gfs2_freeze_lock(sdp, &freeze_gh, 0);
++	if (error)
++		goto fail_per_node;
+ 
+-		error = gfs2_glock_nq_init(sdp->sd_freeze_gl, LM_ST_SHARED,
+-					   LM_FLAG_NOEXP | GL_EXACT,
+-					   &freeze_gh);
+-		if (error) {
+-			fs_err(sdp, "can't make FS RO: %d\n", error);
+-			goto fail_per_node;
+-		}
+-		gfs2_glock_dq_uninit(&freeze_gh);
+-	} else {
++	if (!sb_rdonly(sb))
+ 		error = gfs2_make_fs_rw(sdp);
+-		if (error) {
+-			fs_err(sdp, "can't make FS RW: %d\n", error);
+-			goto fail_per_node;
+-		}
+-	}
+ 
++	gfs2_freeze_unlock(&freeze_gh);
++	if (error) {
++		fs_err(sdp, "can't make FS RW: %d\n", error);
++		goto fail_per_node;
++	}
+ 	gfs2_glock_dq_uninit(&mount_gh);
+ 	gfs2_online_uevent(sdp);
+ 	return 0;
+@@ -1514,6 +1508,12 @@ static int gfs2_reconfigure(struct fs_context *fc)
+ 		fc->sb_flags |= SB_RDONLY;
+ 
+ 	if ((sb->s_flags ^ fc->sb_flags) & SB_RDONLY) {
++		struct gfs2_holder freeze_gh;
++
++		error = gfs2_freeze_lock(sdp, &freeze_gh, 0);
++		if (error)
++			return -EINVAL;
++
+ 		if (fc->sb_flags & SB_RDONLY) {
+ 			error = gfs2_make_fs_ro(sdp);
+ 			if (error)
+@@ -1523,6 +1523,7 @@ static int gfs2_reconfigure(struct fs_context *fc)
+ 			if (error)
+ 				errorfc(fc, "unable to remount read-write");
+ 		}
++		gfs2_freeze_unlock(&freeze_gh);
+ 	}
+ 	sdp->sd_args = *newargs;
+ 
+diff --git a/fs/gfs2/recovery.c b/fs/gfs2/recovery.c
+index a3c1911862f01..8f9c6480a5df4 100644
+--- a/fs/gfs2/recovery.c
++++ b/fs/gfs2/recovery.c
+@@ -470,9 +470,7 @@ void gfs2_recover_func(struct work_struct *work)
+ 
+ 		/* Acquire a shared hold on the freeze lock */
+ 
+-		error = gfs2_glock_nq_init(sdp->sd_freeze_gl, LM_ST_SHARED,
+-					   LM_FLAG_NOEXP | LM_FLAG_PRIORITY |
+-					   GL_EXACT, &thaw_gh);
++		error = gfs2_freeze_lock(sdp, &thaw_gh, LM_FLAG_PRIORITY);
+ 		if (error)
+ 			goto fail_gunlock_ji;
+ 
+@@ -524,7 +522,7 @@ void gfs2_recover_func(struct work_struct *work)
+ 		clean_journal(jd, &head);
+ 		up_read(&sdp->sd_log_flush_lock);
+ 
+-		gfs2_glock_dq_uninit(&thaw_gh);
++		gfs2_freeze_unlock(&thaw_gh);
+ 		t_rep = ktime_get();
+ 		fs_info(sdp, "jid=%u: Journal replayed in %lldms [jlck:%lldms, "
+ 			"jhead:%lldms, tlck:%lldms, replay:%lldms]\n",
+@@ -546,7 +544,7 @@ void gfs2_recover_func(struct work_struct *work)
+ 	goto done;
+ 
+ fail_gunlock_thaw:
+-	gfs2_glock_dq_uninit(&thaw_gh);
++	gfs2_freeze_unlock(&thaw_gh);
+ fail_gunlock_ji:
+ 	if (jlocked) {
+ 		gfs2_glock_dq_uninit(&ji_gh);
+diff --git a/fs/gfs2/super.c b/fs/gfs2/super.c
+index b3d951ab80680..ddd40c96f7a23 100644
+--- a/fs/gfs2/super.c
++++ b/fs/gfs2/super.c
+@@ -165,7 +165,6 @@ int gfs2_make_fs_rw(struct gfs2_sbd *sdp)
+ {
+ 	struct gfs2_inode *ip = GFS2_I(sdp->sd_jdesc->jd_inode);
+ 	struct gfs2_glock *j_gl = ip->i_gl;
+-	struct gfs2_holder freeze_gh;
+ 	struct gfs2_log_header_host head;
+ 	int error;
+ 
+@@ -173,12 +172,6 @@ int gfs2_make_fs_rw(struct gfs2_sbd *sdp)
+ 	if (error)
+ 		return error;
+ 
+-	error = gfs2_glock_nq_init(sdp->sd_freeze_gl, LM_ST_SHARED,
+-				   LM_FLAG_NOEXP | GL_EXACT,
+-				   &freeze_gh);
+-	if (error)
+-		goto fail_threads;
+-
+ 	j_gl->gl_ops->go_inval(j_gl, DIO_METADATA);
+ 	if (gfs2_withdrawn(sdp)) {
+ 		error = -EIO;
+@@ -205,13 +198,9 @@ int gfs2_make_fs_rw(struct gfs2_sbd *sdp)
+ 
+ 	set_bit(SDF_JOURNAL_LIVE, &sdp->sd_flags);
+ 
+-	gfs2_glock_dq_uninit(&freeze_gh);
+-
+ 	return 0;
+ 
+ fail:
+-	gfs2_glock_dq_uninit(&freeze_gh);
+-fail_threads:
+ 	if (sdp->sd_quotad_process)
+ 		kthread_stop(sdp->sd_quotad_process);
+ 	sdp->sd_quotad_process = NULL;
+@@ -454,7 +443,7 @@ static int gfs2_lock_fs_check_clean(struct gfs2_sbd *sdp)
+ 	}
+ 
+ 	if (error)
+-		gfs2_glock_dq_uninit(&sdp->sd_freeze_gh);
++		gfs2_freeze_unlock(&sdp->sd_freeze_gh);
+ 
+ out:
+ 	while (!list_empty(&list)) {
+@@ -611,30 +600,9 @@ out:
+ 
+ int gfs2_make_fs_ro(struct gfs2_sbd *sdp)
+ {
+-	struct gfs2_holder freeze_gh;
+ 	int error = 0;
+ 	int log_write_allowed = test_bit(SDF_JOURNAL_LIVE, &sdp->sd_flags);
+ 
+-	gfs2_holder_mark_uninitialized(&freeze_gh);
+-	if (sdp->sd_freeze_gl &&
+-	    !gfs2_glock_is_locked_by_me(sdp->sd_freeze_gl)) {
+-		if (!log_write_allowed) {
+-			error = gfs2_glock_nq_init(sdp->sd_freeze_gl,
+-						   LM_ST_SHARED, LM_FLAG_TRY |
+-						   LM_FLAG_NOEXP | GL_EXACT,
+-						   &freeze_gh);
+-			if (error == GLR_TRYFAILED)
+-				error = 0;
+-		} else {
+-			error = gfs2_glock_nq_init(sdp->sd_freeze_gl,
+-						   LM_ST_SHARED,
+-						   LM_FLAG_NOEXP | GL_EXACT,
+-						   &freeze_gh);
+-			if (error && !gfs2_withdrawn(sdp))
+-				return error;
+-		}
+-	}
+-
+ 	gfs2_flush_delete_work(sdp);
+ 	if (!log_write_allowed && current == sdp->sd_quotad_process)
+ 		fs_warn(sdp, "The quotad daemon is withdrawing.\n");
+@@ -663,9 +631,6 @@ int gfs2_make_fs_ro(struct gfs2_sbd *sdp)
+ 				   atomic_read(&sdp->sd_reserving_log) == 0,
+ 				   HZ * 5);
+ 	}
+-	if (gfs2_holder_initialized(&freeze_gh))
+-		gfs2_glock_dq_uninit(&freeze_gh);
+-
+ 	gfs2_quota_cleanup(sdp);
+ 
+ 	if (!log_write_allowed)
+@@ -774,10 +739,8 @@ void gfs2_freeze_func(struct work_struct *work)
+ 	struct super_block *sb = sdp->sd_vfs;
+ 
+ 	atomic_inc(&sb->s_active);
+-	error = gfs2_glock_nq_init(sdp->sd_freeze_gl, LM_ST_SHARED,
+-				   LM_FLAG_NOEXP | GL_EXACT, &freeze_gh);
++	error = gfs2_freeze_lock(sdp, &freeze_gh, 0);
+ 	if (error) {
+-		fs_info(sdp, "GFS2: couldn't get freeze lock : %d\n", error);
+ 		gfs2_assert_withdraw(sdp, 0);
+ 	} else {
+ 		atomic_set(&sdp->sd_freeze_state, SFS_UNFROZEN);
+@@ -787,7 +750,7 @@ void gfs2_freeze_func(struct work_struct *work)
+ 				error);
+ 			gfs2_assert_withdraw(sdp, 0);
+ 		}
+-		gfs2_glock_dq_uninit(&freeze_gh);
++		gfs2_freeze_unlock(&freeze_gh);
+ 	}
+ 	deactivate_super(sb);
+ 	clear_bit_unlock(SDF_FS_FROZEN, &sdp->sd_flags);
+@@ -855,7 +818,7 @@ static int gfs2_unfreeze(struct super_block *sb)
+                 return 0;
+ 	}
+ 
+-	gfs2_glock_dq_uninit(&sdp->sd_freeze_gh);
++	gfs2_freeze_unlock(&sdp->sd_freeze_gh);
+ 	mutex_unlock(&sdp->sd_freeze_mutex);
+ 	return wait_on_bit(&sdp->sd_flags, SDF_FS_FROZEN, TASK_INTERRUPTIBLE);
+ }
+diff --git a/fs/gfs2/util.c b/fs/gfs2/util.c
+index b7d4e4550880d..3ece99e6490c2 100644
+--- a/fs/gfs2/util.c
++++ b/fs/gfs2/util.c
+@@ -91,19 +91,50 @@ out_unlock:
+ 	return error;
+ }
+ 
++/**
++ * gfs2_freeze_lock - hold the freeze glock
++ * @sdp: the superblock
++ * @freeze_gh: pointer to the requested holder
++ * @caller_flags: any additional flags needed by the caller
++ */
++int gfs2_freeze_lock(struct gfs2_sbd *sdp, struct gfs2_holder *freeze_gh,
++		     int caller_flags)
++{
++	int flags = LM_FLAG_NOEXP | GL_EXACT | caller_flags;
++	int error;
++
++	error = gfs2_glock_nq_init(sdp->sd_freeze_gl, LM_ST_SHARED, flags,
++				   freeze_gh);
++	if (error && error != GLR_TRYFAILED)
++		fs_err(sdp, "can't lock the freeze lock: %d\n", error);
++	return error;
++}
++
++void gfs2_freeze_unlock(struct gfs2_holder *freeze_gh)
++{
++	if (gfs2_holder_initialized(freeze_gh))
++		gfs2_glock_dq_uninit(freeze_gh);
++}
++
+ static void signal_our_withdraw(struct gfs2_sbd *sdp)
+ {
+ 	struct gfs2_glock *live_gl = sdp->sd_live_gh.gh_gl;
+-	struct inode *inode = sdp->sd_jdesc->jd_inode;
+-	struct gfs2_inode *ip = GFS2_I(inode);
+-	struct gfs2_glock *i_gl = ip->i_gl;
+-	u64 no_formal_ino = ip->i_no_formal_ino;
++	struct inode *inode;
++	struct gfs2_inode *ip;
++	struct gfs2_glock *i_gl;
++	u64 no_formal_ino;
++	int log_write_allowed = test_bit(SDF_JOURNAL_LIVE, &sdp->sd_flags);
+ 	int ret = 0;
+ 	int tries;
+ 
+-	if (test_bit(SDF_NORECOVERY, &sdp->sd_flags))
++	if (test_bit(SDF_NORECOVERY, &sdp->sd_flags) || !sdp->sd_jdesc)
+ 		return;
+ 
++	inode = sdp->sd_jdesc->jd_inode;
++	ip = GFS2_I(inode);
++	i_gl = ip->i_gl;
++	no_formal_ino = ip->i_no_formal_ino;
++
+ 	/* Prevent any glock dq until withdraw recovery is complete */
+ 	set_bit(SDF_WITHDRAW_RECOVERY, &sdp->sd_flags);
+ 	/*
+@@ -118,8 +149,21 @@ static void signal_our_withdraw(struct gfs2_sbd *sdp)
+ 	 * therefore we need to clear SDF_JOURNAL_LIVE manually.
+ 	 */
+ 	clear_bit(SDF_JOURNAL_LIVE, &sdp->sd_flags);
+-	if (!sb_rdonly(sdp->sd_vfs))
+-		ret = gfs2_make_fs_ro(sdp);
++	if (!sb_rdonly(sdp->sd_vfs)) {
++		struct gfs2_holder freeze_gh;
++
++		gfs2_holder_mark_uninitialized(&freeze_gh);
++		if (sdp->sd_freeze_gl &&
++		    !gfs2_glock_is_locked_by_me(sdp->sd_freeze_gl)) {
++			ret = gfs2_freeze_lock(sdp, &freeze_gh,
++				       log_write_allowed ? 0 : LM_FLAG_TRY);
++			if (ret == GLR_TRYFAILED)
++				ret = 0;
++		}
++		if (!ret)
++			ret = gfs2_make_fs_ro(sdp);
++		gfs2_freeze_unlock(&freeze_gh);
++	}
+ 
+ 	if (sdp->sd_lockstruct.ls_ops->lm_lock == NULL) { /* lock_nolock */
+ 		if (!ret)
+diff --git a/fs/gfs2/util.h b/fs/gfs2/util.h
+index d7562981b3a09..aa3771281acac 100644
+--- a/fs/gfs2/util.h
++++ b/fs/gfs2/util.h
+@@ -149,6 +149,9 @@ int gfs2_io_error_i(struct gfs2_sbd *sdp, const char *function,
+ 
+ extern int check_journal_clean(struct gfs2_sbd *sdp, struct gfs2_jdesc *jd,
+ 			       bool verbose);
++extern int gfs2_freeze_lock(struct gfs2_sbd *sdp,
++			    struct gfs2_holder *freeze_gh, int caller_flags);
++extern void gfs2_freeze_unlock(struct gfs2_holder *freeze_gh);
+ 
+ #define gfs2_io_error(sdp) \
+ gfs2_io_error_i((sdp), __func__, __FILE__, __LINE__);
+diff --git a/fs/io_uring.c b/fs/io_uring.c
+index 691c998691439..06e9c21819957 100644
+--- a/fs/io_uring.c
++++ b/fs/io_uring.c
+@@ -2085,6 +2085,7 @@ static void __io_req_task_submit(struct io_kiocb *req)
+ 		__io_req_task_cancel(req, -EFAULT);
+ 	mutex_unlock(&ctx->uring_lock);
+ 
++	ctx->flags &= ~IORING_SETUP_R_DISABLED;
+ 	if (ctx->flags & IORING_SETUP_SQPOLL)
+ 		io_sq_thread_drop_mm();
+ }
+@@ -2616,6 +2617,13 @@ static bool io_rw_reissue(struct io_kiocb *req, long res)
+ 		return false;
+ 	if ((res != -EAGAIN && res != -EOPNOTSUPP) || io_wq_current_is_worker())
+ 		return false;
++	/*
++	 * If ref is dying, we might be running poll reap from the exit work.
++	 * Don't attempt to reissue from that path, just let it fail with
++	 * -EAGAIN.
++	 */
++	if (percpu_ref_is_dying(&req->ctx->refs))
++		return false;
+ 
+ 	ret = io_sq_thread_acquire_mm(req->ctx, req);
+ 
+@@ -3493,6 +3501,7 @@ retry:
+ 		goto out_free;
+ 	} else if (ret > 0 && ret < io_size) {
+ 		/* we got some bytes, but not all. retry. */
++		kiocb->ki_flags &= ~IOCB_WAITQ;
+ 		goto retry;
+ 	}
+ done:
+@@ -6233,9 +6242,10 @@ static enum hrtimer_restart io_link_timeout_fn(struct hrtimer *timer)
+ 	if (prev) {
+ 		req_set_fail_links(prev);
+ 		io_async_find_and_cancel(ctx, req, prev->user_data, -ETIME);
+-		io_put_req(prev);
++		io_put_req_deferred(prev, 1);
+ 	} else {
+-		io_req_complete(req, -ETIME);
++		io_cqring_add_event(req, -ETIME, 0);
++		io_put_req_deferred(req, 1);
+ 	}
+ 	return HRTIMER_NORESTART;
+ }
+@@ -8684,6 +8694,8 @@ static void io_disable_sqo_submit(struct io_ring_ctx *ctx)
+ {
+ 	mutex_lock(&ctx->uring_lock);
+ 	ctx->sqo_dead = 1;
++	if (ctx->flags & IORING_SETUP_R_DISABLED)
++		io_sq_offload_start(ctx);
+ 	mutex_unlock(&ctx->uring_lock);
+ 
+ 	/* make sure callers enter the ring to get error */
+@@ -9662,10 +9674,7 @@ static int io_register_enable_rings(struct io_ring_ctx *ctx)
+ 	if (ctx->restrictions.registered)
+ 		ctx->restricted = 1;
+ 
+-	ctx->flags &= ~IORING_SETUP_R_DISABLED;
+-
+ 	io_sq_offload_start(ctx);
+-
+ 	return 0;
+ }
+ 
+diff --git a/fs/nfsd/filecache.c b/fs/nfsd/filecache.c
+index 5849c1bd88f17..e5aad1c10ea32 100644
+--- a/fs/nfsd/filecache.c
++++ b/fs/nfsd/filecache.c
+@@ -897,6 +897,8 @@ nfsd_file_find_locked(struct inode *inode, unsigned int may_flags,
+ 			continue;
+ 		if (!nfsd_match_cred(nf->nf_cred, current_cred()))
+ 			continue;
++		if (!test_bit(NFSD_FILE_HASHED, &nf->nf_flags))
++			continue;
+ 		if (nfsd_file_get(nf) != NULL)
+ 			return nf;
+ 	}
+diff --git a/fs/nfsd/nfs4proc.c b/fs/nfsd/nfs4proc.c
+index e83b21778816d..2e68cea148e0d 100644
+--- a/fs/nfsd/nfs4proc.c
++++ b/fs/nfsd/nfs4proc.c
+@@ -1299,7 +1299,7 @@ nfsd4_cleanup_inter_ssc(struct vfsmount *ss_mnt, struct nfsd_file *src,
+ 			struct nfsd_file *dst)
+ {
+ 	nfs42_ssc_close(src->nf_file);
+-	/* 'src' is freed by nfsd4_do_async_copy */
++	fput(src->nf_file);
+ 	nfsd_file_put(dst);
+ 	mntput(ss_mnt);
+ }
+diff --git a/fs/nfsd/nfs4state.c b/fs/nfsd/nfs4state.c
+index ee4e6e3b995d4..55cf60b71cde0 100644
+--- a/fs/nfsd/nfs4state.c
++++ b/fs/nfsd/nfs4state.c
+@@ -5372,7 +5372,7 @@ nfs4_laundromat(struct nfsd_net *nn)
+ 	idr_for_each_entry(&nn->s2s_cp_stateids, cps_t, i) {
+ 		cps = container_of(cps_t, struct nfs4_cpntf_state, cp_stateid);
+ 		if (cps->cp_stateid.sc_type == NFS4_COPYNOTIFY_STID &&
+-				cps->cpntf_time > cutoff)
++				cps->cpntf_time < cutoff)
+ 			_free_cpntf_state_locked(nn, cps);
+ 	}
+ 	spin_unlock(&nn->s2s_cp_lock);
+diff --git a/fs/pstore/inode.c b/fs/pstore/inode.c
+index c331efe8de953..bbf241a431f27 100644
+--- a/fs/pstore/inode.c
++++ b/fs/pstore/inode.c
+@@ -467,7 +467,7 @@ static struct dentry *pstore_mount(struct file_system_type *fs_type,
+ static void pstore_kill_sb(struct super_block *sb)
+ {
+ 	mutex_lock(&pstore_sb_lock);
+-	WARN_ON(pstore_sb != sb);
++	WARN_ON(pstore_sb && pstore_sb != sb);
+ 
+ 	kill_litter_super(sb);
+ 	pstore_sb = NULL;
+diff --git a/fs/select.c b/fs/select.c
+index 37aaa8317f3ae..945896d0ac9e7 100644
+--- a/fs/select.c
++++ b/fs/select.c
+@@ -1055,10 +1055,9 @@ static long do_restart_poll(struct restart_block *restart_block)
+ 
+ 	ret = do_sys_poll(ufds, nfds, to);
+ 
+-	if (ret == -ERESTARTNOHAND) {
+-		restart_block->fn = do_restart_poll;
+-		ret = -ERESTART_RESTARTBLOCK;
+-	}
++	if (ret == -ERESTARTNOHAND)
++		ret = set_restart_fn(restart_block, do_restart_poll);
++
+ 	return ret;
+ }
+ 
+@@ -1080,7 +1079,6 @@ SYSCALL_DEFINE3(poll, struct pollfd __user *, ufds, unsigned int, nfds,
+ 		struct restart_block *restart_block;
+ 
+ 		restart_block = &current->restart_block;
+-		restart_block->fn = do_restart_poll;
+ 		restart_block->poll.ufds = ufds;
+ 		restart_block->poll.nfds = nfds;
+ 
+@@ -1091,7 +1089,7 @@ SYSCALL_DEFINE3(poll, struct pollfd __user *, ufds, unsigned int, nfds,
+ 		} else
+ 			restart_block->poll.has_timeout = 0;
+ 
+-		ret = -ERESTART_RESTARTBLOCK;
++		ret = set_restart_fn(restart_block, do_restart_poll);
+ 	}
+ 	return ret;
+ }
+diff --git a/fs/zonefs/super.c b/fs/zonefs/super.c
+index 3fe933b1010c3..2243dc1fb48fe 100644
+--- a/fs/zonefs/super.c
++++ b/fs/zonefs/super.c
+@@ -159,6 +159,21 @@ static int zonefs_writepages(struct address_space *mapping,
+ 	return iomap_writepages(mapping, wbc, &wpc, &zonefs_writeback_ops);
+ }
+ 
++static int zonefs_swap_activate(struct swap_info_struct *sis,
++				struct file *swap_file, sector_t *span)
++{
++	struct inode *inode = file_inode(swap_file);
++	struct zonefs_inode_info *zi = ZONEFS_I(inode);
++
++	if (zi->i_ztype != ZONEFS_ZTYPE_CNV) {
++		zonefs_err(inode->i_sb,
++			   "swap file: not a conventional zone file\n");
++		return -EINVAL;
++	}
++
++	return iomap_swapfile_activate(sis, swap_file, span, &zonefs_iomap_ops);
++}
++
+ static const struct address_space_operations zonefs_file_aops = {
+ 	.readpage		= zonefs_readpage,
+ 	.readahead		= zonefs_readahead,
+@@ -171,6 +186,7 @@ static const struct address_space_operations zonefs_file_aops = {
+ 	.is_partially_uptodate	= iomap_is_partially_uptodate,
+ 	.error_remove_page	= generic_error_remove_page,
+ 	.direct_IO		= noop_direct_IO,
++	.swap_activate		= zonefs_swap_activate,
+ };
+ 
+ static void zonefs_update_stats(struct inode *inode, loff_t new_isize)
+@@ -719,6 +735,68 @@ out_release:
+ 	return ret;
+ }
+ 
++/*
++ * Do not exceed the LFS limits nor the file zone size. If pos is under the
++ * limit it becomes a short access. If it exceeds the limit, return -EFBIG.
++ */
++static loff_t zonefs_write_check_limits(struct file *file, loff_t pos,
++					loff_t count)
++{
++	struct inode *inode = file_inode(file);
++	struct zonefs_inode_info *zi = ZONEFS_I(inode);
++	loff_t limit = rlimit(RLIMIT_FSIZE);
++	loff_t max_size = zi->i_max_size;
++
++	if (limit != RLIM_INFINITY) {
++		if (pos >= limit) {
++			send_sig(SIGXFSZ, current, 0);
++			return -EFBIG;
++		}
++		count = min(count, limit - pos);
++	}
++
++	if (!(file->f_flags & O_LARGEFILE))
++		max_size = min_t(loff_t, MAX_NON_LFS, max_size);
++
++	if (unlikely(pos >= max_size))
++		return -EFBIG;
++
++	return min(count, max_size - pos);
++}
++
++static ssize_t zonefs_write_checks(struct kiocb *iocb, struct iov_iter *from)
++{
++	struct file *file = iocb->ki_filp;
++	struct inode *inode = file_inode(file);
++	struct zonefs_inode_info *zi = ZONEFS_I(inode);
++	loff_t count;
++
++	if (IS_SWAPFILE(inode))
++		return -ETXTBSY;
++
++	if (!iov_iter_count(from))
++		return 0;
++
++	if ((iocb->ki_flags & IOCB_NOWAIT) && !(iocb->ki_flags & IOCB_DIRECT))
++		return -EINVAL;
++
++	if (iocb->ki_flags & IOCB_APPEND) {
++		if (zi->i_ztype != ZONEFS_ZTYPE_SEQ)
++			return -EINVAL;
++		mutex_lock(&zi->i_truncate_mutex);
++		iocb->ki_pos = zi->i_wpoffset;
++		mutex_unlock(&zi->i_truncate_mutex);
++	}
++
++	count = zonefs_write_check_limits(file, iocb->ki_pos,
++					  iov_iter_count(from));
++	if (count < 0)
++		return count;
++
++	iov_iter_truncate(from, count);
++	return iov_iter_count(from);
++}
++
+ /*
+  * Handle direct writes. For sequential zone files, this is the only possible
+  * write path. For these files, check that the user is issuing writes
+@@ -736,8 +814,7 @@ static ssize_t zonefs_file_dio_write(struct kiocb *iocb, struct iov_iter *from)
+ 	struct super_block *sb = inode->i_sb;
+ 	bool sync = is_sync_kiocb(iocb);
+ 	bool append = false;
+-	size_t count;
+-	ssize_t ret;
++	ssize_t ret, count;
+ 
+ 	/*
+ 	 * For async direct IOs to sequential zone files, refuse IOCB_NOWAIT
+@@ -755,12 +832,11 @@ static ssize_t zonefs_file_dio_write(struct kiocb *iocb, struct iov_iter *from)
+ 		inode_lock(inode);
+ 	}
+ 
+-	ret = generic_write_checks(iocb, from);
+-	if (ret <= 0)
++	count = zonefs_write_checks(iocb, from);
++	if (count <= 0) {
++		ret = count;
+ 		goto inode_unlock;
+-
+-	iov_iter_truncate(from, zi->i_max_size - iocb->ki_pos);
+-	count = iov_iter_count(from);
++	}
+ 
+ 	if ((iocb->ki_pos | count) & (sb->s_blocksize - 1)) {
+ 		ret = -EINVAL;
+@@ -820,12 +896,10 @@ static ssize_t zonefs_file_buffered_write(struct kiocb *iocb,
+ 		inode_lock(inode);
+ 	}
+ 
+-	ret = generic_write_checks(iocb, from);
++	ret = zonefs_write_checks(iocb, from);
+ 	if (ret <= 0)
+ 		goto inode_unlock;
+ 
+-	iov_iter_truncate(from, zi->i_max_size - iocb->ki_pos);
+-
+ 	ret = iomap_file_buffered_write(iocb, from, &zonefs_iomap_ops);
+ 	if (ret > 0)
+ 		iocb->ki_pos += ret;
+@@ -958,9 +1032,7 @@ static int zonefs_open_zone(struct inode *inode)
+ 
+ 	mutex_lock(&zi->i_truncate_mutex);
+ 
+-	zi->i_wr_refcnt++;
+-	if (zi->i_wr_refcnt == 1) {
+-
++	if (!zi->i_wr_refcnt) {
+ 		if (atomic_inc_return(&sbi->s_open_zones) > sbi->s_max_open_zones) {
+ 			atomic_dec(&sbi->s_open_zones);
+ 			ret = -EBUSY;
+@@ -970,7 +1042,6 @@ static int zonefs_open_zone(struct inode *inode)
+ 		if (i_size_read(inode) < zi->i_max_size) {
+ 			ret = zonefs_zone_mgmt(inode, REQ_OP_ZONE_OPEN);
+ 			if (ret) {
+-				zi->i_wr_refcnt--;
+ 				atomic_dec(&sbi->s_open_zones);
+ 				goto unlock;
+ 			}
+@@ -978,6 +1049,8 @@ static int zonefs_open_zone(struct inode *inode)
+ 		}
+ 	}
+ 
++	zi->i_wr_refcnt++;
++
+ unlock:
+ 	mutex_unlock(&zi->i_truncate_mutex);
+ 
+diff --git a/include/linux/bpf.h b/include/linux/bpf.h
+index 642ce03f19c4c..76322b6452c80 100644
+--- a/include/linux/bpf.h
++++ b/include/linux/bpf.h
+@@ -1201,8 +1201,6 @@ struct bpf_prog * __must_check bpf_prog_inc_not_zero(struct bpf_prog *prog);
+ void bpf_prog_put(struct bpf_prog *prog);
+ int __bpf_prog_charge(struct user_struct *user, u32 pages);
+ void __bpf_prog_uncharge(struct user_struct *user, u32 pages);
+-void __bpf_free_used_maps(struct bpf_prog_aux *aux,
+-			  struct bpf_map **used_maps, u32 len);
+ 
+ void bpf_prog_free_id(struct bpf_prog *prog, bool do_idr_lock);
+ void bpf_map_free_id(struct bpf_map *map, bool do_idr_lock);
+@@ -1652,6 +1650,9 @@ static inline struct bpf_prog *bpf_prog_get_type(u32 ufd,
+ 	return bpf_prog_get_type_dev(ufd, type, false);
+ }
+ 
++void __bpf_free_used_maps(struct bpf_prog_aux *aux,
++			  struct bpf_map **used_maps, u32 len);
++
+ bool bpf_prog_get_ok(struct bpf_prog *, enum bpf_prog_type *, bool);
+ 
+ int bpf_prog_offload_compile(struct bpf_prog *prog);
+diff --git a/include/linux/efi.h b/include/linux/efi.h
+index d7c0e73af2b97..e17cd4c44f93a 100644
+--- a/include/linux/efi.h
++++ b/include/linux/efi.h
+@@ -72,8 +72,10 @@ typedef void *efi_handle_t;
+  */
+ typedef guid_t efi_guid_t __aligned(__alignof__(u32));
+ 
+-#define EFI_GUID(a,b,c,d0,d1,d2,d3,d4,d5,d6,d7) \
+-	GUID_INIT(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7)
++#define EFI_GUID(a, b, c, d...) (efi_guid_t){ {					\
++	(a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff,	\
++	(b) & 0xff, ((b) >> 8) & 0xff,						\
++	(c) & 0xff, ((c) >> 8) & 0xff, d } }
+ 
+ /*
+  * Generic EFI table header
+diff --git a/include/linux/regulator/pca9450.h b/include/linux/regulator/pca9450.h
+index 1bbd3014f9067..71902f41c9199 100644
+--- a/include/linux/regulator/pca9450.h
++++ b/include/linux/regulator/pca9450.h
+@@ -147,6 +147,9 @@ enum {
+ #define BUCK6_FPWM			0x04
+ #define BUCK6_ENMODE_MASK		0x03
+ 
++/* PCA9450_REG_BUCK123_PRESET_EN bit */
++#define BUCK123_PRESET_EN		0x80
++
+ /* PCA9450_BUCK1OUT_DVS0 bits */
+ #define BUCK1OUT_DVS0_MASK		0x7F
+ #define BUCK1OUT_DVS0_DEFAULT		0x14
+@@ -216,4 +219,11 @@ enum {
+ #define IRQ_THERM_105			0x02
+ #define IRQ_THERM_125			0x01
+ 
++/* PCA9450_REG_RESET_CTRL bits */
++#define WDOG_B_CFG_MASK			0xC0
++#define WDOG_B_CFG_NONE			0x00
++#define WDOG_B_CFG_WARM			0x40
++#define WDOG_B_CFG_COLD_LDO12		0x80
++#define WDOG_B_CFG_COLD			0xC0
++
+ #endif /* __LINUX_REG_PCA9450_H__ */
+diff --git a/include/linux/thread_info.h b/include/linux/thread_info.h
+index e93e249a4e9bf..f3040b0b4b235 100644
+--- a/include/linux/thread_info.h
++++ b/include/linux/thread_info.h
+@@ -11,6 +11,7 @@
+ #include <linux/types.h>
+ #include <linux/bug.h>
+ #include <linux/restart_block.h>
++#include <linux/errno.h>
+ 
+ #ifdef CONFIG_THREAD_INFO_IN_TASK
+ /*
+@@ -39,6 +40,18 @@ enum {
+ 
+ #ifdef __KERNEL__
+ 
++#ifndef arch_set_restart_data
++#define arch_set_restart_data(restart) do { } while (0)
++#endif
++
++static inline long set_restart_fn(struct restart_block *restart,
++					long (*fn)(struct restart_block *))
++{
++	restart->fn = fn;
++	arch_set_restart_data(restart);
++	return -ERESTART_RESTARTBLOCK;
++}
++
+ #ifndef THREAD_ALIGN
+ #define THREAD_ALIGN	THREAD_SIZE
+ #endif
+diff --git a/include/linux/usb_usual.h b/include/linux/usb_usual.h
+index 6b03fdd69d274..712363c7a2e8e 100644
+--- a/include/linux/usb_usual.h
++++ b/include/linux/usb_usual.h
+@@ -86,6 +86,8 @@
+ 		/* lies about caching, so always sync */	\
+ 	US_FLAG(NO_SAME, 0x40000000)				\
+ 		/* Cannot handle WRITE_SAME */			\
++	US_FLAG(SENSE_AFTER_SYNC, 0x80000000)			\
++		/* Do REQUEST_SENSE after SYNCHRONIZE_CACHE */	\
+ 
+ #define US_FLAG(name, value)	US_FL_##name = value ,
+ enum { US_DO_ALL_FLAGS };
+diff --git a/include/scsi/libsas.h b/include/scsi/libsas.h
+index 4e2d61e8fb1ed..e6a43163ab5b7 100644
+--- a/include/scsi/libsas.h
++++ b/include/scsi/libsas.h
+@@ -391,10 +391,6 @@ struct sas_ha_struct {
+ 	int strict_wide_ports; /* both sas_addr and attached_sas_addr must match
+ 				* their siblings when forming wide ports */
+ 
+-	/* LLDD calls these to notify the class of an event. */
+-	int (*notify_port_event)(struct asd_sas_phy *, enum port_event);
+-	int (*notify_phy_event)(struct asd_sas_phy *, enum phy_event);
+-
+ 	void *lldd_ha;		  /* not touched by sas class code */
+ 
+ 	struct list_head eh_done_q;  /* complete via scsi_eh_flush_done_q */
+@@ -706,4 +702,11 @@ struct sas_phy *sas_get_local_phy(struct domain_device *dev);
+ 
+ int sas_request_addr(struct Scsi_Host *shost, u8 *addr);
+ 
++int sas_notify_port_event(struct asd_sas_phy *phy, enum port_event event);
++int sas_notify_phy_event(struct asd_sas_phy *phy, enum phy_event event);
++int sas_notify_port_event_gfp(struct asd_sas_phy *phy, enum port_event event,
++			      gfp_t gfp_flags);
++int sas_notify_phy_event_gfp(struct asd_sas_phy *phy, enum phy_event event,
++			     gfp_t gfp_flags);
++
+ #endif /* _SASLIB_H_ */
+diff --git a/kernel/futex.c b/kernel/futex.c
+index 0693b3ea0f9a4..7cf1987cfdb4f 100644
+--- a/kernel/futex.c
++++ b/kernel/futex.c
+@@ -2730,14 +2730,13 @@ retry:
+ 		goto out;
+ 
+ 	restart = &current->restart_block;
+-	restart->fn = futex_wait_restart;
+ 	restart->futex.uaddr = uaddr;
+ 	restart->futex.val = val;
+ 	restart->futex.time = *abs_time;
+ 	restart->futex.bitset = bitset;
+ 	restart->futex.flags = flags | FLAGS_HAS_TIMEOUT;
+ 
+-	ret = -ERESTART_RESTARTBLOCK;
++	ret = set_restart_fn(restart, futex_wait_restart);
+ 
+ out:
+ 	if (to) {
+diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
+index c460e0496006e..79dc02b956dc3 100644
+--- a/kernel/irq/manage.c
++++ b/kernel/irq/manage.c
+@@ -1072,11 +1072,15 @@ irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
+ 	irqreturn_t ret;
+ 
+ 	local_bh_disable();
++	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
++		local_irq_disable();
+ 	ret = action->thread_fn(action->irq, action->dev_id);
+ 	if (ret == IRQ_HANDLED)
+ 		atomic_inc(&desc->threads_handled);
+ 
+ 	irq_finalize_oneshot(desc, action);
++	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
++		local_irq_enable();
+ 	local_bh_enable();
+ 	return ret;
+ }
+diff --git a/kernel/jump_label.c b/kernel/jump_label.c
+index 015ef903ce8cc..a0c325664190b 100644
+--- a/kernel/jump_label.c
++++ b/kernel/jump_label.c
+@@ -407,6 +407,14 @@ static bool jump_label_can_update(struct jump_entry *entry, bool init)
+ 		return false;
+ 
+ 	if (!kernel_text_address(jump_entry_code(entry))) {
++		/*
++		 * This skips patching built-in __exit, which
++		 * is part of init_section_contains() but is
++		 * not part of kernel_text_address().
++		 *
++		 * Skipping built-in __exit is fine since it
++		 * will never be executed.
++		 */
+ 		WARN_ONCE(!jump_entry_is_init(entry),
+ 			  "can't patch jump_label at %pS",
+ 			  (void *)jump_entry_code(entry));
+diff --git a/kernel/module.c b/kernel/module.c
+index 94f926473e350..908d46abe1656 100644
+--- a/kernel/module.c
++++ b/kernel/module.c
+@@ -2922,20 +2922,14 @@ static int module_sig_check(struct load_info *info, int flags)
+ 		 * enforcing, certain errors are non-fatal.
+ 		 */
+ 	case -ENODATA:
+-		reason = "Loading of unsigned module";
+-		goto decide;
++		reason = "unsigned module";
++		break;
+ 	case -ENOPKG:
+-		reason = "Loading of module with unsupported crypto";
+-		goto decide;
++		reason = "module with unsupported crypto";
++		break;
+ 	case -ENOKEY:
+-		reason = "Loading of module with unavailable key";
+-	decide:
+-		if (is_module_sig_enforced()) {
+-			pr_notice("%s: %s is rejected\n", info->name, reason);
+-			return -EKEYREJECTED;
+-		}
+-
+-		return security_locked_down(LOCKDOWN_MODULE_SIGNATURE);
++		reason = "module with unavailable key";
++		break;
+ 
+ 		/* All other errors are fatal, including nomem, unparseable
+ 		 * signatures and signature check failures - even if signatures
+@@ -2944,6 +2938,13 @@ static int module_sig_check(struct load_info *info, int flags)
+ 	default:
+ 		return err;
+ 	}
++
++	if (is_module_sig_enforced()) {
++		pr_notice("Loading of %s is rejected\n", reason);
++		return -EKEYREJECTED;
++	}
++
++	return security_locked_down(LOCKDOWN_MODULE_SIGNATURE);
+ }
+ #else /* !CONFIG_MODULE_SIG */
+ static int module_sig_check(struct load_info *info, int flags)
+@@ -2952,9 +2953,33 @@ static int module_sig_check(struct load_info *info, int flags)
+ }
+ #endif /* !CONFIG_MODULE_SIG */
+ 
+-/* Sanity checks against invalid binaries, wrong arch, weird elf version. */
+-static int elf_header_check(struct load_info *info)
++static int validate_section_offset(struct load_info *info, Elf_Shdr *shdr)
++{
++	unsigned long secend;
++
++	/*
++	 * Check for both overflow and offset/size being
++	 * too large.
++	 */
++	secend = shdr->sh_offset + shdr->sh_size;
++	if (secend < shdr->sh_offset || secend > info->len)
++		return -ENOEXEC;
++
++	return 0;
++}
++
++/*
++ * Sanity checks against invalid binaries, wrong arch, weird elf version.
++ *
++ * Also do basic validity checks against section offsets and sizes, the
++ * section name string table, and the indices used for it (sh_name).
++ */
++static int elf_validity_check(struct load_info *info)
+ {
++	unsigned int i;
++	Elf_Shdr *shdr, *strhdr;
++	int err;
++
+ 	if (info->len < sizeof(*(info->hdr)))
+ 		return -ENOEXEC;
+ 
+@@ -2964,11 +2989,78 @@ static int elf_header_check(struct load_info *info)
+ 	    || info->hdr->e_shentsize != sizeof(Elf_Shdr))
+ 		return -ENOEXEC;
+ 
++	/*
++	 * e_shnum is 16 bits, and sizeof(Elf_Shdr) is
++	 * known and small. So e_shnum * sizeof(Elf_Shdr)
++	 * will not overflow unsigned long on any platform.
++	 */
+ 	if (info->hdr->e_shoff >= info->len
+ 	    || (info->hdr->e_shnum * sizeof(Elf_Shdr) >
+ 		info->len - info->hdr->e_shoff))
+ 		return -ENOEXEC;
+ 
++	info->sechdrs = (void *)info->hdr + info->hdr->e_shoff;
++
++	/*
++	 * Verify if the section name table index is valid.
++	 */
++	if (info->hdr->e_shstrndx == SHN_UNDEF
++	    || info->hdr->e_shstrndx >= info->hdr->e_shnum)
++		return -ENOEXEC;
++
++	strhdr = &info->sechdrs[info->hdr->e_shstrndx];
++	err = validate_section_offset(info, strhdr);
++	if (err < 0)
++		return err;
++
++	/*
++	 * The section name table must be NUL-terminated, as required
++	 * by the spec. This makes strcmp and pr_* calls that access
++	 * strings in the section safe.
++	 */
++	info->secstrings = (void *)info->hdr + strhdr->sh_offset;
++	if (info->secstrings[strhdr->sh_size - 1] != '\0')
++		return -ENOEXEC;
++
++	/*
++	 * The code assumes that section 0 has a length of zero and
++	 * an addr of zero, so check for it.
++	 */
++	if (info->sechdrs[0].sh_type != SHT_NULL
++	    || info->sechdrs[0].sh_size != 0
++	    || info->sechdrs[0].sh_addr != 0)
++		return -ENOEXEC;
++
++	for (i = 1; i < info->hdr->e_shnum; i++) {
++		shdr = &info->sechdrs[i];
++		switch (shdr->sh_type) {
++		case SHT_NULL:
++		case SHT_NOBITS:
++			continue;
++		case SHT_SYMTAB:
++			if (shdr->sh_link == SHN_UNDEF
++			    || shdr->sh_link >= info->hdr->e_shnum)
++				return -ENOEXEC;
++			fallthrough;
++		default:
++			err = validate_section_offset(info, shdr);
++			if (err < 0) {
++				pr_err("Invalid ELF section in module (section %u type %u)\n",
++					i, shdr->sh_type);
++				return err;
++			}
++
++			if (shdr->sh_flags & SHF_ALLOC) {
++				if (shdr->sh_name >= strhdr->sh_size) {
++					pr_err("Invalid ELF section name in module (section %u type %u)\n",
++					       i, shdr->sh_type);
++					return -ENOEXEC;
++				}
++			}
++			break;
++		}
++	}
++
+ 	return 0;
+ }
+ 
+@@ -3070,11 +3162,6 @@ static int rewrite_section_headers(struct load_info *info, int flags)
+ 
+ 	for (i = 1; i < info->hdr->e_shnum; i++) {
+ 		Elf_Shdr *shdr = &info->sechdrs[i];
+-		if (shdr->sh_type != SHT_NOBITS
+-		    && info->len < shdr->sh_offset + shdr->sh_size) {
+-			pr_err("Module len %lu truncated\n", info->len);
+-			return -ENOEXEC;
+-		}
+ 
+ 		/* Mark all sections sh_addr with their address in the
+ 		   temporary image. */
+@@ -3106,11 +3193,6 @@ static int setup_load_info(struct load_info *info, int flags)
+ {
+ 	unsigned int i;
+ 
+-	/* Set up the convenience variables */
+-	info->sechdrs = (void *)info->hdr + info->hdr->e_shoff;
+-	info->secstrings = (void *)info->hdr
+-		+ info->sechdrs[info->hdr->e_shstrndx].sh_offset;
+-
+ 	/* Try to find a name early so we can log errors with a module name */
+ 	info->index.info = find_sec(info, ".modinfo");
+ 	if (info->index.info)
+@@ -3854,26 +3936,50 @@ static int load_module(struct load_info *info, const char __user *uargs,
+ 	long err = 0;
+ 	char *after_dashes;
+ 
+-	err = elf_header_check(info);
++	/*
++	 * Do the signature check (if any) first. All that
++	 * the signature check needs is info->len, it does
++	 * not need any of the section info. That can be
++	 * set up later. This will minimize the chances
++	 * of a corrupt module causing problems before
++	 * we even get to the signature check.
++	 *
++	 * The check will also adjust info->len by stripping
++	 * off the sig length at the end of the module, making
++	 * checks against info->len more correct.
++	 */
++	err = module_sig_check(info, flags);
++	if (err)
++		goto free_copy;
++
++	/*
++	 * Do basic sanity checks against the ELF header and
++	 * sections.
++	 */
++	err = elf_validity_check(info);
+ 	if (err) {
+-		pr_err("Module has invalid ELF header\n");
++		pr_err("Module has invalid ELF structures\n");
+ 		goto free_copy;
+ 	}
+ 
++	/*
++	 * Everything checks out, so set up the section info
++	 * in the info structure.
++	 */
+ 	err = setup_load_info(info, flags);
+ 	if (err)
+ 		goto free_copy;
+ 
++	/*
++	 * Now that we know we have the correct module name, check
++	 * if it's blacklisted.
++	 */
+ 	if (blacklisted(info->name)) {
+ 		err = -EPERM;
+ 		pr_err("Module %s is blacklisted\n", info->name);
+ 		goto free_copy;
+ 	}
+ 
+-	err = module_sig_check(info, flags);
+-	if (err)
+-		goto free_copy;
+-
+ 	err = rewrite_section_headers(info, flags);
+ 	if (err)
+ 		goto free_copy;
+diff --git a/kernel/module_signature.c b/kernel/module_signature.c
+index 4224a1086b7d8..00132d12487cd 100644
+--- a/kernel/module_signature.c
++++ b/kernel/module_signature.c
+@@ -25,7 +25,7 @@ int mod_check_sig(const struct module_signature *ms, size_t file_len,
+ 		return -EBADMSG;
+ 
+ 	if (ms->id_type != PKEY_ID_PKCS7) {
+-		pr_err("%s: Module is not signed with expected PKCS#7 message\n",
++		pr_err("%s: not signed with expected PKCS#7 message\n",
+ 		       name);
+ 		return -ENOPKG;
+ 	}
+diff --git a/kernel/module_signing.c b/kernel/module_signing.c
+index 9d9fc678c91d6..8723ae70ea1fe 100644
+--- a/kernel/module_signing.c
++++ b/kernel/module_signing.c
+@@ -30,7 +30,7 @@ int mod_verify_sig(const void *mod, struct load_info *info)
+ 
+ 	memcpy(&ms, mod + (modlen - sizeof(ms)), sizeof(ms));
+ 
+-	ret = mod_check_sig(&ms, modlen, info->name);
++	ret = mod_check_sig(&ms, modlen, "module");
+ 	if (ret)
+ 		return ret;
+ 
+diff --git a/kernel/static_call.c b/kernel/static_call.c
+index 84565c2a41b8f..db914da6e7854 100644
+--- a/kernel/static_call.c
++++ b/kernel/static_call.c
+@@ -182,7 +182,16 @@ void __static_call_update(struct static_call_key *key, void *tramp, void *func)
+ 			}
+ 
+ 			if (!kernel_text_address((unsigned long)site_addr)) {
+-				WARN_ONCE(1, "can't patch static call site at %pS",
++				/*
++				 * This skips patching built-in __exit, which
++				 * is part of init_section_contains() but is
++				 * not part of kernel_text_address().
++				 *
++				 * Skipping built-in __exit is fine since it
++				 * will never be executed.
++				 */
++				WARN_ONCE(!static_call_is_init(site),
++					  "can't patch static call site at %pS",
+ 					  site_addr);
+ 				continue;
+ 			}
+diff --git a/kernel/time/alarmtimer.c b/kernel/time/alarmtimer.c
+index f4ace1bf83828..daeaa7140d0aa 100644
+--- a/kernel/time/alarmtimer.c
++++ b/kernel/time/alarmtimer.c
+@@ -848,9 +848,9 @@ static int alarm_timer_nsleep(const clockid_t which_clock, int flags,
+ 	if (flags == TIMER_ABSTIME)
+ 		return -ERESTARTNOHAND;
+ 
+-	restart->fn = alarm_timer_nsleep_restart;
+ 	restart->nanosleep.clockid = type;
+ 	restart->nanosleep.expires = exp;
++	set_restart_fn(restart, alarm_timer_nsleep_restart);
+ 	return ret;
+ }
+ 
+diff --git a/kernel/time/hrtimer.c b/kernel/time/hrtimer.c
+index 4416f5d72c11e..9505b1f21cdf8 100644
+--- a/kernel/time/hrtimer.c
++++ b/kernel/time/hrtimer.c
+@@ -1957,9 +1957,9 @@ long hrtimer_nanosleep(ktime_t rqtp, const enum hrtimer_mode mode,
+ 	}
+ 
+ 	restart = &current->restart_block;
+-	restart->fn = hrtimer_nanosleep_restart;
+ 	restart->nanosleep.clockid = t.timer.base->clockid;
+ 	restart->nanosleep.expires = hrtimer_get_expires_tv64(&t.timer);
++	set_restart_fn(restart, hrtimer_nanosleep_restart);
+ out:
+ 	destroy_hrtimer_on_stack(&t.timer);
+ 	return ret;
+diff --git a/kernel/time/posix-cpu-timers.c b/kernel/time/posix-cpu-timers.c
+index a71758e34e456..9abe15255bc4e 100644
+--- a/kernel/time/posix-cpu-timers.c
++++ b/kernel/time/posix-cpu-timers.c
+@@ -1480,8 +1480,8 @@ static int posix_cpu_nsleep(const clockid_t which_clock, int flags,
+ 		if (flags & TIMER_ABSTIME)
+ 			return -ERESTARTNOHAND;
+ 
+-		restart_block->fn = posix_cpu_nsleep_restart;
+ 		restart_block->nanosleep.clockid = which_clock;
++		set_restart_fn(restart_block, posix_cpu_nsleep_restart);
+ 	}
+ 	return error;
+ }
+diff --git a/net/qrtr/qrtr.c b/net/qrtr/qrtr.c
+index 38de24af24c44..54031ee079a2c 100644
+--- a/net/qrtr/qrtr.c
++++ b/net/qrtr/qrtr.c
+@@ -433,7 +433,7 @@ int qrtr_endpoint_post(struct qrtr_endpoint *ep, const void *data, size_t len)
+ 	if (len == 0 || len & 3)
+ 		return -EINVAL;
+ 
+-	skb = netdev_alloc_skb(NULL, len);
++	skb = __netdev_alloc_skb(NULL, len, GFP_ATOMIC | __GFP_NOWARN);
+ 	if (!skb)
+ 		return -ENOMEM;
+ 
+diff --git a/net/sunrpc/svc.c b/net/sunrpc/svc.c
+index c211b607239ed..d38788cd9433a 100644
+--- a/net/sunrpc/svc.c
++++ b/net/sunrpc/svc.c
+@@ -1408,7 +1408,7 @@ svc_process_common(struct svc_rqst *rqstp, struct kvec *argv, struct kvec *resv)
+ 
+  sendit:
+ 	if (svc_authorise(rqstp))
+-		goto close;
++		goto close_xprt;
+ 	return 1;		/* Caller can now send it */
+ 
+ release_dropit:
+@@ -1420,6 +1420,8 @@ release_dropit:
+ 	return 0;
+ 
+  close:
++	svc_authorise(rqstp);
++close_xprt:
+ 	if (rqstp->rq_xprt && test_bit(XPT_TEMP, &rqstp->rq_xprt->xpt_flags))
+ 		svc_close_xprt(rqstp->rq_xprt);
+ 	dprintk("svc: svc_process close\n");
+@@ -1428,7 +1430,7 @@ release_dropit:
+ err_short_len:
+ 	svc_printk(rqstp, "short len %zd, dropping request\n",
+ 			argv->iov_len);
+-	goto close;
++	goto close_xprt;
+ 
+ err_bad_rpc:
+ 	serv->sv_stats->rpcbadfmt++;
+diff --git a/net/sunrpc/svc_xprt.c b/net/sunrpc/svc_xprt.c
+index 43cf8dbde898b..06e503466c32c 100644
+--- a/net/sunrpc/svc_xprt.c
++++ b/net/sunrpc/svc_xprt.c
+@@ -1062,7 +1062,7 @@ static int svc_close_list(struct svc_serv *serv, struct list_head *xprt_list, st
+ 	struct svc_xprt *xprt;
+ 	int ret = 0;
+ 
+-	spin_lock(&serv->sv_lock);
++	spin_lock_bh(&serv->sv_lock);
+ 	list_for_each_entry(xprt, xprt_list, xpt_list) {
+ 		if (xprt->xpt_net != net)
+ 			continue;
+@@ -1070,7 +1070,7 @@ static int svc_close_list(struct svc_serv *serv, struct list_head *xprt_list, st
+ 		set_bit(XPT_CLOSE, &xprt->xpt_flags);
+ 		svc_xprt_enqueue(xprt);
+ 	}
+-	spin_unlock(&serv->sv_lock);
++	spin_unlock_bh(&serv->sv_lock);
+ 	return ret;
+ }
+ 
+diff --git a/net/sunrpc/xprtrdma/svc_rdma_backchannel.c b/net/sunrpc/xprtrdma/svc_rdma_backchannel.c
+index 5e7c4ba9e1476..c5154bc38e129 100644
+--- a/net/sunrpc/xprtrdma/svc_rdma_backchannel.c
++++ b/net/sunrpc/xprtrdma/svc_rdma_backchannel.c
+@@ -246,9 +246,9 @@ xprt_setup_rdma_bc(struct xprt_create *args)
+ 	xprt->timeout = &xprt_rdma_bc_timeout;
+ 	xprt_set_bound(xprt);
+ 	xprt_set_connected(xprt);
+-	xprt->bind_timeout = RPCRDMA_BIND_TO;
+-	xprt->reestablish_timeout = RPCRDMA_INIT_REEST_TO;
+-	xprt->idle_timeout = RPCRDMA_IDLE_DISC_TO;
++	xprt->bind_timeout = 0;
++	xprt->reestablish_timeout = 0;
++	xprt->idle_timeout = 0;
+ 
+ 	xprt->prot = XPRT_TRANSPORT_BC_RDMA;
+ 	xprt->ops = &xprt_rdma_bc_procs;
+diff --git a/sound/firewire/dice/dice-stream.c b/sound/firewire/dice/dice-stream.c
+index 8e0c0380b4c4b..1a14c083e8cea 100644
+--- a/sound/firewire/dice/dice-stream.c
++++ b/sound/firewire/dice/dice-stream.c
+@@ -493,11 +493,10 @@ void snd_dice_stream_stop_duplex(struct snd_dice *dice)
+ 	struct reg_params tx_params, rx_params;
+ 
+ 	if (dice->substreams_counter == 0) {
+-		if (get_register_params(dice, &tx_params, &rx_params) >= 0) {
+-			amdtp_domain_stop(&dice->domain);
++		if (get_register_params(dice, &tx_params, &rx_params) >= 0)
+ 			finish_session(dice, &tx_params, &rx_params);
+-		}
+ 
++		amdtp_domain_stop(&dice->domain);
+ 		release_resources(dice);
+ 	}
+ }
+diff --git a/sound/pci/hda/hda_generic.c b/sound/pci/hda/hda_generic.c
+index 8060cc86dfea3..96903295a9677 100644
+--- a/sound/pci/hda/hda_generic.c
++++ b/sound/pci/hda/hda_generic.c
+@@ -4065,7 +4065,7 @@ static int add_micmute_led_hook(struct hda_codec *codec)
+ 
+ 	spec->micmute_led.led_mode = MICMUTE_LED_FOLLOW_MUTE;
+ 	spec->micmute_led.capture = 0;
+-	spec->micmute_led.led_value = 0;
++	spec->micmute_led.led_value = -1;
+ 	spec->micmute_led.old_hook = spec->cap_sync_hook;
+ 	spec->cap_sync_hook = update_micmute_led;
+ 	if (!snd_hda_gen_add_kctl(spec, NULL, &micmute_led_mode_ctl))
+diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
+index b47504fa8dfd0..316b9b4ccb32d 100644
+--- a/sound/pci/hda/patch_realtek.c
++++ b/sound/pci/hda/patch_realtek.c
+@@ -4225,6 +4225,12 @@ static void alc_fixup_hp_gpio_led(struct hda_codec *codec,
+ 	}
+ }
+ 
++static void alc236_fixup_hp_gpio_led(struct hda_codec *codec,
++				const struct hda_fixup *fix, int action)
++{
++	alc_fixup_hp_gpio_led(codec, action, 0x02, 0x01);
++}
++
+ static void alc269_fixup_hp_gpio_led(struct hda_codec *codec,
+ 				const struct hda_fixup *fix, int action)
+ {
+@@ -6381,6 +6387,7 @@ enum {
+ 	ALC294_FIXUP_ASUS_GX502_VERBS,
+ 	ALC285_FIXUP_HP_GPIO_LED,
+ 	ALC285_FIXUP_HP_MUTE_LED,
++	ALC236_FIXUP_HP_GPIO_LED,
+ 	ALC236_FIXUP_HP_MUTE_LED,
+ 	ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET,
+ 	ALC295_FIXUP_ASUS_MIC_NO_PRESENCE,
+@@ -7616,6 +7623,10 @@ static const struct hda_fixup alc269_fixups[] = {
+ 		.type = HDA_FIXUP_FUNC,
+ 		.v.func = alc285_fixup_hp_mute_led,
+ 	},
++	[ALC236_FIXUP_HP_GPIO_LED] = {
++		.type = HDA_FIXUP_FUNC,
++		.v.func = alc236_fixup_hp_gpio_led,
++	},
+ 	[ALC236_FIXUP_HP_MUTE_LED] = {
+ 		.type = HDA_FIXUP_FUNC,
+ 		.v.func = alc236_fixup_hp_mute_led,
+@@ -8045,9 +8056,12 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
+ 	SND_PCI_QUIRK(0x103c, 0x8783, "HP ZBook Fury 15 G7 Mobile Workstation",
+ 		      ALC285_FIXUP_HP_GPIO_AMP_INIT),
+ 	SND_PCI_QUIRK(0x103c, 0x87c8, "HP", ALC287_FIXUP_HP_GPIO_LED),
++	SND_PCI_QUIRK(0x103c, 0x87e5, "HP ProBook 440 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED),
+ 	SND_PCI_QUIRK(0x103c, 0x87f4, "HP", ALC287_FIXUP_HP_GPIO_LED),
+ 	SND_PCI_QUIRK(0x103c, 0x87f5, "HP", ALC287_FIXUP_HP_GPIO_LED),
+ 	SND_PCI_QUIRK(0x103c, 0x87f7, "HP Spectre x360 14", ALC245_FIXUP_HP_X360_AMP),
++	SND_PCI_QUIRK(0x103c, 0x8846, "HP EliteBook 850 G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED),
++	SND_PCI_QUIRK(0x103c, 0x884c, "HP EliteBook 840 G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED),
+ 	SND_PCI_QUIRK(0x1043, 0x103e, "ASUS X540SA", ALC256_FIXUP_ASUS_MIC),
+ 	SND_PCI_QUIRK(0x1043, 0x103f, "ASUS TX300", ALC282_FIXUP_ASUS_TX300),
+ 	SND_PCI_QUIRK(0x1043, 0x106d, "Asus K53BE", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
+@@ -8242,7 +8256,9 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
+ 	SND_PCI_QUIRK(0x1b35, 0x1237, "CZC L101", ALC269_FIXUP_CZC_L101),
+ 	SND_PCI_QUIRK(0x1b7d, 0xa831, "Ordissimo EVE2 ", ALC269VB_FIXUP_ORDISSIMO_EVE2), /* Also known as Malata PC-B1303 */
+ 	SND_PCI_QUIRK(0x1d72, 0x1602, "RedmiBook", ALC255_FIXUP_XIAOMI_HEADSET_MIC),
++	SND_PCI_QUIRK(0x1d72, 0x1701, "XiaomiNotebook Pro", ALC298_FIXUP_DELL1_MIC_NO_PRESENCE),
+ 	SND_PCI_QUIRK(0x1d72, 0x1901, "RedmiBook 14", ALC256_FIXUP_ASUS_HEADSET_MIC),
++	SND_PCI_QUIRK(0x1d72, 0x1947, "RedmiBook Air", ALC255_FIXUP_XIAOMI_HEADSET_MIC),
+ 	SND_PCI_QUIRK(0x10ec, 0x118c, "Medion EE4254 MD62100", ALC256_FIXUP_MEDION_HEADSET_NO_PRESENCE),
+ 	SND_PCI_QUIRK(0x1c06, 0x2013, "Lemote A1802", ALC269_FIXUP_LEMOTE_A1802),
+ 	SND_PCI_QUIRK(0x1c06, 0x2015, "Lemote A190X", ALC269_FIXUP_LEMOTE_A190X),
+diff --git a/sound/soc/codecs/ak4458.c b/sound/soc/codecs/ak4458.c
+index 472caad17012e..85a1d00894a9c 100644
+--- a/sound/soc/codecs/ak4458.c
++++ b/sound/soc/codecs/ak4458.c
+@@ -812,6 +812,7 @@ static const struct of_device_id ak4458_of_match[] = {
+ 	{ .compatible = "asahi-kasei,ak4497", .data = &ak4497_drvdata},
+ 	{ },
+ };
++MODULE_DEVICE_TABLE(of, ak4458_of_match);
+ 
+ static struct i2c_driver ak4458_i2c_driver = {
+ 	.driver = {
+diff --git a/sound/soc/codecs/ak5558.c b/sound/soc/codecs/ak5558.c
+index 2f076d5ee284d..65a248c92f669 100644
+--- a/sound/soc/codecs/ak5558.c
++++ b/sound/soc/codecs/ak5558.c
+@@ -419,6 +419,7 @@ static const struct of_device_id ak5558_i2c_dt_ids[] = {
+ 	{ .compatible = "asahi-kasei,ak5558"},
+ 	{ }
+ };
++MODULE_DEVICE_TABLE(of, ak5558_i2c_dt_ids);
+ 
+ static struct i2c_driver ak5558_i2c_driver = {
+ 	.driver = {
+diff --git a/sound/soc/codecs/wcd934x.c b/sound/soc/codecs/wcd934x.c
+index 40f682f5dab8b..d18ae5e3ee809 100644
+--- a/sound/soc/codecs/wcd934x.c
++++ b/sound/soc/codecs/wcd934x.c
+@@ -1873,6 +1873,12 @@ static int wcd934x_set_channel_map(struct snd_soc_dai *dai,
+ 
+ 	wcd = snd_soc_component_get_drvdata(dai->component);
+ 
++	if (tx_num > WCD934X_TX_MAX || rx_num > WCD934X_RX_MAX) {
++		dev_err(wcd->dev, "Invalid tx %d or rx %d channel count\n",
++			tx_num, rx_num);
++		return -EINVAL;
++	}
++
+ 	if (!tx_slot || !rx_slot) {
+ 		dev_err(wcd->dev, "Invalid tx_slot=%p, rx_slot=%p\n",
+ 			tx_slot, rx_slot);
+diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
+index 404be27c15fed..1d774c876c52e 100644
+--- a/sound/soc/fsl/fsl_ssi.c
++++ b/sound/soc/fsl/fsl_ssi.c
+@@ -878,6 +878,7 @@ static int fsl_ssi_hw_free(struct snd_pcm_substream *substream,
+ static int _fsl_ssi_set_dai_fmt(struct fsl_ssi *ssi, unsigned int fmt)
+ {
+ 	u32 strcr = 0, scr = 0, stcr, srcr, mask;
++	unsigned int slots;
+ 
+ 	ssi->dai_fmt = fmt;
+ 
+@@ -909,10 +910,11 @@ static int _fsl_ssi_set_dai_fmt(struct fsl_ssi *ssi, unsigned int fmt)
+ 			return -EINVAL;
+ 		}
+ 
++		slots = ssi->slots ? : 2;
+ 		regmap_update_bits(ssi->regs, REG_SSI_STCCR,
+-				   SSI_SxCCR_DC_MASK, SSI_SxCCR_DC(2));
++				   SSI_SxCCR_DC_MASK, SSI_SxCCR_DC(slots));
+ 		regmap_update_bits(ssi->regs, REG_SSI_SRCCR,
+-				   SSI_SxCCR_DC_MASK, SSI_SxCCR_DC(2));
++				   SSI_SxCCR_DC_MASK, SSI_SxCCR_DC(slots));
+ 
+ 		/* Data on rising edge of bclk, frame low, 1clk before data */
+ 		strcr |= SSI_STCR_TFSI | SSI_STCR_TSCKP | SSI_STCR_TEFS;
+diff --git a/sound/soc/generic/simple-card-utils.c b/sound/soc/generic/simple-card-utils.c
+index ab31045cfc952..6cada4c1e283b 100644
+--- a/sound/soc/generic/simple-card-utils.c
++++ b/sound/soc/generic/simple-card-utils.c
+@@ -172,15 +172,16 @@ int asoc_simple_parse_clk(struct device *dev,
+ 	 *  or device's module clock.
+ 	 */
+ 	clk = devm_get_clk_from_child(dev, node, NULL);
+-	if (IS_ERR(clk))
+-		clk = devm_get_clk_from_child(dev, dlc->of_node, NULL);
+-
+ 	if (!IS_ERR(clk)) {
+-		simple_dai->clk = clk;
+ 		simple_dai->sysclk = clk_get_rate(clk);
+-	} else if (!of_property_read_u32(node, "system-clock-frequency",
+-					 &val)) {
++
++		simple_dai->clk = clk;
++	} else if (!of_property_read_u32(node, "system-clock-frequency", &val)) {
+ 		simple_dai->sysclk = val;
++	} else {
++		clk = devm_get_clk_from_child(dev, dlc->of_node, NULL);
++		if (!IS_ERR(clk))
++			simple_dai->sysclk = clk_get_rate(clk);
+ 	}
+ 
+ 	if (of_property_read_bool(node, "system-clock-direction-out"))
+diff --git a/sound/soc/intel/boards/bytcr_rt5640.c b/sound/soc/intel/boards/bytcr_rt5640.c
+index d56db9f34373e..d5812e73eb63f 100644
+--- a/sound/soc/intel/boards/bytcr_rt5640.c
++++ b/sound/soc/intel/boards/bytcr_rt5640.c
+@@ -577,7 +577,7 @@ static const struct dmi_system_id byt_rt5640_quirk_table[] = {
+ 		},
+ 		.driver_data = (void *)(BYT_RT5640_DMIC1_MAP |
+ 					BYT_RT5640_JD_SRC_JD1_IN4P |
+-					BYT_RT5640_OVCD_TH_1500UA |
++					BYT_RT5640_OVCD_TH_2000UA |
+ 					BYT_RT5640_OVCD_SF_0P75 |
+ 					BYT_RT5640_MCLK_EN),
+ 	},
+diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c
+index 3ddd32fd3a44b..4fb2ec7c8867b 100644
+--- a/sound/soc/qcom/lpass-cpu.c
++++ b/sound/soc/qcom/lpass-cpu.c
+@@ -737,7 +737,7 @@ static void of_lpass_cpu_parse_dai_data(struct device *dev,
+ 
+ 	for_each_child_of_node(dev->of_node, node) {
+ 		ret = of_property_read_u32(node, "reg", &id);
+-		if (ret || id < 0 || id >= data->variant->num_dai) {
++		if (ret || id < 0) {
+ 			dev_err(dev, "valid dai id not found: %d\n", ret);
+ 			continue;
+ 		}
+diff --git a/sound/soc/qcom/sdm845.c b/sound/soc/qcom/sdm845.c
+index 6c2760e27ea6f..153e9b2de0b53 100644
+--- a/sound/soc/qcom/sdm845.c
++++ b/sound/soc/qcom/sdm845.c
+@@ -27,18 +27,18 @@
+ #define SPK_TDM_RX_MASK         0x03
+ #define NUM_TDM_SLOTS           8
+ #define SLIM_MAX_TX_PORTS 16
+-#define SLIM_MAX_RX_PORTS 16
++#define SLIM_MAX_RX_PORTS 13
+ #define WCD934X_DEFAULT_MCLK_RATE	9600000
+ 
+ struct sdm845_snd_data {
+ 	struct snd_soc_jack jack;
+ 	bool jack_setup;
+-	bool stream_prepared[SLIM_MAX_RX_PORTS];
++	bool stream_prepared[AFE_PORT_MAX];
+ 	struct snd_soc_card *card;
+ 	uint32_t pri_mi2s_clk_count;
+ 	uint32_t sec_mi2s_clk_count;
+ 	uint32_t quat_tdm_clk_count;
+-	struct sdw_stream_runtime *sruntime[SLIM_MAX_RX_PORTS];
++	struct sdw_stream_runtime *sruntime[AFE_PORT_MAX];
+ };
+ 
+ static unsigned int tdm_slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
+diff --git a/sound/soc/sof/intel/hda-dsp.c b/sound/soc/sof/intel/hda-dsp.c
+index cd324f3d11d17..c731b9bd60b4c 100644
+--- a/sound/soc/sof/intel/hda-dsp.c
++++ b/sound/soc/sof/intel/hda-dsp.c
+@@ -207,7 +207,7 @@ int hda_dsp_core_power_down(struct snd_sof_dev *sdev, unsigned int core_mask)
+ 
+ 	ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR,
+ 				HDA_DSP_REG_ADSPCS, adspcs,
+-				!(adspcs & HDA_DSP_ADSPCS_SPA_MASK(core_mask)),
++				!(adspcs & HDA_DSP_ADSPCS_CPA_MASK(core_mask)),
+ 				HDA_DSP_REG_POLL_INTERVAL_US,
+ 				HDA_DSP_PD_TIMEOUT * USEC_PER_MSEC);
+ 	if (ret < 0)
+diff --git a/sound/soc/sof/intel/hda.c b/sound/soc/sof/intel/hda.c
+index bb4128a72a42f..b0faf050132d8 100644
+--- a/sound/soc/sof/intel/hda.c
++++ b/sound/soc/sof/intel/hda.c
+@@ -898,6 +898,7 @@ free_streams:
+ /* dsp_unmap: not currently used */
+ 	iounmap(sdev->bar[HDA_DSP_BAR]);
+ hdac_bus_unmap:
++	platform_device_unregister(hdev->dmic_dev);
+ 	iounmap(bus->remap_addr);
+ 	hda_codec_i915_exit(sdev);
+ err:
+diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c
+index 448de77f43fd8..5171b3dc1eb9e 100644
+--- a/sound/usb/mixer_quirks.c
++++ b/sound/usb/mixer_quirks.c
+@@ -2883,7 +2883,7 @@ static int snd_djm_controls_put(struct snd_kcontrol *kctl, struct snd_ctl_elem_v
+ 	u8 group = (private_value & SND_DJM_GROUP_MASK) >> SND_DJM_GROUP_SHIFT;
+ 	u16 value = elem->value.enumerated.item[0];
+ 
+-	kctl->private_value = ((device << SND_DJM_DEVICE_SHIFT) |
++	kctl->private_value = (((unsigned long)device << SND_DJM_DEVICE_SHIFT) |
+ 			      (group << SND_DJM_GROUP_SHIFT) |
+ 			      value);
+ 
+@@ -2921,7 +2921,7 @@ static int snd_djm_controls_create(struct usb_mixer_interface *mixer,
+ 		value = device->controls[i].default_value;
+ 		knew.name = device->controls[i].name;
+ 		knew.private_value = (
+-			(device_idx << SND_DJM_DEVICE_SHIFT) |
++			((unsigned long)device_idx << SND_DJM_DEVICE_SHIFT) |
+ 			(i << SND_DJM_GROUP_SHIFT) |
+ 			value);
+ 		err = snd_djm_controls_update(mixer, device_idx, i, value);