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-rw-r--r--app-emulation/spike/Manifest1
-rw-r--r--app-emulation/spike/metadata.xml17
-rw-r--r--app-emulation/spike/spike-1.0.0.ebuild25
-rw-r--r--app-emulation/spike/spike-9999.ebuild21
4 files changed, 64 insertions, 0 deletions
diff --git a/app-emulation/spike/Manifest b/app-emulation/spike/Manifest
new file mode 100644
index 0000000..5a0d0a6
--- /dev/null
+++ b/app-emulation/spike/Manifest
@@ -0,0 +1 @@
+DIST spike-1.0.0.tar.gz 283500 BLAKE2B a25f5faad1fa76e131f2477c5c103a738a0a5c6a4bec0a147d9233acc3e9ef60d52621e83d54e4025fa50ab402a294564cfdf4244651c14dd1b852fe3d16becf SHA512 e5755fc2bb38d5cb11d340f612f82207f6f77599b4cd38206c70cdb211f43108694ce2807822bccb77de308bb78b60a23978de972c2c8394601712ff1153267c
diff --git a/app-emulation/spike/metadata.xml b/app-emulation/spike/metadata.xml
new file mode 100644
index 0000000..e806b9b
--- /dev/null
+++ b/app-emulation/spike/metadata.xml
@@ -0,0 +1,17 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!DOCTYPE pkgmetadata SYSTEM "http://www.gentoo.org/dtd/metadata.dtd">
+<pkgmetadata>
+ <longdescription>
+ Spike, the RISC-V ISA Simulator, implements a functional model of
+ one or more RISC-V harts. It is named after the golden spike used to
+ celebrate the completion of the US transcontinental railway.
+ </longdescription>
+ <maintainer type="person">
+ <email>dlan@gentoo.org</email>
+ <name>Yixun Lan</name>
+ </maintainer>
+ <stabilize-allarches/>
+ <upstream>
+ <remote-id type="github">riscv/riscv-isa-sim</remote-id>
+ </upstream>
+</pkgmetadata>
diff --git a/app-emulation/spike/spike-1.0.0.ebuild b/app-emulation/spike/spike-1.0.0.ebuild
new file mode 100644
index 0000000..7da7a73
--- /dev/null
+++ b/app-emulation/spike/spike-1.0.0.ebuild
@@ -0,0 +1,25 @@
+# Copyright 2021 Gentoo Authors
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI="7"
+inherit eutils autotools
+
+DESCRIPTION="The RISC-V ISA Simulator"
+HOMEPAGE="https://github.com/riscv/riscv-isa-sim/"
+SRC_URI="https://github.com/riscv/riscv-isa-sim/archive/refs/tags/v${PV}.tar.gz -> ${P}.tar.gz"
+
+LICENSE="BSD"
+SLOT="0/${PV}"
+KEYWORDS="~amd64"
+IUSE=""
+
+DEPEND=""
+
+S="${WORKDIR}/riscv-isa-sim-${PV}"
+src_prepare() {
+ default
+ sed -i -e "/install_libs_dir/s:/lib:/$(get_libdir):g" Makefile.in || die
+ sed -i -e "/<string/a#include <stdexcept>" \
+ fesvr/dtm.cc riscv/devices.h || die
+ eautoreconf
+}
diff --git a/app-emulation/spike/spike-9999.ebuild b/app-emulation/spike/spike-9999.ebuild
new file mode 100644
index 0000000..31faa2b
--- /dev/null
+++ b/app-emulation/spike/spike-9999.ebuild
@@ -0,0 +1,21 @@
+# Copyright 2021 Gentoo Authors
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI="7"
+inherit eutils autotools git-r3 multilib
+
+DESCRIPTION="The RISC-V ISA Simulator"
+HOMEPAGE="https://github.com/riscv/riscv-isa-sim/"
+EGIT_REPO_URI="https://github.com/riscv/riscv-isa-sim"
+
+LICENSE="BSD"
+SLOT="0/${PV}"
+IUSE=""
+
+DEPEND=""
+
+src_prepare() {
+ default
+ sed -i -e "/install_libs_dir/s:/lib:/$(get_libdir):g" Makefile.in || die
+ eautoreconf
+}