From cfd93d768e79a349f1e762b92773190295c36980 Mon Sep 17 00:00:00 2001
From: Michał Górny <mgorny@gentoo.org>
Date: Sun, 24 Jan 2016 23:32:36 +0100
Subject: Replace all herds with appropriate projects (GLEP 67)

Replace all uses of herd with appropriate project maintainers, or no
maintainers in case of herds requested to be disbanded.
---
 sci-electronics/iverilog/metadata.xml | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

(limited to 'sci-electronics/iverilog')

diff --git a/sci-electronics/iverilog/metadata.xml b/sci-electronics/iverilog/metadata.xml
index ceafe325f3ef..c1e3fe335633 100644
--- a/sci-electronics/iverilog/metadata.xml
+++ b/sci-electronics/iverilog/metadata.xml
@@ -1,7 +1,10 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <!DOCTYPE pkgmetadata SYSTEM "http://www.gentoo.org/dtd/metadata.dtd">
 <pkgmetadata>
-  <herd>sci-electronics</herd>
+  <maintainer>
+    <email>sci-electronics@gentoo.org</email>
+    <name>Gentoo Electronics Project</name>
+  </maintainer>
   <longdescription>
   Icarus Verilog is a Verilog simulation and synthesis tool. It operates as a
   compiler, compiling source code writen in Verilog (IEEE-1364) into some target
-- 
cgit v1.2.3-18-g5258