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authorAndreas K. Hüttel <dilfridge@gentoo.org>2021-01-23 17:39:59 +0200
committerAndreas K. Hüttel <dilfridge@gentoo.org>2021-01-23 23:19:59 +0200
commitffaa2be2507fd3c637500425db86bc3d62df017f (patch)
tree0632a0c9e4cca3771b84a2bea9584367c20a65f8
parentFix typo reported via email. (diff)
downloadwww-ffaa2be2507fd3c637500425db86bc3d62df017f.tar.gz
www-ffaa2be2507fd3c637500425db86bc3d62df017f.tar.bz2
www-ffaa2be2507fd3c637500425db86bc3d62df017f.zip
Add riscv download links
Signed-off-by: Andreas K. Hüttel <dilfridge@gentoo.org>
-rw-r--r--_includes/downloads/riscv.html30
-rw-r--r--downloads/index.html7
2 files changed, 37 insertions, 0 deletions
diff --git a/_includes/downloads/riscv.html b/_includes/downloads/riscv.html
new file mode 100644
index 0000000..18ebf24
--- /dev/null
+++ b/_includes/downloads/riscv.html
@@ -0,0 +1,30 @@
+<div class="col-xs-12 col-md-6">
+<h4>Stage archives (~riscv)</h4>
+<div class="list-group">
+ {% include partials/download-link.html type="stage3" arch="riscv" id="rv64_lp64d" title="Stage 3" tag="lp64d | openrc" %}
+ {% include partials/download-link.html type="stage3" arch="riscv" id="rv64_lp64d-systemd" title="Stage 3" tag="lp64d | systemd" %}
+ {% include partials/download-link.html type="stage3" arch="riscv" id="rv64_lp64" title="Stage 3" tag="lp64 | openrc" %}
+ {% include partials/download-link.html type="stage3" arch="riscv" id="rv64_lp64-systemd" title="Stage 3" tag="lp64 | systemd" %}
+</div>
+
+<h4>Details (contents, hashes, and signatures)</h4>
+<p>
+ <a href="https://bouncer.gentoo.org/fetch/root/all/releases/riscv/autobuilds/current-stage3-rv64_lp64d/">Stage 3</a>
+</p>
+</div>
+
+<div class="col-xs-12 col-md-6">
+<h4>Hardware compatibility</h4>
+ <div class="alert alert-info">
+ <strong><span class="fa fa-fw fa-info-circle"></span> Processor compatibility</strong>
+ <p>
+ The <em>lp64d</em> stages can be used on all 64-bit RISC-V processors supporting the <strong>double-precision floating point</strong> instruction set.
+ The <em>lp64</em> stages can be used on all 64-bit RISC-V processors; they require no hardware support for floating point arithmetics.
+ </p>
+ </div>
+ <p>
+ For an overview of the different instruction sets, see, e.g., the <a href="https://en.wikipedia.org/wiki/RISC-V" target="_blank">RISC-V wikipedia page</a>.
+ </p>
+ <p>
+ Additional Gentoo-specific information can be found on the web page of the <a href="https://wiki.gentoo.org/wiki/Project:RISC-V">Gentoo RISC-V project</a>.
+</div>
diff --git a/downloads/index.html b/downloads/index.html
index 3d47969..967b3cf 100644
--- a/downloads/index.html
+++ b/downloads/index.html
@@ -61,6 +61,7 @@ inlinejs: "$(function() { $('#other-arches a:first').tab('show'); });"
<li><a href="#hppa" data-toggle="tab"><strong>hppa</strong></a></li>
<li><a href="#ia64" data-toggle="tab"><strong>ia64</strong></a></li>
<li><a href="#ppc" data-toggle="tab"><strong>ppc</strong></a></li>
+ <li><a href="#riscv" data-toggle="tab"><strong>riscv</strong></a></li>
<li><a href="#sparc" data-toggle="tab"><strong>sparc</strong></a></li>
<li><a href="#experimental" data-toggle="tab"><strong>(experimental)</strong></a></li>
</ul>
@@ -114,6 +115,12 @@ inlinejs: "$(function() { $('#other-arches a:first').tab('show'); });"
{% include downloads/ppc.html %}
</div>
</div>
+ <div class="tab-pane active" id="riscv">
+ <h3>riscv</h3>
+ <div class="row">
+ {% include downloads/riscv.html %}
+ </div>
+ </div>
<div class="tab-pane active" id="sparc">
<h3>sparc</h3>
<div class="row">