From ffaa2be2507fd3c637500425db86bc3d62df017f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20K=2E=20H=C3=BCttel?= Date: Sat, 23 Jan 2021 17:39:59 +0200 Subject: Add riscv download links MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas K. Hüttel --- _includes/downloads/riscv.html | 30 ++++++++++++++++++++++++++++++ downloads/index.html | 7 +++++++ 2 files changed, 37 insertions(+) create mode 100644 _includes/downloads/riscv.html diff --git a/_includes/downloads/riscv.html b/_includes/downloads/riscv.html new file mode 100644 index 0000000..18ebf24 --- /dev/null +++ b/_includes/downloads/riscv.html @@ -0,0 +1,30 @@ +
+

Stage archives (~riscv)

+
+ {% include partials/download-link.html type="stage3" arch="riscv" id="rv64_lp64d" title="Stage 3" tag="lp64d | openrc" %} + {% include partials/download-link.html type="stage3" arch="riscv" id="rv64_lp64d-systemd" title="Stage 3" tag="lp64d | systemd" %} + {% include partials/download-link.html type="stage3" arch="riscv" id="rv64_lp64" title="Stage 3" tag="lp64 | openrc" %} + {% include partials/download-link.html type="stage3" arch="riscv" id="rv64_lp64-systemd" title="Stage 3" tag="lp64 | systemd" %} +
+ +

Details (contents, hashes, and signatures)

+

+ Stage 3 +

+
+ +
+

Hardware compatibility

+
+ Processor compatibility +

+ The lp64d stages can be used on all 64-bit RISC-V processors supporting the double-precision floating point instruction set. + The lp64 stages can be used on all 64-bit RISC-V processors; they require no hardware support for floating point arithmetics. +

+
+

+ For an overview of the different instruction sets, see, e.g., the RISC-V wikipedia page. +

+

+ Additional Gentoo-specific information can be found on the web page of the Gentoo RISC-V project. +

diff --git a/downloads/index.html b/downloads/index.html index 3d47969..967b3cf 100644 --- a/downloads/index.html +++ b/downloads/index.html @@ -61,6 +61,7 @@ inlinejs: "$(function() { $('#other-arches a:first').tab('show'); });"
  • hppa
  • ia64
  • ppc
    • +
  • riscv
  • sparc
  • (experimental)
    • @@ -114,6 +115,12 @@ inlinejs: "$(function() { $('#other-arches a:first').tab('show'); });" {% include downloads/ppc.html %} +
    +

    riscv

    +
    + {% include downloads/riscv.html %} +
    +

    sparc

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