Linux patch 4.15.124.15-15

2 files changed, 1980 insertions, 0 deletions

diff --git a/0000_README b/0000_README
index 6b574032..2ad5c9b1 100644
--- a/0000_README
+++ b/0000_README
@@ -87,6 +87,10 @@ Patch:  1010_linux-4.15.11.patch
 From:   http://www.kernel.org
 Desc:   Linux 4.15.11
 
+Patch:  1011_linux-4.15.12.patch
+From:   http://www.kernel.org
+Desc:   Linux 4.15.12
+
 Patch:  1500_XATTR_USER_PREFIX.patch
 From:   https://bugs.gentoo.org/show_bug.cgi?id=470644
 Desc:   Support for namespace user.pax.* on tmpfs.
diff --git a/1011_linux-4.15.12.patch b/1011_linux-4.15.12.patch
new file mode 100644
index 00000000..b55e91eb
--- /dev/null
+++ b/1011_linux-4.15.12.patch
@@ -0,0 +1,1976 @@
+diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt b/Documentation/devicetree/bindings/usb/dwc2.txt
+index e64d903bcbe8..46da5f184460 100644
+--- a/Documentation/devicetree/bindings/usb/dwc2.txt
++++ b/Documentation/devicetree/bindings/usb/dwc2.txt
+@@ -19,7 +19,7 @@ Required properties:
+   configured in FS mode;
+   - "st,stm32f4x9-hsotg": The DWC2 USB HS controller instance in STM32F4x9 SoCs
+   configured in HS mode;
+-  - "st,stm32f7xx-hsotg": The DWC2 USB HS controller instance in STM32F7xx SoCs
++  - "st,stm32f7-hsotg": The DWC2 USB HS controller instance in STM32F7 SoCs
+     configured in HS mode;
+ - reg : Should contain 1 register range (address and length)
+ - interrupts : Should contain 1 interrupt
+diff --git a/Makefile b/Makefile
+index 74c0f5e8dd55..2e6ba1553dff 100644
+--- a/Makefile
++++ b/Makefile
+@@ -1,7 +1,7 @@
+ # SPDX-License-Identifier: GPL-2.0
+ VERSION = 4
+ PATCHLEVEL = 15
+-SUBLEVEL = 11
++SUBLEVEL = 12
+ EXTRAVERSION =
+ NAME = Fearless Coyote
+ 
+diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
+index 79089778725b..e3b45546d589 100644
+--- a/arch/parisc/kernel/cache.c
++++ b/arch/parisc/kernel/cache.c
+@@ -543,7 +543,8 @@ void flush_cache_mm(struct mm_struct *mm)
+ 	   rp3440, etc.  So, avoid it if the mm isn't too big.  */
+ 	if ((!IS_ENABLED(CONFIG_SMP) || !arch_irqs_disabled()) &&
+ 	    mm_total_size(mm) >= parisc_cache_flush_threshold) {
+-		flush_tlb_all();
++		if (mm->context)
++			flush_tlb_all();
+ 		flush_cache_all();
+ 		return;
+ 	}
+@@ -571,6 +572,8 @@ void flush_cache_mm(struct mm_struct *mm)
+ 			pfn = pte_pfn(*ptep);
+ 			if (!pfn_valid(pfn))
+ 				continue;
++			if (unlikely(mm->context))
++				flush_tlb_page(vma, addr);
+ 			__flush_cache_page(vma, addr, PFN_PHYS(pfn));
+ 		}
+ 	}
+@@ -579,26 +582,46 @@ void flush_cache_mm(struct mm_struct *mm)
+ void flush_cache_range(struct vm_area_struct *vma,
+ 		unsigned long start, unsigned long end)
+ {
++	pgd_t *pgd;
++	unsigned long addr;
++
+ 	if ((!IS_ENABLED(CONFIG_SMP) || !arch_irqs_disabled()) &&
+ 	    end - start >= parisc_cache_flush_threshold) {
+-		flush_tlb_range(vma, start, end);
++		if (vma->vm_mm->context)
++			flush_tlb_range(vma, start, end);
+ 		flush_cache_all();
+ 		return;
+ 	}
+ 
+-	flush_user_dcache_range_asm(start, end);
+-	if (vma->vm_flags & VM_EXEC)
+-		flush_user_icache_range_asm(start, end);
+-	flush_tlb_range(vma, start, end);
++	if (vma->vm_mm->context == mfsp(3)) {
++		flush_user_dcache_range_asm(start, end);
++		if (vma->vm_flags & VM_EXEC)
++			flush_user_icache_range_asm(start, end);
++		flush_tlb_range(vma, start, end);
++		return;
++	}
++
++	pgd = vma->vm_mm->pgd;
++	for (addr = vma->vm_start; addr < vma->vm_end; addr += PAGE_SIZE) {
++		unsigned long pfn;
++		pte_t *ptep = get_ptep(pgd, addr);
++		if (!ptep)
++			continue;
++		pfn = pte_pfn(*ptep);
++		if (pfn_valid(pfn)) {
++			if (unlikely(vma->vm_mm->context))
++				flush_tlb_page(vma, addr);
++			__flush_cache_page(vma, addr, PFN_PHYS(pfn));
++		}
++	}
+ }
+ 
+ void
+ flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn)
+ {
+-	BUG_ON(!vma->vm_mm->context);
+-
+ 	if (pfn_valid(pfn)) {
+-		flush_tlb_page(vma, vmaddr);
++		if (likely(vma->vm_mm->context))
++			flush_tlb_page(vma, vmaddr);
+ 		__flush_cache_page(vma, vmaddr, PFN_PHYS(pfn));
+ 	}
+ }
+diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
+index 66c14347c502..23a65439c37c 100644
+--- a/arch/x86/include/asm/cpufeatures.h
++++ b/arch/x86/include/asm/cpufeatures.h
+@@ -314,6 +314,7 @@
+ #define X86_FEATURE_VPCLMULQDQ		(16*32+10) /* Carry-Less Multiplication Double Quadword */
+ #define X86_FEATURE_AVX512_VNNI		(16*32+11) /* Vector Neural Network Instructions */
+ #define X86_FEATURE_AVX512_BITALG	(16*32+12) /* Support for VPOPCNT[B,W] and VPSHUF-BITQMB instructions */
++#define X86_FEATURE_TME			(16*32+13) /* Intel Total Memory Encryption */
+ #define X86_FEATURE_AVX512_VPOPCNTDQ	(16*32+14) /* POPCNT for vectors of DW/QW */
+ #define X86_FEATURE_LA57		(16*32+16) /* 5-level page tables */
+ #define X86_FEATURE_RDPID		(16*32+22) /* RDPID instruction */
+@@ -326,6 +327,7 @@
+ /* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */
+ #define X86_FEATURE_AVX512_4VNNIW	(18*32+ 2) /* AVX-512 Neural Network Instructions */
+ #define X86_FEATURE_AVX512_4FMAPS	(18*32+ 3) /* AVX-512 Multiply Accumulation Single precision */
++#define X86_FEATURE_PCONFIG		(18*32+18) /* Intel PCONFIG */
+ #define X86_FEATURE_SPEC_CTRL		(18*32+26) /* "" Speculation Control (IBRS + IBPB) */
+ #define X86_FEATURE_INTEL_STIBP		(18*32+27) /* "" Single Thread Indirect Branch Predictors */
+ #define X86_FEATURE_ARCH_CAPABILITIES	(18*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */
+diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
+index d0dabeae0505..f928ad9b143f 100644
+--- a/arch/x86/include/asm/nospec-branch.h
++++ b/arch/x86/include/asm/nospec-branch.h
+@@ -183,7 +183,10 @@
+  * otherwise we'll run out of registers. We don't care about CET
+  * here, anyway.
+  */
+-# define CALL_NOSPEC ALTERNATIVE("call *%[thunk_target]\n",	\
++# define CALL_NOSPEC						\
++	ALTERNATIVE(						\
++	ANNOTATE_RETPOLINE_SAFE					\
++	"call *%[thunk_target]\n",				\
+ 	"       jmp    904f;\n"					\
+ 	"       .align 16\n"					\
+ 	"901:	call   903f;\n"					\
+diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
+index 4aa9fd379390..c3af167d0a70 100644
+--- a/arch/x86/kernel/cpu/intel.c
++++ b/arch/x86/kernel/cpu/intel.c
+@@ -105,7 +105,7 @@ static void probe_xeon_phi_r3mwait(struct cpuinfo_x86 *c)
+ /*
+  * Early microcode releases for the Spectre v2 mitigation were broken.
+  * Information taken from;
+- * - https://newsroom.intel.com/wp-content/uploads/sites/11/2018/01/microcode-update-guidance.pdf
++ * - https://newsroom.intel.com/wp-content/uploads/sites/11/2018/03/microcode-update-guidance.pdf
+  * - https://kb.vmware.com/s/article/52345
+  * - Microcode revisions observed in the wild
+  * - Release note from 20180108 microcode release
+@@ -123,7 +123,6 @@ static const struct sku_microcode spectre_bad_microcodes[] = {
+ 	{ INTEL_FAM6_KABYLAKE_MOBILE,	0x09,	0x80 },
+ 	{ INTEL_FAM6_SKYLAKE_X,		0x03,	0x0100013e },
+ 	{ INTEL_FAM6_SKYLAKE_X,		0x04,	0x0200003c },
+-	{ INTEL_FAM6_SKYLAKE_DESKTOP,	0x03,	0xc2 },
+ 	{ INTEL_FAM6_BROADWELL_CORE,	0x04,	0x28 },
+ 	{ INTEL_FAM6_BROADWELL_GT3E,	0x01,	0x1b },
+ 	{ INTEL_FAM6_BROADWELL_XEON_D,	0x02,	0x14 },
+diff --git a/arch/x86/kernel/vm86_32.c b/arch/x86/kernel/vm86_32.c
+index 5edb27f1a2c4..9d0b5af7db91 100644
+--- a/arch/x86/kernel/vm86_32.c
++++ b/arch/x86/kernel/vm86_32.c
+@@ -727,7 +727,8 @@ void handle_vm86_fault(struct kernel_vm86_regs *regs, long error_code)
+ 	return;
+ 
+ check_vip:
+-	if (VEFLAGS & X86_EFLAGS_VIP) {
++	if ((VEFLAGS & (X86_EFLAGS_VIP | X86_EFLAGS_VIF)) ==
++	    (X86_EFLAGS_VIP | X86_EFLAGS_VIF)) {
+ 		save_v86_state(regs, VM86_STI);
+ 		return;
+ 	}
+diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
+index fe2cb4cfa75b..37277859a2a1 100644
+--- a/arch/x86/kvm/mmu.c
++++ b/arch/x86/kvm/mmu.c
+@@ -2758,8 +2758,10 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
+ 	else
+ 		pte_access &= ~ACC_WRITE_MASK;
+ 
++	if (!kvm_is_mmio_pfn(pfn))
++		spte |= shadow_me_mask;
++
+ 	spte |= (u64)pfn << PAGE_SHIFT;
+-	spte |= shadow_me_mask;
+ 
+ 	if (pte_access & ACC_WRITE_MASK) {
+ 
+diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
+index c88573d90f3e..25a30b5d6582 100644
+--- a/arch/x86/mm/fault.c
++++ b/arch/x86/mm/fault.c
+@@ -330,7 +330,7 @@ static noinline int vmalloc_fault(unsigned long address)
+ 	if (!pmd_k)
+ 		return -1;
+ 
+-	if (pmd_huge(*pmd_k))
++	if (pmd_large(*pmd_k))
+ 		return 0;
+ 
+ 	pte_k = pte_offset_kernel(pmd_k, address);
+@@ -475,7 +475,7 @@ static noinline int vmalloc_fault(unsigned long address)
+ 	if (pud_none(*pud) || pud_pfn(*pud) != pud_pfn(*pud_ref))
+ 		BUG();
+ 
+-	if (pud_huge(*pud))
++	if (pud_large(*pud))
+ 		return 0;
+ 
+ 	pmd = pmd_offset(pud, address);
+@@ -486,7 +486,7 @@ static noinline int vmalloc_fault(unsigned long address)
+ 	if (pmd_none(*pmd) || pmd_pfn(*pmd) != pmd_pfn(*pmd_ref))
+ 		BUG();
+ 
+-	if (pmd_huge(*pmd))
++	if (pmd_large(*pmd))
+ 		return 0;
+ 
+ 	pte_ref = pte_offset_kernel(pmd_ref, address);
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
+index 21e7ae159dff..9f72993a6175 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
+@@ -69,25 +69,18 @@ void amdgpu_connector_hotplug(struct drm_connector *connector)
+ 		/* don't do anything if sink is not display port, i.e.,
+ 		 * passive dp->(dvi|hdmi) adaptor
+ 		 */
+-		if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
+-			int saved_dpms = connector->dpms;
+-			/* Only turn off the display if it's physically disconnected */
+-			if (!amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)) {
+-				drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
+-			} else if (amdgpu_atombios_dp_needs_link_train(amdgpu_connector)) {
+-				/* Don't try to start link training before we
+-				 * have the dpcd */
+-				if (amdgpu_atombios_dp_get_dpcd(amdgpu_connector))
+-					return;
+-
+-				/* set it to OFF so that drm_helper_connector_dpms()
+-				 * won't return immediately since the current state
+-				 * is ON at this point.
+-				 */
+-				connector->dpms = DRM_MODE_DPMS_OFF;
+-				drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
+-			}
+-			connector->dpms = saved_dpms;
++		if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT &&
++		    amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd) &&
++		    amdgpu_atombios_dp_needs_link_train(amdgpu_connector)) {
++			/* Don't start link training before we have the DPCD */
++			if (amdgpu_atombios_dp_get_dpcd(amdgpu_connector))
++				return;
++
++			/* Turn the connector off and back on immediately, which
++			 * will trigger link training
++			 */
++			drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
++			drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
+ 		}
+ 	}
+ }
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+index 1eac7c3c687b..e0eef2c41190 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+@@ -36,8 +36,6 @@ void amdgpu_gem_object_free(struct drm_gem_object *gobj)
+ 	struct amdgpu_bo *robj = gem_to_amdgpu_bo(gobj);
+ 
+ 	if (robj) {
+-		if (robj->gem_base.import_attach)
+-			drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
+ 		amdgpu_mn_unregister(robj);
+ 		amdgpu_bo_unref(&robj);
+ 	}
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+index ea25164e7f4b..828252dc1d91 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+@@ -44,6 +44,8 @@ static void amdgpu_ttm_bo_destroy(struct ttm_buffer_object *tbo)
+ 
+ 	amdgpu_bo_kunmap(bo);
+ 
++	if (bo->gem_base.import_attach)
++		drm_prime_gem_destroy(&bo->gem_base, bo->tbo.sg);
+ 	drm_gem_object_release(&bo->gem_base);
+ 	amdgpu_bo_unref(&bo->parent);
+ 	if (!list_empty(&bo->shadow_list)) {
+diff --git a/drivers/gpu/drm/nouveau/nouveau_backlight.c b/drivers/gpu/drm/nouveau/nouveau_backlight.c
+index 380f340204e8..f56f60f695e1 100644
+--- a/drivers/gpu/drm/nouveau/nouveau_backlight.c
++++ b/drivers/gpu/drm/nouveau/nouveau_backlight.c
+@@ -268,13 +268,13 @@ nouveau_backlight_init(struct drm_device *dev)
+ 	struct nvif_device *device = &drm->client.device;
+ 	struct drm_connector *connector;
+ 
++	INIT_LIST_HEAD(&drm->bl_connectors);
++
+ 	if (apple_gmux_present()) {
+ 		NV_INFO(drm, "Apple GMUX detected: not registering Nouveau backlight interface\n");
+ 		return 0;
+ 	}
+ 
+-	INIT_LIST_HEAD(&drm->bl_connectors);
+-
+ 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+ 		if (connector->connector_type != DRM_MODE_CONNECTOR_LVDS &&
+ 		    connector->connector_type != DRM_MODE_CONNECTOR_eDP)
+diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
+index e35d3e17cd7c..c6e3d0dd1070 100644
+--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
+@@ -1354,7 +1354,7 @@ nvkm_vmm_get_locked(struct nvkm_vmm *vmm, bool getref, bool mapref, bool sparse,
+ 
+ 		tail = this->addr + this->size;
+ 		if (vmm->func->page_block && next && next->page != p)
+-			tail = ALIGN_DOWN(addr, vmm->func->page_block);
++			tail = ALIGN_DOWN(tail, vmm->func->page_block);
+ 
+ 		if (addr <= tail && tail - addr >= size) {
+ 			rb_erase(&this->tree, &vmm->free);
+diff --git a/drivers/gpu/drm/radeon/radeon_gem.c b/drivers/gpu/drm/radeon/radeon_gem.c
+index cf3deb283da5..065c058f7b5f 100644
+--- a/drivers/gpu/drm/radeon/radeon_gem.c
++++ b/drivers/gpu/drm/radeon/radeon_gem.c
+@@ -34,8 +34,6 @@ void radeon_gem_object_free(struct drm_gem_object *gobj)
+ 	struct radeon_bo *robj = gem_to_radeon_bo(gobj);
+ 
+ 	if (robj) {
+-		if (robj->gem_base.import_attach)
+-			drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
+ 		radeon_mn_unregister(robj);
+ 		radeon_bo_unref(&robj);
+ 	}
+diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
+index 093594976126..baadb706c276 100644
+--- a/drivers/gpu/drm/radeon/radeon_object.c
++++ b/drivers/gpu/drm/radeon/radeon_object.c
+@@ -82,6 +82,8 @@ static void radeon_ttm_bo_destroy(struct ttm_buffer_object *tbo)
+ 	mutex_unlock(&bo->rdev->gem.mutex);
+ 	radeon_bo_clear_surface_reg(bo);
+ 	WARN_ON_ONCE(!list_empty(&bo->va));
++	if (bo->gem_base.import_attach)
++		drm_prime_gem_destroy(&bo->gem_base, bo->tbo.sg);
+ 	drm_gem_object_release(&bo->gem_base);
+ 	kfree(bo);
+ }
+diff --git a/drivers/infiniband/sw/rdmavt/mr.c b/drivers/infiniband/sw/rdmavt/mr.c
+index 42713511b53b..524e6134642e 100644
+--- a/drivers/infiniband/sw/rdmavt/mr.c
++++ b/drivers/infiniband/sw/rdmavt/mr.c
+@@ -489,11 +489,13 @@ static int rvt_check_refs(struct rvt_mregion *mr, const char *t)
+ 	unsigned long timeout;
+ 	struct rvt_dev_info *rdi = ib_to_rvt(mr->pd->device);
+ 
+-	if (percpu_ref_is_zero(&mr->refcount))
+-		return 0;
+-	/* avoid dma mr */
+-	if (mr->lkey)
++	if (mr->lkey) {
++		/* avoid dma mr */
+ 		rvt_dereg_clean_qps(mr);
++		/* @mr was indexed on rcu protected @lkey_table */
++		synchronize_rcu();
++	}
++
+ 	timeout = wait_for_completion_timeout(&mr->comp, 5 * HZ);
+ 	if (!timeout) {
+ 		rvt_pr_err(rdi,
+diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
+index 06f025fd5726..12c325066deb 100644
+--- a/drivers/irqchip/irq-gic-v3-its.c
++++ b/drivers/irqchip/irq-gic-v3-its.c
+@@ -1412,7 +1412,7 @@ static struct irq_chip its_irq_chip = {
+  * This gives us (((1UL << id_bits) - 8192) >> 5) possible allocations.
+  */
+ #define IRQS_PER_CHUNK_SHIFT	5
+-#define IRQS_PER_CHUNK		(1 << IRQS_PER_CHUNK_SHIFT)
++#define IRQS_PER_CHUNK		(1UL << IRQS_PER_CHUNK_SHIFT)
+ #define ITS_MAX_LPI_NRBITS	16 /* 64K LPIs */
+ 
+ static unsigned long *lpi_bitmap;
+@@ -2119,11 +2119,10 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
+ 
+ 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+ 	/*
+-	 * At least one bit of EventID is being used, hence a minimum
+-	 * of two entries. No, the architecture doesn't let you
+-	 * express an ITT with a single entry.
++	 * We allocate at least one chunk worth of LPIs bet device,
++	 * and thus that many ITEs. The device may require less though.
+ 	 */
+-	nr_ites = max(2UL, roundup_pow_of_two(nvecs));
++	nr_ites = max(IRQS_PER_CHUNK, roundup_pow_of_two(nvecs));
+ 	sz = nr_ites * its->ite_size;
+ 	sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1;
+ 	itt = kzalloc(sz, GFP_KERNEL);
+diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c
+index 3551fbd6fe41..935593032123 100644
+--- a/drivers/nvme/host/core.c
++++ b/drivers/nvme/host/core.c
+@@ -2052,6 +2052,22 @@ static const struct attribute_group *nvme_subsys_attrs_groups[] = {
+ 	NULL,
+ };
+ 
++static int nvme_active_ctrls(struct nvme_subsystem *subsys)
++{
++	int count = 0;
++	struct nvme_ctrl *ctrl;
++
++	mutex_lock(&subsys->lock);
++	list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) {
++		if (ctrl->state != NVME_CTRL_DELETING &&
++		    ctrl->state != NVME_CTRL_DEAD)
++			count++;
++	}
++	mutex_unlock(&subsys->lock);
++
++	return count;
++}
++
+ static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
+ {
+ 	struct nvme_subsystem *subsys, *found;
+@@ -2090,7 +2106,7 @@ static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
+ 		 * Verify that the subsystem actually supports multiple
+ 		 * controllers, else bail out.
+ 		 */
+-		if (!(id->cmic & (1 << 1))) {
++		if (nvme_active_ctrls(found) && !(id->cmic & (1 << 1))) {
+ 			dev_err(ctrl->device,
+ 				"ignoring ctrl due to duplicate subnqn (%s).\n",
+ 				found->subnqn);
+diff --git a/drivers/phy/broadcom/phy-brcm-usb-init.c b/drivers/phy/broadcom/phy-brcm-usb-init.c
+index 1e7ce0b6f299..1b7febc43da9 100644
+--- a/drivers/phy/broadcom/phy-brcm-usb-init.c
++++ b/drivers/phy/broadcom/phy-brcm-usb-init.c
+@@ -50,6 +50,8 @@
+ #define   USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK		0x80000000 /* option */
+ #define USB_CTRL_EBRIDGE		0x0c
+ #define   USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK		0x00020000 /* option */
++#define USB_CTRL_OBRIDGE		0x10
++#define   USB_CTRL_OBRIDGE_LS_KEEP_ALIVE_MASK		0x08000000
+ #define USB_CTRL_MDIO			0x14
+ #define USB_CTRL_MDIO2			0x18
+ #define USB_CTRL_UTMI_CTL_1		0x2c
+@@ -71,6 +73,7 @@
+ #define   USB_CTRL_USB30_CTL1_USB3_IPP_MASK		0x20000000 /* option */
+ #define USB_CTRL_USB30_PCTL		0x70
+ #define   USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_MASK	0x00000002
++#define   USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_MASK	0x00008000
+ #define   USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_MASK	0x00020000
+ #define USB_CTRL_USB_DEVICE_CTL1	0x90
+ #define   USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK	0x00000003 /* option */
+@@ -116,7 +119,6 @@ enum {
+ 	USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR,
+ 	USB_CTRL_SETUP_OC3_DISABLE_SELECTOR,
+ 	USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SELECTOR,
+-	USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_SELECTOR,
+ 	USB_CTRL_USB_PM_BDC_SOFT_RESETB_SELECTOR,
+ 	USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR,
+ 	USB_CTRL_USB_PM_USB_PWRDN_SELECTOR,
+@@ -203,7 +205,6 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
+ 		USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
+ 		USB_CTRL_SETUP_OC3_DISABLE_MASK,
+ 		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
+-		USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK,
+ 		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
+ 		USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
+ 		USB_CTRL_USB_PM_USB_PWRDN_MASK,
+@@ -225,7 +226,6 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
+ 		0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
+ 		USB_CTRL_SETUP_OC3_DISABLE_MASK,
+ 		USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
+-		USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK,
+ 		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
+ 		USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK,
+ 		0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */
+@@ -247,7 +247,6 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
+ 		USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
+ 		USB_CTRL_SETUP_OC3_DISABLE_MASK,
+ 		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
+-		USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK,
+ 		USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
+ 		USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
+ 		USB_CTRL_USB_PM_USB_PWRDN_MASK,
+@@ -269,7 +268,6 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
+ 		0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
+ 		USB_CTRL_SETUP_OC3_DISABLE_MASK,
+ 		USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
+-		USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK,
+ 		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
+ 		USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK,
+ 		0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */
+@@ -291,7 +289,6 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
+ 		0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
+ 		USB_CTRL_SETUP_OC3_DISABLE_MASK,
+ 		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
+-		USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK,
+ 		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
+ 		USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK,
+ 		USB_CTRL_USB_PM_USB_PWRDN_MASK,
+@@ -313,7 +310,6 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
+ 		0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
+ 		0, /* USB_CTRL_SETUP_OC3_DISABLE_MASK */
+ 		USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
+-		0, /* USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK */
+ 		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
+ 		0, /* USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK */
+ 		0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */
+@@ -335,7 +331,6 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
+ 		USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
+ 		USB_CTRL_SETUP_OC3_DISABLE_MASK,
+ 		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
+-		0, /* USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK */
+ 		USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
+ 		USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
+ 		USB_CTRL_USB_PM_USB_PWRDN_MASK,
+@@ -357,7 +352,6 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
+ 		0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
+ 		USB_CTRL_SETUP_OC3_DISABLE_MASK,
+ 		USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK,
+-		0, /* USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK */
+ 		0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */
+ 		0, /* USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK */
+ 		0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */
+@@ -379,7 +373,6 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
+ 		USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
+ 		USB_CTRL_SETUP_OC3_DISABLE_MASK,
+ 		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
+-		USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK,
+ 		USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
+ 		USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
+ 		USB_CTRL_USB_PM_USB_PWRDN_MASK,
+@@ -401,7 +394,6 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
+ 		USB_CTRL_SETUP_STRAP_IPP_SEL_MASK,
+ 		USB_CTRL_SETUP_OC3_DISABLE_MASK,
+ 		0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
+-		USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK,
+ 		USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK,
+ 		USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK,
+ 		USB_CTRL_USB_PM_USB_PWRDN_MASK,
+@@ -926,6 +918,7 @@ void brcm_usb_init_common(struct brcm_usb_init_params *params)
+ 			USB_CTRL_UNSET_FAMILY(params, USB_PM, BDC_SOFT_RESETB);
+ 			break;
+ 		default:
++			USB_CTRL_UNSET_FAMILY(params, USB_PM, BDC_SOFT_RESETB);
+ 			USB_CTRL_SET_FAMILY(params, USB_PM, BDC_SOFT_RESETB);
+ 		break;
+ 		}
+@@ -952,13 +945,17 @@ void brcm_usb_init_eohci(struct brcm_usb_init_params *params)
+ 		 * Don't enable this so the memory controller doesn't read
+ 		 * into memory holes. NOTE: This bit is low true on 7366C0.
+ 		 */
+-		USB_CTRL_SET_FAMILY(params, EBRIDGE, ESTOP_SCB_REQ);
++		USB_CTRL_SET(ctrl, EBRIDGE, ESTOP_SCB_REQ);
+ 
+ 	/* Setup the endian bits */
+ 	reg = brcmusb_readl(USB_CTRL_REG(ctrl, SETUP));
+ 	reg &= ~USB_CTRL_SETUP_ENDIAN_BITS;
+ 	reg |= USB_CTRL_MASK_FAMILY(params, SETUP, ENDIAN);
+ 	brcmusb_writel(reg, USB_CTRL_REG(ctrl, SETUP));
++
++	if (params->selected_family == BRCM_FAMILY_7271A0)
++		/* Enable LS keep alive fix for certain keyboards */
++		USB_CTRL_SET(ctrl, OBRIDGE, LS_KEEP_ALIVE);
+ }
+ 
+ void brcm_usb_init_xhci(struct brcm_usb_init_params *params)
+@@ -1003,6 +1000,7 @@ void brcm_usb_uninit_eohci(struct brcm_usb_init_params *params)
+ void brcm_usb_uninit_xhci(struct brcm_usb_init_params *params)
+ {
+ 	brcmusb_xhci_soft_reset(params, 1);
++	USB_CTRL_SET(params->ctrl_regs, USB30_PCTL, PHY3_IDDQ_OVERRIDE);
+ }
+ 
+ void brcm_usb_set_family_map(struct brcm_usb_init_params *params)
+diff --git a/drivers/phy/broadcom/phy-brcm-usb.c b/drivers/phy/broadcom/phy-brcm-usb.c
+index 195b98139e5f..d1dab36fa5b7 100644
+--- a/drivers/phy/broadcom/phy-brcm-usb.c
++++ b/drivers/phy/broadcom/phy-brcm-usb.c
+@@ -338,9 +338,9 @@ static int brcm_usb_phy_probe(struct platform_device *pdev)
+ 			      ARRAY_SIZE(brcm_dr_mode_to_name),
+ 			mode, &priv->ini.mode);
+ 	}
+-	if (of_property_read_bool(dn, "brcm,has_xhci"))
++	if (of_property_read_bool(dn, "brcm,has-xhci"))
+ 		priv->has_xhci = true;
+-	if (of_property_read_bool(dn, "brcm,has_eohci"))
++	if (of_property_read_bool(dn, "brcm,has-eohci"))
+ 		priv->has_eohci = true;
+ 
+ 	err = brcm_usb_phy_dvr_init(dev, priv, dn);
+diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c
+index 6082389f25c3..7b44a2c68a45 100644
+--- a/drivers/scsi/qla2xxx/qla_init.c
++++ b/drivers/scsi/qla2xxx/qla_init.c
+@@ -102,11 +102,16 @@ qla2x00_async_iocb_timeout(void *data)
+ 	struct srb_iocb *lio = &sp->u.iocb_cmd;
+ 	struct event_arg ea;
+ 
+-	ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
+-	    "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
+-	    sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
++	if (fcport) {
++		ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
++		    "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
++		    sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
+ 
+-	fcport->flags &= ~FCF_ASYNC_SENT;
++		fcport->flags &= ~FCF_ASYNC_SENT;
++	} else {
++		pr_info("Async-%s timeout - hdl=%x.\n",
++		    sp->name, sp->handle);
++	}
+ 
+ 	switch (sp->type) {
+ 	case SRB_LOGIN_CMD:
+diff --git a/drivers/scsi/qla2xxx/qla_mid.c b/drivers/scsi/qla2xxx/qla_mid.c
+index e538e6308885..522d585a1a08 100644
+--- a/drivers/scsi/qla2xxx/qla_mid.c
++++ b/drivers/scsi/qla2xxx/qla_mid.c
+@@ -582,8 +582,9 @@ qla25xx_delete_req_que(struct scsi_qla_host *vha, struct req_que *req)
+ 		ret = qla25xx_init_req_que(vha, req);
+ 		if (ret != QLA_SUCCESS)
+ 			return QLA_FUNCTION_FAILED;
++
++		qla25xx_free_req_que(vha, req);
+ 	}
+-	qla25xx_free_req_que(vha, req);
+ 
+ 	return ret;
+ }
+@@ -598,8 +599,9 @@ qla25xx_delete_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
+ 		ret = qla25xx_init_rsp_que(vha, rsp);
+ 		if (ret != QLA_SUCCESS)
+ 			return QLA_FUNCTION_FAILED;
++
++		qla25xx_free_rsp_que(vha, rsp);
+ 	}
+-	qla25xx_free_rsp_que(vha, rsp);
+ 
+ 	return ret;
+ }
+diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c
+index 1f69e89b950f..1204c1d59bc4 100644
+--- a/drivers/scsi/qla2xxx/qla_os.c
++++ b/drivers/scsi/qla2xxx/qla_os.c
+@@ -449,7 +449,7 @@ static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
+ 	ha->req_q_map[0] = req;
+ 	set_bit(0, ha->rsp_qid_map);
+ 	set_bit(0, ha->req_qid_map);
+-	return 1;
++	return 0;
+ 
+ fail_qpair_map:
+ 	kfree(ha->base_qpair);
+@@ -466,6 +466,9 @@ static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
+ 
+ static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
+ {
++	if (!ha->req_q_map)
++		return;
++
+ 	if (IS_QLAFX00(ha)) {
+ 		if (req && req->ring_fx00)
+ 			dma_free_coherent(&ha->pdev->dev,
+@@ -476,14 +479,17 @@ static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
+ 		(req->length + 1) * sizeof(request_t),
+ 		req->ring, req->dma);
+ 
+-	if (req)
++	if (req) {
+ 		kfree(req->outstanding_cmds);
+-
+-	kfree(req);
++		kfree(req);
++	}
+ }
+ 
+ static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
+ {
++	if (!ha->rsp_q_map)
++		return;
++
+ 	if (IS_QLAFX00(ha)) {
+ 		if (rsp && rsp->ring)
+ 			dma_free_coherent(&ha->pdev->dev,
+@@ -494,7 +500,8 @@ static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
+ 		(rsp->length + 1) * sizeof(response_t),
+ 		rsp->ring, rsp->dma);
+ 	}
+-	kfree(rsp);
++	if (rsp)
++		kfree(rsp);
+ }
+ 
+ static void qla2x00_free_queues(struct qla_hw_data *ha)
+@@ -1717,6 +1724,8 @@ qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
+ 	struct qla_tgt_cmd *cmd;
+ 	uint8_t trace = 0;
+ 
++	if (!ha->req_q_map)
++		return;
+ 	spin_lock_irqsave(&ha->hardware_lock, flags);
+ 	for (que = 0; que < ha->max_req_queues; que++) {
+ 		req = ha->req_q_map[que];
+@@ -3071,14 +3080,14 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
+ 	/* Set up the irqs */
+ 	ret = qla2x00_request_irqs(ha, rsp);
+ 	if (ret)
+-		goto probe_hw_failed;
++		goto probe_failed;
+ 
+ 	/* Alloc arrays of request and response ring ptrs */
+-	if (!qla2x00_alloc_queues(ha, req, rsp)) {
++	if (qla2x00_alloc_queues(ha, req, rsp)) {
+ 		ql_log(ql_log_fatal, base_vha, 0x003d,
+ 		    "Failed to allocate memory for queue pointers..."
+ 		    "aborting.\n");
+-		goto probe_init_failed;
++		goto probe_failed;
+ 	}
+ 
+ 	if (ha->mqenable && shost_use_blk_mq(host)) {
+@@ -3363,15 +3372,6 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
+ 
+ 	return 0;
+ 
+-probe_init_failed:
+-	qla2x00_free_req_que(ha, req);
+-	ha->req_q_map[0] = NULL;
+-	clear_bit(0, ha->req_qid_map);
+-	qla2x00_free_rsp_que(ha, rsp);
+-	ha->rsp_q_map[0] = NULL;
+-	clear_bit(0, ha->rsp_qid_map);
+-	ha->max_req_queues = ha->max_rsp_queues = 0;
+-
+ probe_failed:
+ 	if (base_vha->timer_active)
+ 		qla2x00_stop_timer(base_vha);
+@@ -4451,11 +4451,17 @@ qla2x00_mem_free(struct qla_hw_data *ha)
+ 	if (ha->init_cb)
+ 		dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
+ 			ha->init_cb, ha->init_cb_dma);
+-	vfree(ha->optrom_buffer);
+-	kfree(ha->nvram);
+-	kfree(ha->npiv_info);
+-	kfree(ha->swl);
+-	kfree(ha->loop_id_map);
++
++	if (ha->optrom_buffer)
++		vfree(ha->optrom_buffer);
++	if (ha->nvram)
++		kfree(ha->nvram);
++	if (ha->npiv_info)
++		kfree(ha->npiv_info);
++	if (ha->swl)
++		kfree(ha->swl);
++	if (ha->loop_id_map)
++		kfree(ha->loop_id_map);
+ 
+ 	ha->srb_mempool = NULL;
+ 	ha->ctx_mempool = NULL;
+@@ -4471,6 +4477,15 @@ qla2x00_mem_free(struct qla_hw_data *ha)
+ 	ha->ex_init_cb_dma = 0;
+ 	ha->async_pd = NULL;
+ 	ha->async_pd_dma = 0;
++	ha->loop_id_map = NULL;
++	ha->npiv_info = NULL;
++	ha->optrom_buffer = NULL;
++	ha->swl = NULL;
++	ha->nvram = NULL;
++	ha->mctp_dump = NULL;
++	ha->dcbx_tlv = NULL;
++	ha->xgmac_data = NULL;
++	ha->sfp_data = NULL;
+ 
+ 	ha->s_dma_pool = NULL;
+ 	ha->dl_dma_pool = NULL;
+diff --git a/drivers/scsi/qla2xxx/qla_target.c b/drivers/scsi/qla2xxx/qla_target.c
+index cb35bb1ae305..46bb4d057293 100644
+--- a/drivers/scsi/qla2xxx/qla_target.c
++++ b/drivers/scsi/qla2xxx/qla_target.c
+@@ -982,6 +982,7 @@ static void qlt_free_session_done(struct work_struct *work)
+ 
+ 			logo.id = sess->d_id;
+ 			logo.cmd_count = 0;
++			sess->send_els_logo = 0;
+ 			qlt_send_first_logo(vha, &logo);
+ 		}
+ 
+diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
+index 03fd20f0b496..c4a47496d2fb 100644
+--- a/drivers/usb/dwc2/params.c
++++ b/drivers/usb/dwc2/params.c
+@@ -137,7 +137,7 @@ static void dwc2_set_stm32f4x9_fsotg_params(struct dwc2_hsotg *hsotg)
+ 	p->activate_stm_fs_transceiver = true;
+ }
+ 
+-static void dwc2_set_stm32f7xx_hsotg_params(struct dwc2_hsotg *hsotg)
++static void dwc2_set_stm32f7_hsotg_params(struct dwc2_hsotg *hsotg)
+ {
+ 	struct dwc2_core_params *p = &hsotg->params;
+ 
+@@ -164,8 +164,8 @@ const struct of_device_id dwc2_of_match_table[] = {
+ 	{ .compatible = "st,stm32f4x9-fsotg",
+ 	  .data = dwc2_set_stm32f4x9_fsotg_params },
+ 	{ .compatible = "st,stm32f4x9-hsotg" },
+-	{ .compatible = "st,stm32f7xx-hsotg",
+-	  .data = dwc2_set_stm32f7xx_hsotg_params },
++	{ .compatible = "st,stm32f7-hsotg",
++	  .data = dwc2_set_stm32f7_hsotg_params },
+ 	{},
+ };
+ MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
+diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
+index 51de21ef3cdc..b417d9aeaeeb 100644
+--- a/drivers/usb/dwc3/core.c
++++ b/drivers/usb/dwc3/core.c
+@@ -100,6 +100,8 @@ static void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode)
+ 	reg &= ~(DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG));
+ 	reg |= DWC3_GCTL_PRTCAPDIR(mode);
+ 	dwc3_writel(dwc->regs, DWC3_GCTL, reg);
++
++	dwc->current_dr_role = mode;
+ }
+ 
+ static void __dwc3_set_mode(struct work_struct *work)
+@@ -133,8 +135,6 @@ static void __dwc3_set_mode(struct work_struct *work)
+ 
+ 	dwc3_set_prtcap(dwc, dwc->desired_dr_role);
+ 
+-	dwc->current_dr_role = dwc->desired_dr_role;
+-
+ 	spin_unlock_irqrestore(&dwc->lock, flags);
+ 
+ 	switch (dwc->desired_dr_role) {
+@@ -218,7 +218,7 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc)
+ 	 * XHCI driver will reset the host block. If dwc3 was configured for
+ 	 * host-only mode, then we can return early.
+ 	 */
+-	if (dwc->dr_mode == USB_DR_MODE_HOST)
++	if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST)
+ 		return 0;
+ 
+ 	reg = dwc3_readl(dwc->regs, DWC3_DCTL);
+@@ -915,7 +915,6 @@ static int dwc3_core_init_mode(struct dwc3 *dwc)
+ 
+ 	switch (dwc->dr_mode) {
+ 	case USB_DR_MODE_PERIPHERAL:
+-		dwc->current_dr_role = DWC3_GCTL_PRTCAP_DEVICE;
+ 		dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_DEVICE);
+ 
+ 		if (dwc->usb2_phy)
+@@ -931,7 +930,6 @@ static int dwc3_core_init_mode(struct dwc3 *dwc)
+ 		}
+ 		break;
+ 	case USB_DR_MODE_HOST:
+-		dwc->current_dr_role = DWC3_GCTL_PRTCAP_HOST;
+ 		dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_HOST);
+ 
+ 		if (dwc->usb2_phy)
+@@ -1279,7 +1277,7 @@ static int dwc3_remove(struct platform_device *pdev)
+ }
+ 
+ #ifdef CONFIG_PM
+-static int dwc3_suspend_common(struct dwc3 *dwc)
++static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg)
+ {
+ 	unsigned long	flags;
+ 
+@@ -1291,6 +1289,10 @@ static int dwc3_suspend_common(struct dwc3 *dwc)
+ 		dwc3_core_exit(dwc);
+ 		break;
+ 	case DWC3_GCTL_PRTCAP_HOST:
++		/* do nothing during host runtime_suspend */
++		if (!PMSG_IS_AUTO(msg))
++			dwc3_core_exit(dwc);
++		break;
+ 	default:
+ 		/* do nothing */
+ 		break;
+@@ -1299,7 +1301,7 @@ static int dwc3_suspend_common(struct dwc3 *dwc)
+ 	return 0;
+ }
+ 
+-static int dwc3_resume_common(struct dwc3 *dwc)
++static int dwc3_resume_common(struct dwc3 *dwc, pm_message_t msg)
+ {
+ 	unsigned long	flags;
+ 	int		ret;
+@@ -1315,6 +1317,13 @@ static int dwc3_resume_common(struct dwc3 *dwc)
+ 		spin_unlock_irqrestore(&dwc->lock, flags);
+ 		break;
+ 	case DWC3_GCTL_PRTCAP_HOST:
++		/* nothing to do on host runtime_resume */
++		if (!PMSG_IS_AUTO(msg)) {
++			ret = dwc3_core_init(dwc);
++			if (ret)
++				return ret;
++		}
++		break;
+ 	default:
+ 		/* do nothing */
+ 		break;
+@@ -1326,12 +1335,11 @@ static int dwc3_resume_common(struct dwc3 *dwc)
+ static int dwc3_runtime_checks(struct dwc3 *dwc)
+ {
+ 	switch (dwc->current_dr_role) {
+-	case USB_DR_MODE_PERIPHERAL:
+-	case USB_DR_MODE_OTG:
++	case DWC3_GCTL_PRTCAP_DEVICE:
+ 		if (dwc->connected)
+ 			return -EBUSY;
+ 		break;
+-	case USB_DR_MODE_HOST:
++	case DWC3_GCTL_PRTCAP_HOST:
+ 	default:
+ 		/* do nothing */
+ 		break;
+@@ -1348,7 +1356,7 @@ static int dwc3_runtime_suspend(struct device *dev)
+ 	if (dwc3_runtime_checks(dwc))
+ 		return -EBUSY;
+ 
+-	ret = dwc3_suspend_common(dwc);
++	ret = dwc3_suspend_common(dwc, PMSG_AUTO_SUSPEND);
+ 	if (ret)
+ 		return ret;
+ 
+@@ -1364,7 +1372,7 @@ static int dwc3_runtime_resume(struct device *dev)
+ 
+ 	device_init_wakeup(dev, false);
+ 
+-	ret = dwc3_resume_common(dwc);
++	ret = dwc3_resume_common(dwc, PMSG_AUTO_RESUME);
+ 	if (ret)
+ 		return ret;
+ 
+@@ -1411,7 +1419,7 @@ static int dwc3_suspend(struct device *dev)
+ 	struct dwc3	*dwc = dev_get_drvdata(dev);
+ 	int		ret;
+ 
+-	ret = dwc3_suspend_common(dwc);
++	ret = dwc3_suspend_common(dwc, PMSG_SUSPEND);
+ 	if (ret)
+ 		return ret;
+ 
+@@ -1427,7 +1435,7 @@ static int dwc3_resume(struct device *dev)
+ 
+ 	pinctrl_pm_select_default_state(dev);
+ 
+-	ret = dwc3_resume_common(dwc);
++	ret = dwc3_resume_common(dwc, PMSG_RESUME);
+ 	if (ret)
+ 		return ret;
+ 
+diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
+index 4a4a4c98508c..6d4e7a66cedd 100644
+--- a/drivers/usb/dwc3/core.h
++++ b/drivers/usb/dwc3/core.h
+@@ -158,13 +158,15 @@
+ #define DWC3_GDBGFIFOSPACE_TYPE(n)	(((n) << 5) & 0x1e0)
+ #define DWC3_GDBGFIFOSPACE_SPACE_AVAILABLE(n) (((n) >> 16) & 0xffff)
+ 
+-#define DWC3_TXFIFOQ		1
+-#define DWC3_RXFIFOQ		3
+-#define DWC3_TXREQQ		5
+-#define DWC3_RXREQQ		7
+-#define DWC3_RXINFOQ		9
+-#define DWC3_DESCFETCHQ		13
+-#define DWC3_EVENTQ		15
++#define DWC3_TXFIFOQ		0
++#define DWC3_RXFIFOQ		1
++#define DWC3_TXREQQ		2
++#define DWC3_RXREQQ		3
++#define DWC3_RXINFOQ		4
++#define DWC3_PSTATQ		5
++#define DWC3_DESCFETCHQ		6
++#define DWC3_EVENTQ		7
++#define DWC3_AUXEVENTQ		8
+ 
+ /* Global RX Threshold Configuration Register */
+ #define DWC3_GRXTHRCFG_MAXRXBURSTSIZE(n) (((n) & 0x1f) << 19)
+diff --git a/drivers/usb/dwc3/dwc3-of-simple.c b/drivers/usb/dwc3/dwc3-of-simple.c
+index 7ae0eefc7cc7..e54c3622eb28 100644
+--- a/drivers/usb/dwc3/dwc3-of-simple.c
++++ b/drivers/usb/dwc3/dwc3-of-simple.c
+@@ -143,6 +143,7 @@ static int dwc3_of_simple_remove(struct platform_device *pdev)
+ 		clk_disable_unprepare(simple->clks[i]);
+ 		clk_put(simple->clks[i]);
+ 	}
++	simple->num_clocks = 0;
+ 
+ 	reset_control_assert(simple->resets);
+ 	reset_control_put(simple->resets);
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_pci.c b/drivers/usb/gadget/udc/bdc/bdc_pci.c
+index 1e940f054cb8..6dbc489513cd 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_pci.c
++++ b/drivers/usb/gadget/udc/bdc/bdc_pci.c
+@@ -77,6 +77,7 @@ static int bdc_pci_probe(struct pci_dev *pci, const struct pci_device_id *id)
+ 	if (ret) {
+ 		dev_err(&pci->dev,
+ 			"couldn't add resources to bdc device\n");
++		platform_device_put(bdc);
+ 		return ret;
+ 	}
+ 
+diff --git a/drivers/usb/gadget/udc/renesas_usb3.c b/drivers/usb/gadget/udc/renesas_usb3.c
+index 6e87af248367..409cde4e6a51 100644
+--- a/drivers/usb/gadget/udc/renesas_usb3.c
++++ b/drivers/usb/gadget/udc/renesas_usb3.c
+@@ -2410,7 +2410,7 @@ static int renesas_usb3_remove(struct platform_device *pdev)
+ 	__renesas_usb3_ep_free_request(usb3->ep0_req);
+ 	if (usb3->phy)
+ 		phy_put(usb3->phy);
+-	pm_runtime_disable(usb3_to_dev(usb3));
++	pm_runtime_disable(&pdev->dev);
+ 
+ 	return 0;
+ }
+diff --git a/fs/aio.c b/fs/aio.c
+index a062d75109cb..6bcd3fb5265a 100644
+--- a/fs/aio.c
++++ b/fs/aio.c
+@@ -68,9 +68,9 @@ struct aio_ring {
+ #define AIO_RING_PAGES	8
+ 
+ struct kioctx_table {
+-	struct rcu_head	rcu;
+-	unsigned	nr;
+-	struct kioctx	*table[];
++	struct rcu_head		rcu;
++	unsigned		nr;
++	struct kioctx __rcu	*table[];
+ };
+ 
+ struct kioctx_cpu {
+@@ -115,7 +115,8 @@ struct kioctx {
+ 	struct page		**ring_pages;
+ 	long			nr_pages;
+ 
+-	struct work_struct	free_work;
++	struct rcu_head		free_rcu;
++	struct work_struct	free_work;	/* see free_ioctx() */
+ 
+ 	/*
+ 	 * signals when all in-flight requests are done
+@@ -329,7 +330,7 @@ static int aio_ring_mremap(struct vm_area_struct *vma)
+ 	for (i = 0; i < table->nr; i++) {
+ 		struct kioctx *ctx;
+ 
+-		ctx = table->table[i];
++		ctx = rcu_dereference(table->table[i]);
+ 		if (ctx && ctx->aio_ring_file == file) {
+ 			if (!atomic_read(&ctx->dead)) {
+ 				ctx->user_id = ctx->mmap_base = vma->vm_start;
+@@ -588,6 +589,12 @@ static int kiocb_cancel(struct aio_kiocb *kiocb)
+ 	return cancel(&kiocb->common);
+ }
+ 
++/*
++ * free_ioctx() should be RCU delayed to synchronize against the RCU
++ * protected lookup_ioctx() and also needs process context to call
++ * aio_free_ring(), so the double bouncing through kioctx->free_rcu and
++ * ->free_work.
++ */
+ static void free_ioctx(struct work_struct *work)
+ {
+ 	struct kioctx *ctx = container_of(work, struct kioctx, free_work);
+@@ -601,6 +608,14 @@ static void free_ioctx(struct work_struct *work)
+ 	kmem_cache_free(kioctx_cachep, ctx);
+ }
+ 
++static void free_ioctx_rcufn(struct rcu_head *head)
++{
++	struct kioctx *ctx = container_of(head, struct kioctx, free_rcu);
++
++	INIT_WORK(&ctx->free_work, free_ioctx);
++	schedule_work(&ctx->free_work);
++}
++
+ static void free_ioctx_reqs(struct percpu_ref *ref)
+ {
+ 	struct kioctx *ctx = container_of(ref, struct kioctx, reqs);
+@@ -609,8 +624,8 @@ static void free_ioctx_reqs(struct percpu_ref *ref)
+ 	if (ctx->rq_wait && atomic_dec_and_test(&ctx->rq_wait->count))
+ 		complete(&ctx->rq_wait->comp);
+ 
+-	INIT_WORK(&ctx->free_work, free_ioctx);
+-	schedule_work(&ctx->free_work);
++	/* Synchronize against RCU protected table->table[] dereferences */
++	call_rcu(&ctx->free_rcu, free_ioctx_rcufn);
+ }
+ 
+ /*
+@@ -651,9 +666,9 @@ static int ioctx_add_table(struct kioctx *ctx, struct mm_struct *mm)
+ 	while (1) {
+ 		if (table)
+ 			for (i = 0; i < table->nr; i++)
+-				if (!table->table[i]) {
++				if (!rcu_access_pointer(table->table[i])) {
+ 					ctx->id = i;
+-					table->table[i] = ctx;
++					rcu_assign_pointer(table->table[i], ctx);
+ 					spin_unlock(&mm->ioctx_lock);
+ 
+ 					/* While kioctx setup is in progress,
+@@ -834,11 +849,11 @@ static int kill_ioctx(struct mm_struct *mm, struct kioctx *ctx,
+ 	}
+ 
+ 	table = rcu_dereference_raw(mm->ioctx_table);
+-	WARN_ON(ctx != table->table[ctx->id]);
+-	table->table[ctx->id] = NULL;
++	WARN_ON(ctx != rcu_access_pointer(table->table[ctx->id]));
++	RCU_INIT_POINTER(table->table[ctx->id], NULL);
+ 	spin_unlock(&mm->ioctx_lock);
+ 
+-	/* percpu_ref_kill() will do the necessary call_rcu() */
++	/* free_ioctx_reqs() will do the necessary RCU synchronization */
+ 	wake_up_all(&ctx->wait);
+ 
+ 	/*
+@@ -880,7 +895,8 @@ void exit_aio(struct mm_struct *mm)
+ 
+ 	skipped = 0;
+ 	for (i = 0; i < table->nr; ++i) {
+-		struct kioctx *ctx = table->table[i];
++		struct kioctx *ctx =
++			rcu_dereference_protected(table->table[i], true);
+ 
+ 		if (!ctx) {
+ 			skipped++;
+@@ -1069,7 +1085,7 @@ static struct kioctx *lookup_ioctx(unsigned long ctx_id)
+ 	if (!table || id >= table->nr)
+ 		goto out;
+ 
+-	ctx = table->table[id];
++	ctx = rcu_dereference(table->table[id]);
+ 	if (ctx && ctx->user_id == ctx_id) {
+ 		percpu_ref_get(&ctx->users);
+ 		ret = ctx;
+diff --git a/fs/btrfs/backref.c b/fs/btrfs/backref.c
+index 7d0dc100a09a..8a9df8003345 100644
+--- a/fs/btrfs/backref.c
++++ b/fs/btrfs/backref.c
+@@ -1263,7 +1263,16 @@ static int find_parent_nodes(struct btrfs_trans_handle *trans,
+ 	while (node) {
+ 		ref = rb_entry(node, struct prelim_ref, rbnode);
+ 		node = rb_next(&ref->rbnode);
+-		WARN_ON(ref->count < 0);
++		/*
++		 * ref->count < 0 can happen here if there are delayed
++		 * refs with a node->action of BTRFS_DROP_DELAYED_REF.
++		 * prelim_ref_insert() relies on this when merging
++		 * identical refs to keep the overall count correct.
++		 * prelim_ref_insert() will merge only those refs
++		 * which compare identically.  Any refs having
++		 * e.g. different offsets would not be merged,
++		 * and would retain their original ref->count < 0.
++		 */
+ 		if (roots && ref->count && ref->root_id && ref->parent == 0) {
+ 			if (sc && sc->root_objectid &&
+ 			    ref->root_id != sc->root_objectid) {
+@@ -1509,6 +1518,7 @@ int btrfs_check_shared(struct btrfs_root *root, u64 inum, u64 bytenr)
+ 		if (!node)
+ 			break;
+ 		bytenr = node->val;
++		shared.share_count = 0;
+ 		cond_resched();
+ 	}
+ 
+diff --git a/fs/btrfs/raid56.c b/fs/btrfs/raid56.c
+index 8903c4fbf7e6..8a3e42412506 100644
+--- a/fs/btrfs/raid56.c
++++ b/fs/btrfs/raid56.c
+@@ -1351,6 +1351,7 @@ static int find_bio_stripe(struct btrfs_raid_bio *rbio,
+ 		stripe_start = stripe->physical;
+ 		if (physical >= stripe_start &&
+ 		    physical < stripe_start + rbio->stripe_len &&
++		    stripe->dev->bdev &&
+ 		    bio->bi_disk == stripe->dev->bdev->bd_disk &&
+ 		    bio->bi_partno == stripe->dev->bdev->bd_partno) {
+ 			return i;
+diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c
+index a25684287501..6631f48c6a11 100644
+--- a/fs/btrfs/volumes.c
++++ b/fs/btrfs/volumes.c
+@@ -574,6 +574,7 @@ static void btrfs_free_stale_device(struct btrfs_device *cur_dev)
+ 				btrfs_sysfs_remove_fsid(fs_devs);
+ 				list_del(&fs_devs->list);
+ 				free_fs_devices(fs_devs);
++				break;
+ 			} else {
+ 				fs_devs->num_devices--;
+ 				list_del(&dev->dev_list);
+@@ -4737,10 +4738,13 @@ static int __btrfs_alloc_chunk(struct btrfs_trans_handle *trans,
+ 	ndevs = min(ndevs, devs_max);
+ 
+ 	/*
+-	 * the primary goal is to maximize the number of stripes, so use as many
+-	 * devices as possible, even if the stripes are not maximum sized.
++	 * The primary goal is to maximize the number of stripes, so use as
++	 * many devices as possible, even if the stripes are not maximum sized.
++	 *
++	 * The DUP profile stores more than one stripe per device, the
++	 * max_avail is the total size so we have to adjust.
+ 	 */
+-	stripe_size = devices_info[ndevs-1].max_avail;
++	stripe_size = div_u64(devices_info[ndevs - 1].max_avail, dev_stripes);
+ 	num_stripes = ndevs * dev_stripes;
+ 
+ 	/*
+@@ -4775,8 +4779,6 @@ static int __btrfs_alloc_chunk(struct btrfs_trans_handle *trans,
+ 			stripe_size = devices_info[ndevs-1].max_avail;
+ 	}
+ 
+-	stripe_size = div_u64(stripe_size, dev_stripes);
+-
+ 	/* align to BTRFS_STRIPE_LEN */
+ 	stripe_size = round_down(stripe_size, BTRFS_STRIPE_LEN);
+ 
+@@ -7091,10 +7093,24 @@ int btrfs_run_dev_stats(struct btrfs_trans_handle *trans,
+ 
+ 	mutex_lock(&fs_devices->device_list_mutex);
+ 	list_for_each_entry(device, &fs_devices->devices, dev_list) {
+-		if (!device->dev_stats_valid || !btrfs_dev_stats_dirty(device))
++		stats_cnt = atomic_read(&device->dev_stats_ccnt);
++		if (!device->dev_stats_valid || stats_cnt == 0)
+ 			continue;
+ 
+-		stats_cnt = atomic_read(&device->dev_stats_ccnt);
++
++		/*
++		 * There is a LOAD-LOAD control dependency between the value of
++		 * dev_stats_ccnt and updating the on-disk values which requires
++		 * reading the in-memory counters. Such control dependencies
++		 * require explicit read memory barriers.
++		 *
++		 * This memory barriers pairs with smp_mb__before_atomic in
++		 * btrfs_dev_stat_inc/btrfs_dev_stat_set and with the full
++		 * barrier implied by atomic_xchg in
++		 * btrfs_dev_stats_read_and_reset
++		 */
++		smp_rmb();
++
+ 		ret = update_dev_stat_item(trans, fs_info, device);
+ 		if (!ret)
+ 			atomic_sub(stats_cnt, &device->dev_stats_ccnt);
+diff --git a/fs/btrfs/volumes.h b/fs/btrfs/volumes.h
+index ff15208344a7..52ee7b094f3f 100644
+--- a/fs/btrfs/volumes.h
++++ b/fs/btrfs/volumes.h
+@@ -498,6 +498,12 @@ static inline void btrfs_dev_stat_inc(struct btrfs_device *dev,
+ 				      int index)
+ {
+ 	atomic_inc(dev->dev_stat_values + index);
++	/*
++	 * This memory barrier orders stores updating statistics before stores
++	 * updating dev_stats_ccnt.
++	 *
++	 * It pairs with smp_rmb() in btrfs_run_dev_stats().
++	 */
+ 	smp_mb__before_atomic();
+ 	atomic_inc(&dev->dev_stats_ccnt);
+ }
+@@ -523,6 +529,12 @@ static inline void btrfs_dev_stat_set(struct btrfs_device *dev,
+ 				      int index, unsigned long val)
+ {
+ 	atomic_set(dev->dev_stat_values + index, val);
++	/*
++	 * This memory barrier orders stores updating statistics before stores
++	 * updating dev_stats_ccnt.
++	 *
++	 * It pairs with smp_rmb() in btrfs_run_dev_stats().
++	 */
+ 	smp_mb__before_atomic();
+ 	atomic_inc(&dev->dev_stats_ccnt);
+ }
+diff --git a/fs/dcache.c b/fs/dcache.c
+index 5c7df1df81ff..eb2c297a87d0 100644
+--- a/fs/dcache.c
++++ b/fs/dcache.c
+@@ -644,11 +644,16 @@ static inline struct dentry *lock_parent(struct dentry *dentry)
+ 		spin_unlock(&parent->d_lock);
+ 		goto again;
+ 	}
+-	rcu_read_unlock();
+-	if (parent != dentry)
++	if (parent != dentry) {
+ 		spin_lock_nested(&dentry->d_lock, DENTRY_D_LOCK_NESTED);
+-	else
++		if (unlikely(dentry->d_lockref.count < 0)) {
++			spin_unlock(&parent->d_lock);
++			parent = NULL;
++		}
++	} else {
+ 		parent = NULL;
++	}
++	rcu_read_unlock();
+ 	return parent;
+ }
+ 
+diff --git a/fs/namei.c b/fs/namei.c
+index 4e3fc58dae72..ee19c4ef24b2 100644
+--- a/fs/namei.c
++++ b/fs/namei.c
+@@ -578,9 +578,10 @@ static int __nd_alloc_stack(struct nameidata *nd)
+ static bool path_connected(const struct path *path)
+ {
+ 	struct vfsmount *mnt = path->mnt;
++	struct super_block *sb = mnt->mnt_sb;
+ 
+-	/* Only bind mounts can have disconnected paths */
+-	if (mnt->mnt_root == mnt->mnt_sb->s_root)
++	/* Bind mounts and multi-root filesystems can have disconnected paths */
++	if (!(sb->s_iflags & SB_I_MULTIROOT) && (mnt->mnt_root == sb->s_root))
+ 		return true;
+ 
+ 	return is_subdir(path->dentry, mnt->mnt_root);
+diff --git a/fs/nfs/super.c b/fs/nfs/super.c
+index 29bacdc56f6a..5e470e233c83 100644
+--- a/fs/nfs/super.c
++++ b/fs/nfs/super.c
+@@ -2631,6 +2631,8 @@ struct dentry *nfs_fs_mount_common(struct nfs_server *server,
+ 		/* initial superblock/root creation */
+ 		mount_info->fill_super(s, mount_info);
+ 		nfs_get_cache_cookie(s, mount_info->parsed, mount_info->cloned);
++		if (!(server->flags & NFS_MOUNT_UNSHARED))
++			s->s_iflags |= SB_I_MULTIROOT;
+ 	}
+ 
+ 	mntroot = nfs_get_root(s, mount_info->mntfh, dev_name);
+diff --git a/fs/xfs/xfs_icache.c b/fs/xfs/xfs_icache.c
+index 3861d61fb265..3ce946063ffe 100644
+--- a/fs/xfs/xfs_icache.c
++++ b/fs/xfs/xfs_icache.c
+@@ -295,6 +295,7 @@ xfs_reinit_inode(
+ 	uint32_t	generation = inode->i_generation;
+ 	uint64_t	version = inode->i_version;
+ 	umode_t		mode = inode->i_mode;
++	dev_t		dev = inode->i_rdev;
+ 
+ 	error = inode_init_always(mp->m_super, inode);
+ 
+@@ -302,6 +303,7 @@ xfs_reinit_inode(
+ 	inode->i_generation = generation;
+ 	inode->i_version = version;
+ 	inode->i_mode = mode;
++	inode->i_rdev = dev;
+ 	return error;
+ }
+ 
+diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h
+index 8c896540a72c..ff58c2933fdf 100644
+--- a/include/kvm/arm_vgic.h
++++ b/include/kvm/arm_vgic.h
+@@ -349,6 +349,7 @@ void kvm_vgic_put(struct kvm_vcpu *vcpu);
+ bool kvm_vcpu_has_pending_irqs(struct kvm_vcpu *vcpu);
+ void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu);
+ void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu);
++void kvm_vgic_reset_mapped_irq(struct kvm_vcpu *vcpu, u32 vintid);
+ 
+ void vgic_v3_dispatch_sgi(struct kvm_vcpu *vcpu, u64 reg);
+ 
+diff --git a/include/linux/fs.h b/include/linux/fs.h
+index 79421287ff5e..d8af431d9c91 100644
+--- a/include/linux/fs.h
++++ b/include/linux/fs.h
+@@ -1312,6 +1312,7 @@ extern int send_sigurg(struct fown_struct *fown);
+ #define SB_I_CGROUPWB	0x00000001	/* cgroup-aware writeback enabled */
+ #define SB_I_NOEXEC	0x00000002	/* Ignore executables on this fs */
+ #define SB_I_NODEV	0x00000004	/* Ignore devices on this fs */
++#define SB_I_MULTIROOT	0x00000008	/* Multiple roots to the dentry tree */
+ 
+ /* sb->s_iflags to limit user namespace mounts */
+ #define SB_I_USERNS_VISIBLE		0x00000010 /* fstype already mounted */
+diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
+index c00c4c33e432..b26eccc78fb1 100644
+--- a/include/linux/irqchip/arm-gic-v3.h
++++ b/include/linux/irqchip/arm-gic-v3.h
+@@ -503,6 +503,7 @@
+ 
+ #define ICH_HCR_EN			(1 << 0)
+ #define ICH_HCR_UIE			(1 << 1)
++#define ICH_HCR_NPIE			(1 << 3)
+ #define ICH_HCR_TC			(1 << 10)
+ #define ICH_HCR_TALL0			(1 << 11)
+ #define ICH_HCR_TALL1			(1 << 12)
+diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
+index d3453ee072fc..68d8b1f73682 100644
+--- a/include/linux/irqchip/arm-gic.h
++++ b/include/linux/irqchip/arm-gic.h
+@@ -84,6 +84,7 @@
+ 
+ #define GICH_HCR_EN			(1 << 0)
+ #define GICH_HCR_UIE			(1 << 1)
++#define GICH_HCR_NPIE			(1 << 3)
+ 
+ #define GICH_LR_VIRTUALID		(0x3ff << 0)
+ #define GICH_LR_PHYSID_CPUID_SHIFT	(10)
+diff --git a/sound/core/oss/pcm_oss.c b/sound/core/oss/pcm_oss.c
+index c2db7e905f7d..012881461058 100644
+--- a/sound/core/oss/pcm_oss.c
++++ b/sound/core/oss/pcm_oss.c
+@@ -1762,10 +1762,9 @@ static int snd_pcm_oss_get_formats(struct snd_pcm_oss_file *pcm_oss_file)
+ 		return -ENOMEM;
+ 	_snd_pcm_hw_params_any(params);
+ 	err = snd_pcm_hw_refine(substream, params);
+-	format_mask = hw_param_mask_c(params, SNDRV_PCM_HW_PARAM_FORMAT);
+-	kfree(params);
+ 	if (err < 0)
+-		return err;
++		goto error;
++	format_mask = hw_param_mask_c(params, SNDRV_PCM_HW_PARAM_FORMAT);
+ 	for (fmt = 0; fmt < 32; ++fmt) {
+ 		if (snd_mask_test(format_mask, fmt)) {
+ 			int f = snd_pcm_oss_format_to(fmt);
+@@ -1773,7 +1772,10 @@ static int snd_pcm_oss_get_formats(struct snd_pcm_oss_file *pcm_oss_file)
+ 				formats |= f;
+ 		}
+ 	}
+-	return formats;
++
++ error:
++	kfree(params);
++	return err < 0 ? err : formats;
+ }
+ 
+ static int snd_pcm_oss_set_format(struct snd_pcm_oss_file *pcm_oss_file, int format)
+diff --git a/sound/core/seq/seq_clientmgr.c b/sound/core/seq/seq_clientmgr.c
+index 35ff97bfd492..6204b886309a 100644
+--- a/sound/core/seq/seq_clientmgr.c
++++ b/sound/core/seq/seq_clientmgr.c
+@@ -255,12 +255,12 @@ static int seq_free_client1(struct snd_seq_client *client)
+ 
+ 	if (!client)
+ 		return 0;
+-	snd_seq_delete_all_ports(client);
+-	snd_seq_queue_client_leave(client->number);
+ 	spin_lock_irqsave(&clients_lock, flags);
+ 	clienttablock[client->number] = 1;
+ 	clienttab[client->number] = NULL;
+ 	spin_unlock_irqrestore(&clients_lock, flags);
++	snd_seq_delete_all_ports(client);
++	snd_seq_queue_client_leave(client->number);
+ 	snd_use_lock_sync(&client->use_lock);
+ 	snd_seq_queue_client_termination(client->number);
+ 	if (client->pool)
+diff --git a/sound/core/seq/seq_prioq.c b/sound/core/seq/seq_prioq.c
+index bc1c8488fc2a..2bc6759e4adc 100644
+--- a/sound/core/seq/seq_prioq.c
++++ b/sound/core/seq/seq_prioq.c
+@@ -87,7 +87,7 @@ void snd_seq_prioq_delete(struct snd_seq_prioq **fifo)
+ 	if (f->cells > 0) {
+ 		/* drain prioQ */
+ 		while (f->cells > 0)
+-			snd_seq_cell_free(snd_seq_prioq_cell_out(f));
++			snd_seq_cell_free(snd_seq_prioq_cell_out(f, NULL));
+ 	}
+ 	
+ 	kfree(f);
+@@ -214,8 +214,18 @@ int snd_seq_prioq_cell_in(struct snd_seq_prioq * f,
+ 	return 0;
+ }
+ 
++/* return 1 if the current time >= event timestamp */
++static int event_is_ready(struct snd_seq_event *ev, void *current_time)
++{
++	if ((ev->flags & SNDRV_SEQ_TIME_STAMP_MASK) == SNDRV_SEQ_TIME_STAMP_TICK)
++		return snd_seq_compare_tick_time(current_time, &ev->time.tick);
++	else
++		return snd_seq_compare_real_time(current_time, &ev->time.time);
++}
++
+ /* dequeue cell from prioq */
+-struct snd_seq_event_cell *snd_seq_prioq_cell_out(struct snd_seq_prioq *f)
++struct snd_seq_event_cell *snd_seq_prioq_cell_out(struct snd_seq_prioq *f,
++						  void *current_time)
+ {
+ 	struct snd_seq_event_cell *cell;
+ 	unsigned long flags;
+@@ -227,6 +237,8 @@ struct snd_seq_event_cell *snd_seq_prioq_cell_out(struct snd_seq_prioq *f)
+ 	spin_lock_irqsave(&f->lock, flags);
+ 
+ 	cell = f->head;
++	if (cell && current_time && !event_is_ready(&cell->event, current_time))
++		cell = NULL;
+ 	if (cell) {
+ 		f->head = cell->next;
+ 
+@@ -252,18 +264,6 @@ int snd_seq_prioq_avail(struct snd_seq_prioq * f)
+ 	return f->cells;
+ }
+ 
+-
+-/* peek at cell at the head of the prioq */
+-struct snd_seq_event_cell *snd_seq_prioq_cell_peek(struct snd_seq_prioq * f)
+-{
+-	if (f == NULL) {
+-		pr_debug("ALSA: seq: snd_seq_prioq_cell_in() called with NULL prioq\n");
+-		return NULL;
+-	}
+-	return f->head;
+-}
+-
+-
+ static inline int prioq_match(struct snd_seq_event_cell *cell,
+ 			      int client, int timestamp)
+ {
+diff --git a/sound/core/seq/seq_prioq.h b/sound/core/seq/seq_prioq.h
+index d38bb78d9345..2c315ca10fc4 100644
+--- a/sound/core/seq/seq_prioq.h
++++ b/sound/core/seq/seq_prioq.h
+@@ -44,14 +44,12 @@ void snd_seq_prioq_delete(struct snd_seq_prioq **fifo);
+ int snd_seq_prioq_cell_in(struct snd_seq_prioq *f, struct snd_seq_event_cell *cell);
+ 
+ /* dequeue cell from prioq */ 
+-struct snd_seq_event_cell *snd_seq_prioq_cell_out(struct snd_seq_prioq *f);
++struct snd_seq_event_cell *snd_seq_prioq_cell_out(struct snd_seq_prioq *f,
++						  void *current_time);
+ 
+ /* return number of events available in prioq */
+ int snd_seq_prioq_avail(struct snd_seq_prioq *f);
+ 
+-/* peek at cell at the head of the prioq */
+-struct snd_seq_event_cell *snd_seq_prioq_cell_peek(struct snd_seq_prioq *f);
+-
+ /* client left queue */
+ void snd_seq_prioq_leave(struct snd_seq_prioq *f, int client, int timestamp);        
+ 
+diff --git a/sound/core/seq/seq_queue.c b/sound/core/seq/seq_queue.c
+index 79e0c5604ef8..1a6dc4ff44a6 100644
+--- a/sound/core/seq/seq_queue.c
++++ b/sound/core/seq/seq_queue.c
+@@ -277,30 +277,20 @@ void snd_seq_check_queue(struct snd_seq_queue *q, int atomic, int hop)
+ 
+       __again:
+ 	/* Process tick queue... */
+-	while ((cell = snd_seq_prioq_cell_peek(q->tickq)) != NULL) {
+-		if (snd_seq_compare_tick_time(&q->timer->tick.cur_tick,
+-					      &cell->event.time.tick)) {
+-			cell = snd_seq_prioq_cell_out(q->tickq);
+-			if (cell)
+-				snd_seq_dispatch_event(cell, atomic, hop);
+-		} else {
+-			/* event remains in the queue */
++	for (;;) {
++		cell = snd_seq_prioq_cell_out(q->tickq,
++					      &q->timer->tick.cur_tick);
++		if (!cell)
+ 			break;
+-		}
++		snd_seq_dispatch_event(cell, atomic, hop);
+ 	}
+ 
+-
+ 	/* Process time queue... */
+-	while ((cell = snd_seq_prioq_cell_peek(q->timeq)) != NULL) {
+-		if (snd_seq_compare_real_time(&q->timer->cur_time,
+-					      &cell->event.time.time)) {
+-			cell = snd_seq_prioq_cell_out(q->timeq);
+-			if (cell)
+-				snd_seq_dispatch_event(cell, atomic, hop);
+-		} else {
+-			/* event remains in the queue */
++	for (;;) {
++		cell = snd_seq_prioq_cell_out(q->timeq, &q->timer->cur_time);
++		if (!cell)
+ 			break;
+-		}
++		snd_seq_dispatch_event(cell, atomic, hop);
+ 	}
+ 
+ 	/* free lock */
+diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
+index 96143df19b21..d5017adf9feb 100644
+--- a/sound/pci/hda/hda_intel.c
++++ b/sound/pci/hda/hda_intel.c
+@@ -181,11 +181,15 @@ static const struct kernel_param_ops param_ops_xint = {
+ };
+ #define param_check_xint param_check_int
+ 
+-static int power_save = -1;
++static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
+ module_param(power_save, xint, 0644);
+ MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
+ 		 "(in second, 0 = disable).");
+ 
++static bool pm_blacklist = true;
++module_param(pm_blacklist, bool, 0644);
++MODULE_PARM_DESC(pm_blacklist, "Enable power-management blacklist");
++
+ /* reset the HD-audio controller in power save mode.
+  * this may give more power-saving, but will take longer time to
+  * wake up.
+@@ -2300,10 +2304,9 @@ static int azx_probe_continue(struct azx *chip)
+ 
+ 	val = power_save;
+ #ifdef CONFIG_PM
+-	if (val == -1) {
++	if (pm_blacklist) {
+ 		const struct snd_pci_quirk *q;
+ 
+-		val = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
+ 		q = snd_pci_quirk_lookup(chip->pci, power_save_blacklist);
+ 		if (q && val) {
+ 			dev_info(chip->card->dev, "device %04x:%04x is on the power_save blacklist, forcing power_save to 0\n",
+diff --git a/tools/testing/selftests/x86/entry_from_vm86.c b/tools/testing/selftests/x86/entry_from_vm86.c
+index 361466a2eaef..ade443a88421 100644
+--- a/tools/testing/selftests/x86/entry_from_vm86.c
++++ b/tools/testing/selftests/x86/entry_from_vm86.c
+@@ -95,6 +95,10 @@ asm (
+ 	"int3\n\t"
+ 	"vmcode_int80:\n\t"
+ 	"int $0x80\n\t"
++	"vmcode_popf_hlt:\n\t"
++	"push %ax\n\t"
++	"popf\n\t"
++	"hlt\n\t"
+ 	"vmcode_umip:\n\t"
+ 	/* addressing via displacements */
+ 	"smsw (2052)\n\t"
+@@ -124,8 +128,8 @@ asm (
+ 
+ extern unsigned char vmcode[], end_vmcode[];
+ extern unsigned char vmcode_bound[], vmcode_sysenter[], vmcode_syscall[],
+-	vmcode_sti[], vmcode_int3[], vmcode_int80[], vmcode_umip[],
+-	vmcode_umip_str[], vmcode_umip_sldt[];
++	vmcode_sti[], vmcode_int3[], vmcode_int80[], vmcode_popf_hlt[],
++	vmcode_umip[], vmcode_umip_str[], vmcode_umip_sldt[];
+ 
+ /* Returns false if the test was skipped. */
+ static bool do_test(struct vm86plus_struct *v86, unsigned long eip,
+@@ -175,7 +179,7 @@ static bool do_test(struct vm86plus_struct *v86, unsigned long eip,
+ 	    (VM86_TYPE(ret) == rettype && VM86_ARG(ret) == retarg)) {
+ 		printf("[OK]\tReturned correctly\n");
+ 	} else {
+-		printf("[FAIL]\tIncorrect return reason\n");
++		printf("[FAIL]\tIncorrect return reason (started at eip = 0x%lx, ended at eip = 0x%lx)\n", eip, v86->regs.eip);
+ 		nerrs++;
+ 	}
+ 
+@@ -264,6 +268,9 @@ int main(void)
+ 	v86.regs.ds = load_addr / 16;
+ 	v86.regs.es = load_addr / 16;
+ 
++	/* Use the end of the page as our stack. */
++	v86.regs.esp = 4096;
++
+ 	assert((v86.regs.cs & 3) == 0);	/* Looks like RPL = 0 */
+ 
+ 	/* #BR -- should deliver SIG??? */
+@@ -295,6 +302,23 @@ int main(void)
+ 	v86.regs.eflags &= ~X86_EFLAGS_IF;
+ 	do_test(&v86, vmcode_sti - vmcode, VM86_STI, 0, "STI with VIP set");
+ 
++	/* POPF with VIP set but IF clear: should not trap */
++	v86.regs.eflags = X86_EFLAGS_VIP;
++	v86.regs.eax = 0;
++	do_test(&v86, vmcode_popf_hlt - vmcode, VM86_UNKNOWN, 0, "POPF with VIP set and IF clear");
++
++	/* POPF with VIP set and IF set: should trap */
++	v86.regs.eflags = X86_EFLAGS_VIP;
++	v86.regs.eax = X86_EFLAGS_IF;
++	do_test(&v86, vmcode_popf_hlt - vmcode, VM86_STI, 0, "POPF with VIP and IF set");
++
++	/* POPF with VIP clear and IF set: should not trap */
++	v86.regs.eflags = 0;
++	v86.regs.eax = X86_EFLAGS_IF;
++	do_test(&v86, vmcode_popf_hlt - vmcode, VM86_UNKNOWN, 0, "POPF with VIP clear and IF set");
++
++	v86.regs.eflags = 0;
++
+ 	/* INT3 -- should cause #BP */
+ 	do_test(&v86, vmcode_int3 - vmcode, VM86_TRAP, 3, "INT3");
+ 
+@@ -318,7 +342,7 @@ int main(void)
+ 	clearhandler(SIGSEGV);
+ 
+ 	/* Make sure nothing explodes if we fork. */
+-	if (fork() > 0)
++	if (fork() == 0)
+ 		return 0;
+ 
+ 	return (nerrs == 0 ? 0 : 1);
+diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c
+index cc29a8148328..811631a1296c 100644
+--- a/virt/kvm/arm/arch_timer.c
++++ b/virt/kvm/arm/arch_timer.c
+@@ -589,6 +589,7 @@ void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu)
+ 
+ int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu)
+ {
++	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
+ 	struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
+ 	struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
+ 
+@@ -602,6 +603,9 @@ int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu)
+ 	ptimer->cnt_ctl = 0;
+ 	kvm_timer_update_state(vcpu);
+ 
++	if (timer->enabled && irqchip_in_kernel(vcpu->kvm))
++		kvm_vgic_reset_mapped_irq(vcpu, vtimer->irq.irq);
++
+ 	return 0;
+ }
+ 
+@@ -773,7 +777,7 @@ int kvm_timer_hyp_init(bool has_gic)
+ 		}
+ 	}
+ 
+-	kvm_info("virtual timer IRQ%d\n", host_vtimer_irq);
++	kvm_debug("virtual timer IRQ%d\n", host_vtimer_irq);
+ 
+ 	cpuhp_setup_state(CPUHP_AP_KVM_ARM_TIMER_STARTING,
+ 			  "kvm/arm/timer:starting", kvm_timer_starting_cpu,
+diff --git a/virt/kvm/arm/hyp/vgic-v3-sr.c b/virt/kvm/arm/hyp/vgic-v3-sr.c
+index f5c3d6d7019e..b89ce5432214 100644
+--- a/virt/kvm/arm/hyp/vgic-v3-sr.c
++++ b/virt/kvm/arm/hyp/vgic-v3-sr.c
+@@ -215,7 +215,8 @@ void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu)
+ 	 * are now visible to the system register interface.
+ 	 */
+ 	if (!cpu_if->vgic_sre) {
+-		dsb(st);
++		dsb(sy);
++		isb();
+ 		cpu_if->vgic_vmcr = read_gicreg(ICH_VMCR_EL2);
+ 	}
+ 
+diff --git a/virt/kvm/arm/mmu.c b/virt/kvm/arm/mmu.c
+index 9dea96380339..b69798a7880e 100644
+--- a/virt/kvm/arm/mmu.c
++++ b/virt/kvm/arm/mmu.c
+@@ -1760,9 +1760,9 @@ int kvm_mmu_init(void)
+ 	 */
+ 	BUG_ON((hyp_idmap_start ^ (hyp_idmap_end - 1)) & PAGE_MASK);
+ 
+-	kvm_info("IDMAP page: %lx\n", hyp_idmap_start);
+-	kvm_info("HYP VA range: %lx:%lx\n",
+-		 kern_hyp_va(PAGE_OFFSET), kern_hyp_va(~0UL));
++	kvm_debug("IDMAP page: %lx\n", hyp_idmap_start);
++	kvm_debug("HYP VA range: %lx:%lx\n",
++		  kern_hyp_va(PAGE_OFFSET), kern_hyp_va(~0UL));
+ 
+ 	if (hyp_idmap_start >= kern_hyp_va(PAGE_OFFSET) &&
+ 	    hyp_idmap_start <  kern_hyp_va(~0UL) &&
+diff --git a/virt/kvm/arm/vgic/vgic-v2.c b/virt/kvm/arm/vgic/vgic-v2.c
+index 80897102da26..028d2ba05b7b 100644
+--- a/virt/kvm/arm/vgic/vgic-v2.c
++++ b/virt/kvm/arm/vgic/vgic-v2.c
+@@ -37,6 +37,13 @@ void vgic_v2_init_lrs(void)
+ 		vgic_v2_write_lr(i, 0);
+ }
+ 
++void vgic_v2_set_npie(struct kvm_vcpu *vcpu)
++{
++	struct vgic_v2_cpu_if *cpuif = &vcpu->arch.vgic_cpu.vgic_v2;
++
++	cpuif->vgic_hcr |= GICH_HCR_NPIE;
++}
++
+ void vgic_v2_set_underflow(struct kvm_vcpu *vcpu)
+ {
+ 	struct vgic_v2_cpu_if *cpuif = &vcpu->arch.vgic_cpu.vgic_v2;
+@@ -64,7 +71,7 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu)
+ 	int lr;
+ 	unsigned long flags;
+ 
+-	cpuif->vgic_hcr &= ~GICH_HCR_UIE;
++	cpuif->vgic_hcr &= ~(GICH_HCR_UIE | GICH_HCR_NPIE);
+ 
+ 	for (lr = 0; lr < vgic_cpu->used_lrs; lr++) {
+ 		u32 val = cpuif->vgic_lr[lr];
+@@ -381,7 +388,7 @@ int vgic_v2_probe(const struct gic_kvm_info *info)
+ 	kvm_vgic_global_state.type = VGIC_V2;
+ 	kvm_vgic_global_state.max_gic_vcpus = VGIC_V2_MAX_CPUS;
+ 
+-	kvm_info("vgic-v2@%llx\n", info->vctrl.start);
++	kvm_debug("vgic-v2@%llx\n", info->vctrl.start);
+ 
+ 	return 0;
+ out:
+diff --git a/virt/kvm/arm/vgic/vgic-v3.c b/virt/kvm/arm/vgic/vgic-v3.c
+index f47e8481fa45..f667c7e86b8f 100644
+--- a/virt/kvm/arm/vgic/vgic-v3.c
++++ b/virt/kvm/arm/vgic/vgic-v3.c
+@@ -26,6 +26,13 @@ static bool group1_trap;
+ static bool common_trap;
+ static bool gicv4_enable;
+ 
++void vgic_v3_set_npie(struct kvm_vcpu *vcpu)
++{
++	struct vgic_v3_cpu_if *cpuif = &vcpu->arch.vgic_cpu.vgic_v3;
++
++	cpuif->vgic_hcr |= ICH_HCR_NPIE;
++}
++
+ void vgic_v3_set_underflow(struct kvm_vcpu *vcpu)
+ {
+ 	struct vgic_v3_cpu_if *cpuif = &vcpu->arch.vgic_cpu.vgic_v3;
+@@ -47,7 +54,7 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu)
+ 	int lr;
+ 	unsigned long flags;
+ 
+-	cpuif->vgic_hcr &= ~ICH_HCR_UIE;
++	cpuif->vgic_hcr &= ~(ICH_HCR_UIE | ICH_HCR_NPIE);
+ 
+ 	for (lr = 0; lr < vgic_cpu->used_lrs; lr++) {
+ 		u64 val = cpuif->vgic_lr[lr];
+diff --git a/virt/kvm/arm/vgic/vgic.c b/virt/kvm/arm/vgic/vgic.c
+index ecb8e25f5fe5..04816ecdf9ce 100644
+--- a/virt/kvm/arm/vgic/vgic.c
++++ b/virt/kvm/arm/vgic/vgic.c
+@@ -460,6 +460,32 @@ int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, unsigned int host_irq,
+ 	return ret;
+ }
+ 
++/**
++ * kvm_vgic_reset_mapped_irq - Reset a mapped IRQ
++ * @vcpu: The VCPU pointer
++ * @vintid: The INTID of the interrupt
++ *
++ * Reset the active and pending states of a mapped interrupt.  Kernel
++ * subsystems injecting mapped interrupts should reset their interrupt lines
++ * when we are doing a reset of the VM.
++ */
++void kvm_vgic_reset_mapped_irq(struct kvm_vcpu *vcpu, u32 vintid)
++{
++	struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);
++	unsigned long flags;
++
++	if (!irq->hw)
++		goto out;
++
++	spin_lock_irqsave(&irq->irq_lock, flags);
++	irq->active = false;
++	irq->pending_latch = false;
++	irq->line_level = false;
++	spin_unlock_irqrestore(&irq->irq_lock, flags);
++out:
++	vgic_put_irq(vcpu->kvm, irq);
++}
++
+ int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, unsigned int vintid)
+ {
+ 	struct vgic_irq *irq;
+@@ -649,22 +675,37 @@ static inline void vgic_set_underflow(struct kvm_vcpu *vcpu)
+ 		vgic_v3_set_underflow(vcpu);
+ }
+ 
++static inline void vgic_set_npie(struct kvm_vcpu *vcpu)
++{
++	if (kvm_vgic_global_state.type == VGIC_V2)
++		vgic_v2_set_npie(vcpu);
++	else
++		vgic_v3_set_npie(vcpu);
++}
++
+ /* Requires the ap_list_lock to be held. */
+-static int compute_ap_list_depth(struct kvm_vcpu *vcpu)
++static int compute_ap_list_depth(struct kvm_vcpu *vcpu,
++				 bool *multi_sgi)
+ {
+ 	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
+ 	struct vgic_irq *irq;
+ 	int count = 0;
+ 
++	*multi_sgi = false;
++
+ 	DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock));
+ 
+ 	list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
+ 		spin_lock(&irq->irq_lock);
+ 		/* GICv2 SGIs can count for more than one... */
+-		if (vgic_irq_is_sgi(irq->intid) && irq->source)
+-			count += hweight8(irq->source);
+-		else
++		if (vgic_irq_is_sgi(irq->intid) && irq->source) {
++			int w = hweight8(irq->source);
++
++			count += w;
++			*multi_sgi |= (w > 1);
++		} else {
+ 			count++;
++		}
+ 		spin_unlock(&irq->irq_lock);
+ 	}
+ 	return count;
+@@ -675,28 +716,43 @@ static void vgic_flush_lr_state(struct kvm_vcpu *vcpu)
+ {
+ 	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
+ 	struct vgic_irq *irq;
+-	int count = 0;
++	int count;
++	bool npie = false;
++	bool multi_sgi;
++	u8 prio = 0xff;
+ 
+ 	DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock));
+ 
+-	if (compute_ap_list_depth(vcpu) > kvm_vgic_global_state.nr_lr)
++	count = compute_ap_list_depth(vcpu, &multi_sgi);
++	if (count > kvm_vgic_global_state.nr_lr || multi_sgi)
+ 		vgic_sort_ap_list(vcpu);
+ 
++	count = 0;
++
+ 	list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
+ 		spin_lock(&irq->irq_lock);
+ 
+-		if (unlikely(vgic_target_oracle(irq) != vcpu))
+-			goto next;
+-
+ 		/*
+-		 * If we get an SGI with multiple sources, try to get
+-		 * them in all at once.
++		 * If we have multi-SGIs in the pipeline, we need to
++		 * guarantee that they are all seen before any IRQ of
++		 * lower priority. In that case, we need to filter out
++		 * these interrupts by exiting early. This is easy as
++		 * the AP list has been sorted already.
+ 		 */
+-		do {
++		if (multi_sgi && irq->priority > prio) {
++			spin_unlock(&irq->irq_lock);
++			break;
++		}
++
++		if (likely(vgic_target_oracle(irq) == vcpu)) {
+ 			vgic_populate_lr(vcpu, irq, count++);
+-		} while (irq->source && count < kvm_vgic_global_state.nr_lr);
+ 
+-next:
++			if (irq->source) {
++				npie = true;
++				prio = irq->priority;
++			}
++		}
++
+ 		spin_unlock(&irq->irq_lock);
+ 
+ 		if (count == kvm_vgic_global_state.nr_lr) {
+@@ -707,6 +763,9 @@ static void vgic_flush_lr_state(struct kvm_vcpu *vcpu)
+ 		}
+ 	}
+ 
++	if (npie)
++		vgic_set_npie(vcpu);
++
+ 	vcpu->arch.vgic_cpu.used_lrs = count;
+ 
+ 	/* Nuke remaining LRs */
+diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h
+index efbcf8f96f9c..d434ebd67599 100644
+--- a/virt/kvm/arm/vgic/vgic.h
++++ b/virt/kvm/arm/vgic/vgic.h
+@@ -151,6 +151,7 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu);
+ void vgic_v2_populate_lr(struct kvm_vcpu *vcpu, struct vgic_irq *irq, int lr);
+ void vgic_v2_clear_lr(struct kvm_vcpu *vcpu, int lr);
+ void vgic_v2_set_underflow(struct kvm_vcpu *vcpu);
++void vgic_v2_set_npie(struct kvm_vcpu *vcpu);
+ int vgic_v2_has_attr_regs(struct kvm_device *dev, struct kvm_device_attr *attr);
+ int vgic_v2_dist_uaccess(struct kvm_vcpu *vcpu, bool is_write,
+ 			 int offset, u32 *val);
+@@ -180,6 +181,7 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu);
+ void vgic_v3_populate_lr(struct kvm_vcpu *vcpu, struct vgic_irq *irq, int lr);
+ void vgic_v3_clear_lr(struct kvm_vcpu *vcpu, int lr);
+ void vgic_v3_set_underflow(struct kvm_vcpu *vcpu);
++void vgic_v3_set_npie(struct kvm_vcpu *vcpu);
+ void vgic_v3_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
+ void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
+ void vgic_v3_enable(struct kvm_vcpu *vcpu);