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author | Andreas K. Hüttel <dilfridge@gentoo.org> | 2022-05-01 14:02:47 +0200 |
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committer | Andreas K. Hüttel <dilfridge@gentoo.org> | 2022-05-01 14:02:47 +0200 |
commit | edc3ae02d0f3fad50d4ba679c85b0222ead1efa8 (patch) | |
tree | b22bf94c7bebb2d66d26fe56a3b096731dee38b8 | |
parent | Add mipsel3 o32 specs for the PS/2 (diff) | |
download | releng-edc3ae02.tar.gz releng-edc3ae02.tar.bz2 releng-edc3ae02.zip |
Add mipsel3 o32 build for the PS/2
Signed-off-by: Andreas K. Hüttel <dilfridge@gentoo.org>
-rw-r--r-- | tools/catalyst-auto-qemu-mips.conf | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/tools/catalyst-auto-qemu-mips.conf b/tools/catalyst-auto-qemu-mips.conf index c86c3f08..f47c5a6f 100644 --- a/tools/catalyst-auto-qemu-mips.conf +++ b/tools/catalyst-auto-qemu-mips.conf @@ -6,7 +6,7 @@ UPLOAD_KEY=/root/.ssh/id_rsa SPECS_DIR=${REPO_DIR}/releases/specs-qemu/mips EMAIL_SUBJECT_PREPEND="[mips-qemu-auto]" -SETS="mips2o32openrc mipsel2o32openrc mips32o32openrc mips32elo32openrc mips3n32openrc mipsel3n32openrc mips3multilibopenrc mipsel3multilibopenrc mips3n64openrc mipsel3n64openrc mipsel3n64systemd mips64n32openrc mips64eln32openrc mips64multilibopenrc mips64elmultilibopenrc mips64n64openrc mips64eln64openrc mips64eln64systemd" +SETS="mips2o32openrc mipsel2o32openrc mips32o32openrc mips32elo32openrc mipsel3o32openrc mips3n32openrc mipsel3n32openrc mips3multilibopenrc mipsel3multilibopenrc mips3n64openrc mipsel3n64openrc mipsel3n64systemd mips64n32openrc mips64eln32openrc mips64multilibopenrc mips64elmultilibopenrc mips64n64openrc mips64eln64openrc mips64eln64systemd" SET_mips2o32openrc_SPECS="stage1-mips2-o32-openrc.spec stage3-mips2-o32-openrc.spec" SET_mipsel2o32openrc_SPECS="stage1-mipsel2-o32-openrc.spec stage3-mipsel2-o32-openrc.spec" @@ -14,6 +14,8 @@ SET_mipsel2o32openrc_SPECS="stage1-mipsel2-o32-openrc.spec stage3-mipsel2-o32-op SET_mips32o32openrc_SPECS="stage1-mips32-o32-openrc.spec stage3-mips32-o32-openrc.spec" SET_mips32elo32openrc_SPECS="stage1-mips32el-o32-openrc.spec stage3-mips32el-o32-openrc.spec" +SET_mipsel3o32openrc_SPECS="stage1-mipsel3-o32-openrc.spec stage3-mipsel3-o32-openrc.spec" + SET_mips3n32openrc_SPECS="stage1-mips3-n32-openrc.spec stage3-mips3-n32-openrc.spec" SET_mipsel3n32openrc_SPECS="stage1-mipsel3-n32-openrc.spec stage3-mipsel3-n32-openrc.spec" @@ -68,6 +70,9 @@ post_build() { stage3-mips32el-o32-openrc.spec) upload stage3-mips32el-openrc-${TIMESTAMP}.tar.xz* ;; + stage3-mipsel3-o32-openrc.spec) + upload stage3-mipsel3-openrc-${TIMESTAMP}.tar.xz* + ;; stage3-mips3-n32-openrc.spec) upload stage3-mips3_n32-openrc-${TIMESTAMP}.tar.xz* ;; |