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<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE pkgmetadata SYSTEM "http://www.gentoo.org/dtd/metadata.dtd">
<pkgmetadata>
<herd>sci-electronics</herd>
<longdescription>
GPL Cver is a Verilog HDL simulator that is released under the GNU General
Public License. GPL Cver is a full 1995 P1364 Verilog standard HDL simulator.
It also implements some of the 2001 P1364 standard features including all
three PLI interfaces (tf_, acc_ and vpi_) as defined in the 2001 Language
Reference Manual (LRM).
</longdescription>
</pkgmetadata>
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