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Diffstat (limited to 'metadata/md5-cache/sci-electronics/iverilog-11.0')
-rw-r--r--metadata/md5-cache/sci-electronics/iverilog-11.04
1 files changed, 2 insertions, 2 deletions
diff --git a/metadata/md5-cache/sci-electronics/iverilog-11.0 b/metadata/md5-cache/sci-electronics/iverilog-11.0
index ad9926344e8e..5e132720ed69 100644
--- a/metadata/md5-cache/sci-electronics/iverilog-11.0
+++ b/metadata/md5-cache/sci-electronics/iverilog-11.0
@@ -1,4 +1,4 @@
-BDEPEND=dev-util/gperf app-alternatives/yacc app-alternatives/lex sys-devel/gnuconfig >=app-portage/elt-patches-20240116 || ( >=dev-build/automake-1.16.5:1.16 ) || ( >=dev-build/autoconf-2.72-r1:2.72 >=dev-build/autoconf-2.71-r6:2.71 ) >=dev-build/libtool-2.4.7-r3
+BDEPEND=dev-util/gperf app-alternatives/yacc app-alternatives/lex >=app-portage/elt-patches-20240116 sys-devel/gnuconfig || ( >=dev-build/automake-1.16.5:1.16 ) || ( >=dev-build/autoconf-2.72-r1:2.72 >=dev-build/autoconf-2.71-r6:2.71 ) >=dev-build/libtool-2.4.7-r3
DEFINED_PHASES=install prepare
DEPEND=sys-libs/readline:= sys-libs/zlib
DESCRIPTION=A Verilog simulation and synthesis tool
@@ -10,5 +10,5 @@ LICENSE=LGPL-2.1
RDEPEND=sys-libs/readline:= sys-libs/zlib
SLOT=0
SRC_URI=https://github.com/steveicarus/iverilog/archive/v11_0.tar.gz -> iverilog-11.0.tar.gz
-_eclasses_=gnuconfig b6b3e92f8b8c996400074b5f61a59256 toolchain-funcs e56c7649b804f051623c8bc1a1c44084 multilib c19072c3cd7ac5cb21de013f7e9832e0 libtool 5f49a16f67f81bdf873e3d1f10b10001 autotools 3af8f60c4bdb23e738db506a630898ee
+_eclasses_=gnuconfig a397adda6984a4c423e28ac274c1ba98 toolchain-funcs e56c7649b804f051623c8bc1a1c44084 multilib c19072c3cd7ac5cb21de013f7e9832e0 libtool 5f49a16f67f81bdf873e3d1f10b10001 autotools dc70c1dc473b68317fc4a86f5fbfc57d
_md5_=0534d8af091e58e6f998b5e34700e039